Kconfig.cpu 14 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. comment "Processor Type"
  3. choice
  4. prompt "CPU family support"
  5. default M68KCLASSIC if MMU
  6. default COLDFIRE if !MMU
  7. help
  8. The Freescale (was Motorola) M68K family of processors implements
  9. the full 68000 processor instruction set.
  10. The Freescale ColdFire family of processors is a modern derivative
  11. of the 68000 processor family. They are mainly targeted at embedded
  12. applications, and are all System-On-Chip (SOC) devices, as opposed
  13. to stand alone CPUs. They implement a subset of the original 68000
  14. processor instruction set.
  15. If you anticipate running this kernel on a computer with a classic
  16. MC68xxx processor, select M68KCLASSIC.
  17. If you anticipate running this kernel on a computer with a ColdFire
  18. processor, select COLDFIRE.
  19. config M68KCLASSIC
  20. bool "Classic M68K CPU family support"
  21. select HAVE_ARCH_PFN_VALID
  22. config COLDFIRE
  23. bool "Coldfire CPU family support"
  24. select CPU_HAS_NO_BITFIELDS
  25. select CPU_HAS_NO_CAS
  26. select CPU_HAS_NO_MULDIV64
  27. select GENERIC_CSUM
  28. select GPIOLIB
  29. select HAVE_LEGACY_CLK
  30. select HAVE_PAGE_SIZE_8KB if !MMU
  31. endchoice
  32. if M68KCLASSIC
  33. config M68000
  34. def_bool y
  35. depends on !MMU
  36. select CPU_HAS_NO_BITFIELDS
  37. select CPU_HAS_NO_CAS
  38. select CPU_HAS_NO_MULDIV64
  39. select CPU_HAS_NO_UNALIGNED
  40. select GENERIC_CSUM
  41. select CPU_NO_EFFICIENT_FFS
  42. select HAVE_ARCH_HASH
  43. select HAVE_PAGE_SIZE_4KB
  44. select LEGACY_TIMER_TICK
  45. help
  46. The Freescale (was Motorola) 68000 CPU is the first generation of
  47. the well known M68K family of processors. The CPU core as well as
  48. being available as a stand alone CPU was also used in many
  49. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  50. a paging MMU.
  51. config M68020
  52. bool "68020 support"
  53. depends on MMU
  54. select FPU
  55. select CPU_HAS_ADDRESS_SPACES
  56. help
  57. If you anticipate running this kernel on a computer with a MC68020
  58. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  59. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  60. Sun 3, which provides its own version.
  61. config M68030
  62. bool "68030 support"
  63. depends on MMU && !MMU_SUN3
  64. select FPU
  65. select CPU_HAS_ADDRESS_SPACES
  66. help
  67. If you anticipate running this kernel on a computer with a MC68030
  68. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  69. work, as it does not include an MMU (Memory Management Unit).
  70. config M68040
  71. bool "68040 support"
  72. depends on MMU && !MMU_SUN3
  73. select FPU
  74. select CPU_HAS_ADDRESS_SPACES
  75. help
  76. If you anticipate running this kernel on a computer with a MC68LC040
  77. or MC68040 processor, say Y. Otherwise, say N. Note that an
  78. MC68EC040 will not work, as it does not include an MMU (Memory
  79. Management Unit).
  80. config M68060
  81. bool "68060 support"
  82. depends on MMU && !MMU_SUN3
  83. select FPU
  84. select CPU_HAS_ADDRESS_SPACES
  85. help
  86. If you anticipate running this kernel on a computer with a MC68060
  87. processor, say Y. Otherwise, say N.
  88. config M68328
  89. bool
  90. depends on !MMU
  91. select M68000
  92. help
  93. Motorola 68328 processor support.
  94. config M68EZ328
  95. bool
  96. depends on !MMU
  97. select M68000
  98. help
  99. Motorola 68EX328 processor support.
  100. config M68VZ328
  101. bool
  102. depends on !MMU
  103. select M68000
  104. help
  105. Motorola 68VZ328 processor support.
  106. endif # M68KCLASSIC
  107. if COLDFIRE
  108. choice
  109. prompt "ColdFire SoC type"
  110. default M520x
  111. help
  112. Select the type of ColdFire System-on-Chip (SoC) that you want
  113. to build for.
  114. config M5206
  115. bool "MCF5206"
  116. depends on !MMU
  117. select COLDFIRE_SW_A7
  118. select COLDFIRE_TIMERS
  119. select HAVE_MBAR
  120. select CPU_NO_EFFICIENT_FFS
  121. help
  122. Motorola ColdFire 5206 processor support.
  123. config M5206e
  124. bool "MCF5206e"
  125. depends on !MMU
  126. select COLDFIRE_SW_A7
  127. select COLDFIRE_TIMERS
  128. select HAVE_MBAR
  129. select CPU_NO_EFFICIENT_FFS
  130. help
  131. Motorola ColdFire 5206e processor support.
  132. config M520x
  133. bool "MCF520x"
  134. depends on !MMU
  135. select COLDFIRE_PIT_TIMER
  136. select HAVE_CACHE_SPLIT
  137. help
  138. Freescale Coldfire 5207/5208 processor support.
  139. config M523x
  140. bool "MCF523x"
  141. depends on !MMU
  142. select COLDFIRE_PIT_TIMER
  143. select HAVE_CACHE_SPLIT
  144. select HAVE_IPSBAR
  145. help
  146. Freescale Coldfire 5230/1/2/4/5 processor support
  147. config M5249
  148. bool "MCF5249"
  149. depends on !MMU
  150. select COLDFIRE_SW_A7
  151. select COLDFIRE_TIMERS
  152. select HAVE_MBAR
  153. select CPU_NO_EFFICIENT_FFS
  154. help
  155. Motorola ColdFire 5249 processor support.
  156. config M525x
  157. bool "MCF525x"
  158. depends on !MMU
  159. select COLDFIRE_SW_A7
  160. select COLDFIRE_TIMERS
  161. select HAVE_MBAR
  162. select CPU_NO_EFFICIENT_FFS
  163. help
  164. Freescale (Motorola) Coldfire 5251/5253 processor support.
  165. config M5271
  166. bool "MCF5271"
  167. depends on !MMU
  168. select COLDFIRE_PIT_TIMER
  169. select M527x
  170. select HAVE_CACHE_SPLIT
  171. select HAVE_IPSBAR
  172. help
  173. Freescale (Motorola) ColdFire 5270/5271 processor support.
  174. config M5272
  175. bool "MCF5272"
  176. depends on !MMU
  177. select COLDFIRE_SW_A7
  178. select COLDFIRE_TIMERS
  179. select HAVE_MBAR
  180. select CPU_NO_EFFICIENT_FFS
  181. help
  182. Motorola ColdFire 5272 processor support.
  183. config M5275
  184. bool "MCF5275"
  185. depends on !MMU
  186. select COLDFIRE_PIT_TIMER
  187. select M527x
  188. select HAVE_CACHE_SPLIT
  189. select HAVE_IPSBAR
  190. help
  191. Freescale (Motorola) ColdFire 5274/5275 processor support.
  192. config M528x
  193. bool "MCF528x"
  194. depends on !MMU
  195. select COLDFIRE_PIT_TIMER
  196. select HAVE_CACHE_SPLIT
  197. select HAVE_IPSBAR
  198. help
  199. Motorola ColdFire 5280/5282 processor support.
  200. config M5307
  201. bool "MCF5307"
  202. depends on !MMU
  203. select COLDFIRE_TIMERS
  204. select COLDFIRE_SW_A7
  205. select HAVE_CACHE_CB
  206. select HAVE_MBAR
  207. select CPU_NO_EFFICIENT_FFS
  208. help
  209. Motorola ColdFire 5307 processor support.
  210. config M532x
  211. bool "MCF532x"
  212. depends on !MMU
  213. select COLDFIRE_TIMERS
  214. select M53xx
  215. select HAVE_CACHE_CB
  216. help
  217. Freescale (Motorola) ColdFire 532x processor support.
  218. config M537x
  219. bool "MCF537x"
  220. depends on !MMU
  221. select COLDFIRE_TIMERS
  222. select M53xx
  223. select HAVE_CACHE_CB
  224. help
  225. Freescale ColdFire 537x processor support.
  226. config M5407
  227. bool "MCF5407"
  228. depends on !MMU
  229. select COLDFIRE_SW_A7
  230. select COLDFIRE_TIMERS
  231. select HAVE_CACHE_CB
  232. select HAVE_MBAR
  233. select CPU_NO_EFFICIENT_FFS
  234. help
  235. Motorola ColdFire 5407 processor support.
  236. config M547x
  237. bool "MCF547x"
  238. select M54xx
  239. select COLDFIRE_SLTIMERS
  240. select MMU_COLDFIRE if MMU
  241. select FPU if MMU
  242. select HAVE_CACHE_CB
  243. select HAVE_MBAR
  244. select CPU_NO_EFFICIENT_FFS
  245. help
  246. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  247. config M548x
  248. bool "MCF548x"
  249. select COLDFIRE_SLTIMERS
  250. select MMU_COLDFIRE if MMU
  251. select FPU if MMU
  252. select M54xx
  253. select HAVE_CACHE_CB
  254. select HAVE_MBAR
  255. select CPU_NO_EFFICIENT_FFS
  256. help
  257. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  258. config M5441x
  259. bool "MCF5441x"
  260. select COLDFIRE_PIT_TIMER
  261. select MMU_COLDFIRE if MMU
  262. select HAVE_CACHE_CB
  263. help
  264. Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
  265. endchoice
  266. config M527x
  267. bool
  268. config M53xx
  269. bool
  270. config M54xx
  271. select HAVE_PCI
  272. bool
  273. config COLDFIRE_PIT_TIMER
  274. bool
  275. config COLDFIRE_TIMERS
  276. bool
  277. select LEGACY_TIMER_TICK
  278. config COLDFIRE_SLTIMERS
  279. bool
  280. select LEGACY_TIMER_TICK
  281. endif # COLDFIRE
  282. comment "Processor Specific Options"
  283. config M68KFPU_EMU
  284. bool "Math emulation support"
  285. depends on M68KCLASSIC && FPU
  286. help
  287. At some point in the future, this will cause floating-point math
  288. instructions to be emulated by the kernel on machines that lack a
  289. floating-point math coprocessor. Thrill-seekers and chronically
  290. sleep-deprived psychotic hacker types can say Y now, everyone else
  291. should probably wait a while.
  292. config M68KFPU_EMU_EXTRAPREC
  293. bool "Math emulation extra precision"
  294. depends on M68KFPU_EMU
  295. help
  296. The fpu uses normally a few bit more during calculations for
  297. correct rounding, the emulator can (often) do the same but this
  298. extra calculation can cost quite some time, so you can disable
  299. it here. The emulator will then "only" calculate with a 64 bit
  300. mantissa and round slightly incorrect, what is more than enough
  301. for normal usage.
  302. config M68KFPU_EMU_ONLY
  303. bool "Math emulation only kernel"
  304. depends on M68KFPU_EMU
  305. help
  306. This option prevents any floating-point instructions from being
  307. compiled into the kernel, thereby the kernel doesn't save any
  308. floating point context anymore during task switches, so this
  309. kernel will only be usable on machines without a floating-point
  310. math coprocessor. This makes the kernel a bit faster as no tests
  311. needs to be executed whether a floating-point instruction in the
  312. kernel should be executed or not.
  313. config ADVANCED
  314. bool "Advanced configuration options"
  315. depends on MMU
  316. help
  317. This gives you access to some advanced options for the CPU. The
  318. defaults should be fine for most users, but these options may make
  319. it possible for you to improve performance somewhat if you know what
  320. you are doing.
  321. Note that the answer to this question won't directly affect the
  322. kernel: saying N will just cause the configurator to skip all
  323. the questions about these options.
  324. Most users should say N to this question.
  325. config RMW_INSNS
  326. bool "Use read-modify-write instructions"
  327. depends on ADVANCED && !CPU_HAS_NO_CAS
  328. help
  329. This allows to use certain instructions that work with indivisible
  330. read-modify-write bus cycles. While this is faster than the
  331. workaround of disabling interrupts, it can conflict with DMA
  332. ( = direct memory access) on many Amiga systems, and it is also said
  333. to destabilize other machines. It is very likely that this will
  334. cause serious problems on any Amiga or Atari Medusa if set. The only
  335. configuration where it should work are 68030-based Ataris, where it
  336. apparently improves performance. But you've been warned! Unless you
  337. really know what you are doing, say N. Try Y only if you're quite
  338. adventurous.
  339. config SINGLE_MEMORY_CHUNK
  340. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  341. depends on MMU
  342. default y if SUN3 || MMU_COLDFIRE
  343. help
  344. Ignore all but the first contiguous chunk of physical memory for VM
  345. purposes. This will save a few bytes kernel size and may speed up
  346. some operations.
  347. When this option os set to N, you may want to lower "Maximum zone
  348. order" to save memory that could be wasted for unused memory map.
  349. Say N if not sure.
  350. config ARCH_FORCE_MAX_ORDER
  351. int "Order of maximal physically contiguous allocations" if ADVANCED
  352. depends on !SINGLE_MEMORY_CHUNK
  353. default "10"
  354. help
  355. The kernel page allocator limits the size of maximal physically
  356. contiguous allocations. The limit is called MAX_PAGE_ORDER and it
  357. defines the maximal power of two of number of pages that can be
  358. allocated as a single contiguous block. This option allows
  359. overriding the default setting when ability to allocate very
  360. large blocks of physically contiguous memory is required.
  361. For systems that have holes in their physical address space this
  362. value also defines the minimal size of the hole that allows
  363. freeing unused memory map.
  364. Don't change if unsure.
  365. config 060_WRITETHROUGH
  366. bool "Use write-through caching for 68060 supervisor accesses"
  367. depends on ADVANCED && M68060
  368. help
  369. The 68060 generally uses copyback caching of recently accessed data.
  370. Copyback caching means that memory writes will be held in an on-chip
  371. cache and only written back to memory some time later. Saying Y
  372. here will force supervisor (kernel) accesses to use writethrough
  373. caching. Writethrough caching means that data is written to memory
  374. straight away, so that cache and memory data always agree.
  375. Writethrough caching is less efficient, but is needed for some
  376. drivers on 68060 based systems where the 68060 bus snooping signal
  377. is hardwired on. The 53c710 SCSI driver is known to suffer from
  378. this problem.
  379. config M68K_L2_CACHE
  380. bool
  381. depends on MAC
  382. default y
  383. config CPU_HAS_NO_BITFIELDS
  384. bool
  385. config CPU_HAS_NO_CAS
  386. bool
  387. config CPU_HAS_NO_MULDIV64
  388. bool
  389. config CPU_HAS_NO_UNALIGNED
  390. bool
  391. config CPU_HAS_ADDRESS_SPACES
  392. bool
  393. select ALTERNATE_USER_ADDRESS_SPACE
  394. config FPU
  395. bool
  396. config COLDFIRE_SW_A7
  397. bool
  398. config HAVE_CACHE_SPLIT
  399. bool
  400. config HAVE_CACHE_CB
  401. bool
  402. config HAVE_MBAR
  403. bool
  404. config HAVE_IPSBAR
  405. bool
  406. config CLOCK_FREQ
  407. int "Set the core clock frequency"
  408. default "25000000" if M5206
  409. default "54000000" if M5206e
  410. default "166666666" if M520x
  411. default "140000000" if M5249
  412. default "150000000" if M527x || M523x
  413. default "90000000" if M5307
  414. default "50000000" if M5407
  415. default "266000000" if M54xx
  416. default "66666666"
  417. depends on COLDFIRE
  418. help
  419. Define the CPU clock frequency in use. This is the core clock
  420. frequency, it may or may not be the same as the external clock
  421. crystal fitted to your board. Some processors have an internal
  422. PLL and can have their frequency programmed at run time, others
  423. use internal dividers. In general the kernel won't setup a PLL
  424. if it is fitted (there are some exceptions). This value will be
  425. specific to the exact CPU that you are using.
  426. config OLDMASK
  427. bool "Old mask 5307 (1H55J) silicon"
  428. depends on M5307
  429. help
  430. Build support for the older revision ColdFire 5307 silicon.
  431. Specifically this is the 1H55J mask revision.
  432. if HAVE_CACHE_SPLIT
  433. choice
  434. prompt "Split Cache Configuration"
  435. default CACHE_I
  436. config CACHE_I
  437. bool "Instruction"
  438. help
  439. Use all of the ColdFire CPU cache memory as an instruction cache.
  440. config CACHE_D
  441. bool "Data"
  442. help
  443. Use all of the ColdFire CPU cache memory as a data cache.
  444. config CACHE_BOTH
  445. bool "Both"
  446. help
  447. Split the ColdFire CPU cache, and use half as an instruction cache
  448. and half as a data cache.
  449. endchoice
  450. endif # HAVE_CACHE_SPLIT
  451. if HAVE_CACHE_CB
  452. choice
  453. prompt "Data cache mode"
  454. default CACHE_WRITETHRU
  455. config CACHE_WRITETHRU
  456. bool "Write-through"
  457. help
  458. The ColdFire CPU cache is set into Write-through mode.
  459. config CACHE_COPYBACK
  460. bool "Copy-back"
  461. help
  462. The ColdFire CPU cache is set into Copy-back mode.
  463. endchoice
  464. endif # HAVE_CACHE_CB
  465. # Coldfire cores that do not have a data cache configured can do coherent DMA.
  466. config COLDFIRE_COHERENT_DMA
  467. bool
  468. default y
  469. depends on COLDFIRE
  470. depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH
  471. config M68K_NONCOHERENT_DMA
  472. bool
  473. default y
  474. depends on HAS_DMA && !COLDFIRE_COHERENT_DMA