config.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/init.h>
  3. #include <linux/types.h>
  4. #include <linux/kernel.h>
  5. #include <linux/mm.h>
  6. #include <linux/tty.h>
  7. #include <linux/rtc.h>
  8. #include <linux/vt_kern.h>
  9. #include <linux/interrupt.h>
  10. #include <asm/setup.h>
  11. #include <asm/bootinfo.h>
  12. #include <asm/bootinfo-apollo.h>
  13. #include <asm/byteorder.h>
  14. #include <asm/apollohw.h>
  15. #include <asm/irq.h>
  16. #include <asm/machdep.h>
  17. #include <asm/config.h>
  18. #include "apollo.h"
  19. u_long sio01_physaddr;
  20. u_long sio23_physaddr;
  21. u_long rtc_physaddr;
  22. u_long pica_physaddr;
  23. u_long picb_physaddr;
  24. u_long cpuctrl_physaddr;
  25. u_long timer_physaddr;
  26. u_long apollo_model;
  27. extern void dn_sched_init(void);
  28. extern int dn_dummy_hwclk(int, struct rtc_time *);
  29. static void dn_dummy_reset(void);
  30. #ifdef CONFIG_HEARTBEAT
  31. static void dn_heartbeat(int on);
  32. #endif
  33. static irqreturn_t dn_timer_int(int irq,void *);
  34. static void dn_get_model(char *model);
  35. static const char *apollo_models[] = {
  36. [APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
  37. [APOLLO_DN3010-APOLLO_DN3000] = "DN3010 (Otter)",
  38. [APOLLO_DN3500-APOLLO_DN3000] = "DN3500 (Cougar II)",
  39. [APOLLO_DN4000-APOLLO_DN3000] = "DN4000 (Mink)",
  40. [APOLLO_DN4500-APOLLO_DN3000] = "DN4500 (Roadrunner)"
  41. };
  42. int __init apollo_parse_bootinfo(const struct bi_record *record)
  43. {
  44. int unknown = 0;
  45. const void *data = record->data;
  46. switch (be16_to_cpu(record->tag)) {
  47. case BI_APOLLO_MODEL:
  48. apollo_model = be32_to_cpup(data);
  49. break;
  50. default:
  51. unknown=1;
  52. }
  53. return unknown;
  54. }
  55. static void __init dn_setup_model(void)
  56. {
  57. pr_info("Apollo hardware found: [%s]\n",
  58. apollo_models[apollo_model - APOLLO_DN3000]);
  59. switch(apollo_model) {
  60. case APOLLO_UNKNOWN:
  61. panic("Unknown apollo model");
  62. break;
  63. case APOLLO_DN3000:
  64. case APOLLO_DN3010:
  65. sio01_physaddr=SAU8_SIO01_PHYSADDR;
  66. rtc_physaddr=SAU8_RTC_PHYSADDR;
  67. pica_physaddr=SAU8_PICA;
  68. picb_physaddr=SAU8_PICB;
  69. cpuctrl_physaddr=SAU8_CPUCTRL;
  70. timer_physaddr=SAU8_TIMER;
  71. break;
  72. case APOLLO_DN4000:
  73. sio01_physaddr=SAU7_SIO01_PHYSADDR;
  74. sio23_physaddr=SAU7_SIO23_PHYSADDR;
  75. rtc_physaddr=SAU7_RTC_PHYSADDR;
  76. pica_physaddr=SAU7_PICA;
  77. picb_physaddr=SAU7_PICB;
  78. cpuctrl_physaddr=SAU7_CPUCTRL;
  79. timer_physaddr=SAU7_TIMER;
  80. break;
  81. case APOLLO_DN4500:
  82. panic("Apollo model not yet supported");
  83. break;
  84. case APOLLO_DN3500:
  85. sio01_physaddr=SAU7_SIO01_PHYSADDR;
  86. sio23_physaddr=SAU7_SIO23_PHYSADDR;
  87. rtc_physaddr=SAU7_RTC_PHYSADDR;
  88. pica_physaddr=SAU7_PICA;
  89. picb_physaddr=SAU7_PICB;
  90. cpuctrl_physaddr=SAU7_CPUCTRL;
  91. timer_physaddr=SAU7_TIMER;
  92. break;
  93. default:
  94. panic("Undefined apollo model");
  95. break;
  96. }
  97. }
  98. static void dn_serial_print(const char *str)
  99. {
  100. while (*str) {
  101. if (*str == '\n') {
  102. sio01.rhrb_thrb = (unsigned char)'\r';
  103. while (!(sio01.srb_csrb & 0x4))
  104. ;
  105. }
  106. sio01.rhrb_thrb = (unsigned char)*str++;
  107. while (!(sio01.srb_csrb & 0x4))
  108. ;
  109. }
  110. }
  111. void __init config_apollo(void)
  112. {
  113. int i;
  114. dn_setup_model();
  115. mach_sched_init=dn_sched_init; /* */
  116. mach_init_IRQ=dn_init_IRQ;
  117. mach_hwclk = dn_dummy_hwclk; /* */
  118. mach_reset = dn_dummy_reset; /* */
  119. #ifdef CONFIG_HEARTBEAT
  120. mach_heartbeat = dn_heartbeat;
  121. #endif
  122. mach_get_model = dn_get_model;
  123. cpuctrl=0xaa00;
  124. /* clear DMA translation table */
  125. for(i=0;i<0x400;i++)
  126. addr_xlat_map[i]=0;
  127. }
  128. irqreturn_t dn_timer_int(int irq, void *dev_id)
  129. {
  130. unsigned char *at = (unsigned char *)apollo_timer;
  131. legacy_timer_tick(1);
  132. timer_heartbeat();
  133. READ_ONCE(*(at + 3));
  134. READ_ONCE(*(at + 5));
  135. return IRQ_HANDLED;
  136. }
  137. void dn_sched_init(void)
  138. {
  139. /* program timer 1 */
  140. *(volatile unsigned char *)(apollo_timer + 3) = 0x01;
  141. *(volatile unsigned char *)(apollo_timer + 1) = 0x40;
  142. *(volatile unsigned char *)(apollo_timer + 5) = 0x09;
  143. *(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
  144. /* enable IRQ of PIC B */
  145. *(volatile unsigned char *)(pica+1)&=(~8);
  146. #if 0
  147. pr_info("*(0x10803) %02x\n",
  148. *(volatile unsigned char *)(apollo_timer + 0x3));
  149. pr_info("*(0x10803) %02x\n",
  150. *(volatile unsigned char *)(apollo_timer + 0x3));
  151. #endif
  152. if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", NULL))
  153. pr_err("Couldn't register timer interrupt\n");
  154. }
  155. int dn_dummy_hwclk(int op, struct rtc_time *t) {
  156. if(!op) { /* read */
  157. t->tm_sec=rtc->second;
  158. t->tm_min=rtc->minute;
  159. t->tm_hour=rtc->hours;
  160. t->tm_mday=rtc->day_of_month;
  161. t->tm_wday=rtc->day_of_week;
  162. t->tm_mon = rtc->month - 1;
  163. t->tm_year=rtc->year;
  164. if (t->tm_year < 70)
  165. t->tm_year += 100;
  166. } else {
  167. rtc->second=t->tm_sec;
  168. rtc->minute=t->tm_min;
  169. rtc->hours=t->tm_hour;
  170. rtc->day_of_month=t->tm_mday;
  171. if(t->tm_wday!=-1)
  172. rtc->day_of_week=t->tm_wday;
  173. rtc->month = t->tm_mon + 1;
  174. rtc->year = t->tm_year % 100;
  175. }
  176. return 0;
  177. }
  178. static void dn_dummy_reset(void)
  179. {
  180. dn_serial_print("The end !\n");
  181. for(;;);
  182. }
  183. static void dn_get_model(char *model)
  184. {
  185. strcpy(model, "Apollo ");
  186. if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
  187. strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
  188. }
  189. #ifdef CONFIG_HEARTBEAT
  190. static int dn_cpuctrl=0xff00;
  191. static void dn_heartbeat(int on) {
  192. if(on) {
  193. dn_cpuctrl&=~0x100;
  194. cpuctrl=dn_cpuctrl;
  195. }
  196. else {
  197. dn_cpuctrl&=~0x100;
  198. dn_cpuctrl|=0x100;
  199. cpuctrl=dn_cpuctrl;
  200. }
  201. }
  202. #endif