smp.c 6.8 KB

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  1. /*
  2. * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
  3. * Copyright (C) 2017 Stafford Horne <shorne@gmail.com>
  4. *
  5. * Based on arm64 and arc implementations
  6. * Copyright (C) 2013 ARM Ltd.
  7. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  8. *
  9. * This file is licensed under the terms of the GNU General Public License
  10. * version 2. This program is licensed "as is" without any warranty of any
  11. * kind, whether express or implied.
  12. */
  13. #include <linux/smp.h>
  14. #include <linux/cpu.h>
  15. #include <linux/sched.h>
  16. #include <linux/sched/mm.h>
  17. #include <linux/irq.h>
  18. #include <linux/of.h>
  19. #include <asm/cpuinfo.h>
  20. #include <asm/mmu_context.h>
  21. #include <asm/tlbflush.h>
  22. #include <asm/cacheflush.h>
  23. #include <asm/time.h>
  24. asmlinkage __init void secondary_start_kernel(void);
  25. static void (*smp_cross_call)(const struct cpumask *, unsigned int);
  26. unsigned long secondary_release = -1;
  27. struct thread_info *secondary_thread_info;
  28. enum ipi_msg_type {
  29. IPI_WAKEUP,
  30. IPI_RESCHEDULE,
  31. IPI_CALL_FUNC,
  32. IPI_CALL_FUNC_SINGLE,
  33. };
  34. static DEFINE_SPINLOCK(boot_lock);
  35. static void boot_secondary(unsigned int cpu, struct task_struct *idle)
  36. {
  37. /*
  38. * set synchronisation state between this boot processor
  39. * and the secondary one
  40. */
  41. spin_lock(&boot_lock);
  42. secondary_release = cpu;
  43. smp_cross_call(cpumask_of(cpu), IPI_WAKEUP);
  44. /*
  45. * now the secondary core is starting up let it run its
  46. * calibrations, then wait for it to finish
  47. */
  48. spin_unlock(&boot_lock);
  49. }
  50. void __init smp_init_cpus(void)
  51. {
  52. struct device_node *cpu;
  53. u32 cpu_id;
  54. for_each_of_cpu_node(cpu) {
  55. cpu_id = of_get_cpu_hwid(cpu, 0);
  56. if (cpu_id < NR_CPUS)
  57. set_cpu_possible(cpu_id, true);
  58. }
  59. }
  60. void __init smp_prepare_cpus(unsigned int max_cpus)
  61. {
  62. unsigned int cpu;
  63. /*
  64. * Initialise the present map, which describes the set of CPUs
  65. * actually populated at the present time.
  66. */
  67. for_each_possible_cpu(cpu) {
  68. if (cpu < max_cpus)
  69. set_cpu_present(cpu, true);
  70. }
  71. }
  72. void __init smp_cpus_done(unsigned int max_cpus)
  73. {
  74. }
  75. static DECLARE_COMPLETION(cpu_running);
  76. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  77. {
  78. if (smp_cross_call == NULL) {
  79. pr_warn("CPU%u: failed to start, IPI controller missing",
  80. cpu);
  81. return -EIO;
  82. }
  83. secondary_thread_info = task_thread_info(idle);
  84. current_pgd[cpu] = init_mm.pgd;
  85. boot_secondary(cpu, idle);
  86. if (!wait_for_completion_timeout(&cpu_running,
  87. msecs_to_jiffies(1000))) {
  88. pr_crit("CPU%u: failed to start\n", cpu);
  89. return -EIO;
  90. }
  91. synchronise_count_master(cpu);
  92. return 0;
  93. }
  94. asmlinkage __init void secondary_start_kernel(void)
  95. {
  96. struct mm_struct *mm = &init_mm;
  97. unsigned int cpu = smp_processor_id();
  98. /*
  99. * All kernel threads share the same mm context; grab a
  100. * reference and switch to it.
  101. */
  102. mmgrab(mm);
  103. current->active_mm = mm;
  104. cpumask_set_cpu(cpu, mm_cpumask(mm));
  105. pr_info("CPU%u: Booted secondary processor\n", cpu);
  106. setup_cpuinfo();
  107. openrisc_clockevent_init();
  108. notify_cpu_starting(cpu);
  109. /*
  110. * OK, now it's safe to let the boot CPU continue
  111. */
  112. complete(&cpu_running);
  113. synchronise_count_slave(cpu);
  114. set_cpu_online(cpu, true);
  115. local_irq_enable();
  116. /*
  117. * OK, it's off to the idle thread for us
  118. */
  119. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  120. }
  121. void handle_IPI(unsigned int ipi_msg)
  122. {
  123. unsigned int cpu = smp_processor_id();
  124. switch (ipi_msg) {
  125. case IPI_WAKEUP:
  126. break;
  127. case IPI_RESCHEDULE:
  128. scheduler_ipi();
  129. break;
  130. case IPI_CALL_FUNC:
  131. generic_smp_call_function_interrupt();
  132. break;
  133. case IPI_CALL_FUNC_SINGLE:
  134. generic_smp_call_function_single_interrupt();
  135. break;
  136. default:
  137. WARN(1, "CPU%u: Unknown IPI message 0x%x\n", cpu, ipi_msg);
  138. break;
  139. }
  140. }
  141. void arch_smp_send_reschedule(int cpu)
  142. {
  143. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  144. }
  145. static void stop_this_cpu(void *dummy)
  146. {
  147. /* Remove this CPU */
  148. set_cpu_online(smp_processor_id(), false);
  149. local_irq_disable();
  150. /* CPU Doze */
  151. if (mfspr(SPR_UPR) & SPR_UPR_PMP)
  152. mtspr(SPR_PMR, mfspr(SPR_PMR) | SPR_PMR_DME);
  153. /* If that didn't work, infinite loop */
  154. while (1)
  155. ;
  156. }
  157. void smp_send_stop(void)
  158. {
  159. smp_call_function(stop_this_cpu, NULL, 0);
  160. }
  161. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  162. {
  163. smp_cross_call = fn;
  164. }
  165. void arch_send_call_function_single_ipi(int cpu)
  166. {
  167. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  168. }
  169. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  170. {
  171. smp_cross_call(mask, IPI_CALL_FUNC);
  172. }
  173. /* TLB flush operations - Performed on each CPU*/
  174. static inline void ipi_flush_tlb_all(void *ignored)
  175. {
  176. local_flush_tlb_all();
  177. }
  178. static inline void ipi_flush_tlb_mm(void *info)
  179. {
  180. struct mm_struct *mm = (struct mm_struct *)info;
  181. local_flush_tlb_mm(mm);
  182. }
  183. static void smp_flush_tlb_mm(struct cpumask *cmask, struct mm_struct *mm)
  184. {
  185. unsigned int cpuid;
  186. if (cpumask_empty(cmask))
  187. return;
  188. cpuid = get_cpu();
  189. if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) {
  190. /* local cpu is the only cpu present in cpumask */
  191. local_flush_tlb_mm(mm);
  192. } else {
  193. on_each_cpu_mask(cmask, ipi_flush_tlb_mm, mm, 1);
  194. }
  195. put_cpu();
  196. }
  197. struct flush_tlb_data {
  198. unsigned long addr1;
  199. unsigned long addr2;
  200. };
  201. static inline void ipi_flush_tlb_page(void *info)
  202. {
  203. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  204. local_flush_tlb_page(NULL, fd->addr1);
  205. }
  206. static inline void ipi_flush_tlb_range(void *info)
  207. {
  208. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  209. local_flush_tlb_range(NULL, fd->addr1, fd->addr2);
  210. }
  211. static void smp_flush_tlb_range(const struct cpumask *cmask, unsigned long start,
  212. unsigned long end)
  213. {
  214. unsigned int cpuid;
  215. if (cpumask_empty(cmask))
  216. return;
  217. cpuid = get_cpu();
  218. if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) {
  219. /* local cpu is the only cpu present in cpumask */
  220. if ((end - start) <= PAGE_SIZE)
  221. local_flush_tlb_page(NULL, start);
  222. else
  223. local_flush_tlb_range(NULL, start, end);
  224. } else {
  225. struct flush_tlb_data fd;
  226. fd.addr1 = start;
  227. fd.addr2 = end;
  228. if ((end - start) <= PAGE_SIZE)
  229. on_each_cpu_mask(cmask, ipi_flush_tlb_page, &fd, 1);
  230. else
  231. on_each_cpu_mask(cmask, ipi_flush_tlb_range, &fd, 1);
  232. }
  233. put_cpu();
  234. }
  235. void flush_tlb_all(void)
  236. {
  237. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  238. }
  239. void flush_tlb_mm(struct mm_struct *mm)
  240. {
  241. smp_flush_tlb_mm(mm_cpumask(mm), mm);
  242. }
  243. void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
  244. {
  245. smp_flush_tlb_range(mm_cpumask(vma->vm_mm), uaddr, uaddr + PAGE_SIZE);
  246. }
  247. void flush_tlb_range(struct vm_area_struct *vma,
  248. unsigned long start, unsigned long end)
  249. {
  250. const struct cpumask *cmask = vma ? mm_cpumask(vma->vm_mm)
  251. : cpu_online_mask;
  252. smp_flush_tlb_range(cmask, start, end);
  253. }
  254. /* Instruction cache invalidate - performed on each cpu */
  255. static void ipi_icache_page_inv(void *arg)
  256. {
  257. struct page *page = arg;
  258. local_icache_page_inv(page);
  259. }
  260. void smp_icache_page_inv(struct page *page)
  261. {
  262. on_each_cpu(ipi_icache_page_inv, page, 1);
  263. }
  264. EXPORT_SYMBOL(smp_icache_page_inv);