x2apic_cluster.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/cpuhotplug.h>
  3. #include <linux/cpumask.h>
  4. #include <linux/slab.h>
  5. #include <linux/mm.h>
  6. #include <asm/apic.h>
  7. #include "local.h"
  8. #define apic_cluster(apicid) ((apicid) >> 4)
  9. /*
  10. * __x2apic_send_IPI_mask() possibly needs to read
  11. * x86_cpu_to_logical_apicid for all online cpus in a sequential way.
  12. * Using per cpu variable would cost one cache line per cpu.
  13. */
  14. static u32 *x86_cpu_to_logical_apicid __read_mostly;
  15. static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
  16. static DEFINE_PER_CPU_READ_MOSTLY(struct cpumask *, cluster_masks);
  17. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  18. {
  19. return x2apic_enabled();
  20. }
  21. static void x2apic_send_IPI(int cpu, int vector)
  22. {
  23. u32 dest = x86_cpu_to_logical_apicid[cpu];
  24. /* x2apic MSRs are special and need a special fence: */
  25. weak_wrmsr_fence();
  26. __x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
  27. }
  28. static void
  29. __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
  30. {
  31. unsigned int cpu, clustercpu;
  32. struct cpumask *tmpmsk;
  33. unsigned long flags;
  34. u32 dest;
  35. /* x2apic MSRs are special and need a special fence: */
  36. weak_wrmsr_fence();
  37. local_irq_save(flags);
  38. tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
  39. cpumask_copy(tmpmsk, mask);
  40. /* If IPI should not be sent to self, clear current CPU */
  41. if (apic_dest != APIC_DEST_ALLINC)
  42. __cpumask_clear_cpu(smp_processor_id(), tmpmsk);
  43. /* Collapse cpus in a cluster so a single IPI per cluster is sent */
  44. for_each_cpu(cpu, tmpmsk) {
  45. struct cpumask *cmsk = per_cpu(cluster_masks, cpu);
  46. dest = 0;
  47. for_each_cpu_and(clustercpu, tmpmsk, cmsk)
  48. dest |= x86_cpu_to_logical_apicid[clustercpu];
  49. if (!dest)
  50. continue;
  51. __x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
  52. /* Remove cluster CPUs from tmpmask */
  53. cpumask_andnot(tmpmsk, tmpmsk, cmsk);
  54. }
  55. local_irq_restore(flags);
  56. }
  57. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  58. {
  59. __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
  60. }
  61. static void
  62. x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
  63. {
  64. __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
  65. }
  66. static u32 x2apic_calc_apicid(unsigned int cpu)
  67. {
  68. return x86_cpu_to_logical_apicid[cpu];
  69. }
  70. static void init_x2apic_ldr(void)
  71. {
  72. struct cpumask *cmsk = this_cpu_read(cluster_masks);
  73. BUG_ON(!cmsk);
  74. cpumask_set_cpu(smp_processor_id(), cmsk);
  75. }
  76. /*
  77. * As an optimisation during boot, set the cluster_mask for all present
  78. * CPUs at once, to prevent each of them having to iterate over the others
  79. * to find the existing cluster_mask.
  80. */
  81. static void prefill_clustermask(struct cpumask *cmsk, unsigned int cpu, u32 cluster)
  82. {
  83. int cpu_i;
  84. for_each_present_cpu(cpu_i) {
  85. struct cpumask **cpu_cmsk = &per_cpu(cluster_masks, cpu_i);
  86. u32 apicid = apic->cpu_present_to_apicid(cpu_i);
  87. if (apicid == BAD_APICID || cpu_i == cpu || apic_cluster(apicid) != cluster)
  88. continue;
  89. if (WARN_ON_ONCE(*cpu_cmsk == cmsk))
  90. continue;
  91. BUG_ON(*cpu_cmsk);
  92. *cpu_cmsk = cmsk;
  93. }
  94. }
  95. static int alloc_clustermask(unsigned int cpu, u32 cluster, int node)
  96. {
  97. struct cpumask *cmsk = NULL;
  98. unsigned int cpu_i;
  99. /*
  100. * At boot time, the CPU present mask is stable. The cluster mask is
  101. * allocated for the first CPU in the cluster and propagated to all
  102. * present siblings in the cluster. If the cluster mask is already set
  103. * on entry to this function for a given CPU, there is nothing to do.
  104. */
  105. if (per_cpu(cluster_masks, cpu))
  106. return 0;
  107. if (system_state < SYSTEM_RUNNING)
  108. goto alloc;
  109. /*
  110. * On post boot hotplug for a CPU which was not present at boot time,
  111. * iterate over all possible CPUs (even those which are not present
  112. * any more) to find any existing cluster mask.
  113. */
  114. for_each_possible_cpu(cpu_i) {
  115. u32 apicid = apic->cpu_present_to_apicid(cpu_i);
  116. if (apicid != BAD_APICID && apic_cluster(apicid) == cluster) {
  117. cmsk = per_cpu(cluster_masks, cpu_i);
  118. /*
  119. * If the cluster is already initialized, just store
  120. * the mask and return. There's no need to propagate.
  121. */
  122. if (cmsk) {
  123. per_cpu(cluster_masks, cpu) = cmsk;
  124. return 0;
  125. }
  126. }
  127. }
  128. /*
  129. * No CPU in the cluster has ever been initialized, so fall through to
  130. * the boot time code which will also populate the cluster mask for any
  131. * other CPU in the cluster which is (now) present.
  132. */
  133. alloc:
  134. cmsk = kzalloc_node(sizeof(*cmsk), GFP_KERNEL, node);
  135. if (!cmsk)
  136. return -ENOMEM;
  137. per_cpu(cluster_masks, cpu) = cmsk;
  138. prefill_clustermask(cmsk, cpu, cluster);
  139. return 0;
  140. }
  141. static int x2apic_prepare_cpu(unsigned int cpu)
  142. {
  143. u32 phys_apicid = apic->cpu_present_to_apicid(cpu);
  144. u32 cluster = apic_cluster(phys_apicid);
  145. u32 logical_apicid = (cluster << 16) | (1 << (phys_apicid & 0xf));
  146. int node = cpu_to_node(cpu);
  147. x86_cpu_to_logical_apicid[cpu] = logical_apicid;
  148. if (alloc_clustermask(cpu, cluster, node) < 0)
  149. return -ENOMEM;
  150. if (!zalloc_cpumask_var_node(&per_cpu(ipi_mask, cpu), GFP_KERNEL, node))
  151. return -ENOMEM;
  152. return 0;
  153. }
  154. static int x2apic_dead_cpu(unsigned int dead_cpu)
  155. {
  156. struct cpumask *cmsk = per_cpu(cluster_masks, dead_cpu);
  157. if (cmsk)
  158. cpumask_clear_cpu(dead_cpu, cmsk);
  159. free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
  160. return 0;
  161. }
  162. static int x2apic_cluster_probe(void)
  163. {
  164. u32 slots;
  165. if (!x2apic_mode)
  166. return 0;
  167. slots = max_t(u32, L1_CACHE_BYTES/sizeof(u32), nr_cpu_ids);
  168. x86_cpu_to_logical_apicid = kcalloc(slots, sizeof(u32), GFP_KERNEL);
  169. if (!x86_cpu_to_logical_apicid)
  170. return 0;
  171. if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
  172. x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
  173. pr_err("Failed to register X2APIC_PREPARE\n");
  174. kfree(x86_cpu_to_logical_apicid);
  175. x86_cpu_to_logical_apicid = NULL;
  176. return 0;
  177. }
  178. init_x2apic_ldr();
  179. return 1;
  180. }
  181. static struct apic apic_x2apic_cluster __ro_after_init = {
  182. .name = "cluster x2apic",
  183. .probe = x2apic_cluster_probe,
  184. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  185. .dest_mode_logical = true,
  186. .disable_esr = 0,
  187. .init_apic_ldr = init_x2apic_ldr,
  188. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  189. .max_apic_id = UINT_MAX,
  190. .x2apic_set_max_apicid = true,
  191. .get_apic_id = x2apic_get_apic_id,
  192. .calc_dest_apicid = x2apic_calc_apicid,
  193. .send_IPI = x2apic_send_IPI,
  194. .send_IPI_mask = x2apic_send_IPI_mask,
  195. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  196. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  197. .send_IPI_all = x2apic_send_IPI_all,
  198. .send_IPI_self = x2apic_send_IPI_self,
  199. .nmi_to_offline_cpu = true,
  200. .read = native_apic_msr_read,
  201. .write = native_apic_msr_write,
  202. .eoi = native_apic_msr_eoi,
  203. .icr_read = native_x2apic_icr_read,
  204. .icr_write = native_x2apic_icr_write,
  205. };
  206. apic_driver(apic_x2apic_cluster);