pgtable.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/mm.h>
  3. #include <linux/gfp.h>
  4. #include <linux/hugetlb.h>
  5. #include <asm/pgalloc.h>
  6. #include <asm/tlb.h>
  7. #include <asm/fixmap.h>
  8. #include <asm/mtrr.h>
  9. #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
  10. phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
  11. EXPORT_SYMBOL(physical_mask);
  12. #endif
  13. #ifdef CONFIG_HIGHPTE
  14. #define PGTABLE_HIGHMEM __GFP_HIGHMEM
  15. #else
  16. #define PGTABLE_HIGHMEM 0
  17. #endif
  18. #ifndef CONFIG_PARAVIRT
  19. static inline
  20. void paravirt_tlb_remove_table(struct mmu_gather *tlb, void *table)
  21. {
  22. tlb_remove_page(tlb, table);
  23. }
  24. #endif
  25. gfp_t __userpte_alloc_gfp = GFP_PGTABLE_USER | PGTABLE_HIGHMEM;
  26. pgtable_t pte_alloc_one(struct mm_struct *mm)
  27. {
  28. return __pte_alloc_one(mm, __userpte_alloc_gfp);
  29. }
  30. static int __init setup_userpte(char *arg)
  31. {
  32. if (!arg)
  33. return -EINVAL;
  34. /*
  35. * "userpte=nohigh" disables allocation of user pagetables in
  36. * high memory.
  37. */
  38. if (strcmp(arg, "nohigh") == 0)
  39. __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
  40. else
  41. return -EINVAL;
  42. return 0;
  43. }
  44. early_param("userpte", setup_userpte);
  45. void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
  46. {
  47. pagetable_pte_dtor(page_ptdesc(pte));
  48. paravirt_release_pte(page_to_pfn(pte));
  49. paravirt_tlb_remove_table(tlb, pte);
  50. }
  51. #if CONFIG_PGTABLE_LEVELS > 2
  52. void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
  53. {
  54. struct ptdesc *ptdesc = virt_to_ptdesc(pmd);
  55. paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
  56. /*
  57. * NOTE! For PAE, any changes to the top page-directory-pointer-table
  58. * entries need a full cr3 reload to flush.
  59. */
  60. #ifdef CONFIG_X86_PAE
  61. tlb->need_flush_all = 1;
  62. #endif
  63. pagetable_pmd_dtor(ptdesc);
  64. paravirt_tlb_remove_table(tlb, ptdesc_page(ptdesc));
  65. }
  66. #if CONFIG_PGTABLE_LEVELS > 3
  67. void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
  68. {
  69. struct ptdesc *ptdesc = virt_to_ptdesc(pud);
  70. pagetable_pud_dtor(ptdesc);
  71. paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
  72. paravirt_tlb_remove_table(tlb, virt_to_page(pud));
  73. }
  74. #if CONFIG_PGTABLE_LEVELS > 4
  75. void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d)
  76. {
  77. paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT);
  78. paravirt_tlb_remove_table(tlb, virt_to_page(p4d));
  79. }
  80. #endif /* CONFIG_PGTABLE_LEVELS > 4 */
  81. #endif /* CONFIG_PGTABLE_LEVELS > 3 */
  82. #endif /* CONFIG_PGTABLE_LEVELS > 2 */
  83. static inline void pgd_list_add(pgd_t *pgd)
  84. {
  85. struct ptdesc *ptdesc = virt_to_ptdesc(pgd);
  86. list_add(&ptdesc->pt_list, &pgd_list);
  87. }
  88. static inline void pgd_list_del(pgd_t *pgd)
  89. {
  90. struct ptdesc *ptdesc = virt_to_ptdesc(pgd);
  91. list_del(&ptdesc->pt_list);
  92. }
  93. #define UNSHARED_PTRS_PER_PGD \
  94. (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
  95. #define MAX_UNSHARED_PTRS_PER_PGD \
  96. MAX_T(size_t, KERNEL_PGD_BOUNDARY, PTRS_PER_PGD)
  97. static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
  98. {
  99. virt_to_ptdesc(pgd)->pt_mm = mm;
  100. }
  101. struct mm_struct *pgd_page_get_mm(struct page *page)
  102. {
  103. return page_ptdesc(page)->pt_mm;
  104. }
  105. static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
  106. {
  107. /* If the pgd points to a shared pagetable level (either the
  108. ptes in non-PAE, or shared PMD in PAE), then just copy the
  109. references from swapper_pg_dir. */
  110. if (CONFIG_PGTABLE_LEVELS == 2 ||
  111. (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
  112. CONFIG_PGTABLE_LEVELS >= 4) {
  113. clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
  114. swapper_pg_dir + KERNEL_PGD_BOUNDARY,
  115. KERNEL_PGD_PTRS);
  116. }
  117. /* list required to sync kernel mapping updates */
  118. if (!SHARED_KERNEL_PMD) {
  119. pgd_set_mm(pgd, mm);
  120. pgd_list_add(pgd);
  121. }
  122. }
  123. static void pgd_dtor(pgd_t *pgd)
  124. {
  125. if (SHARED_KERNEL_PMD)
  126. return;
  127. spin_lock(&pgd_lock);
  128. pgd_list_del(pgd);
  129. spin_unlock(&pgd_lock);
  130. }
  131. /*
  132. * List of all pgd's needed for non-PAE so it can invalidate entries
  133. * in both cached and uncached pgd's; not needed for PAE since the
  134. * kernel pmd is shared. If PAE were not to share the pmd a similar
  135. * tactic would be needed. This is essentially codepath-based locking
  136. * against pageattr.c; it is the unique case in which a valid change
  137. * of kernel pagetables can't be lazily synchronized by vmalloc faults.
  138. * vmalloc faults work because attached pagetables are never freed.
  139. * -- nyc
  140. */
  141. #ifdef CONFIG_X86_PAE
  142. /*
  143. * In PAE mode, we need to do a cr3 reload (=tlb flush) when
  144. * updating the top-level pagetable entries to guarantee the
  145. * processor notices the update. Since this is expensive, and
  146. * all 4 top-level entries are used almost immediately in a
  147. * new process's life, we just pre-populate them here.
  148. *
  149. * Also, if we're in a paravirt environment where the kernel pmd is
  150. * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
  151. * and initialize the kernel pmds here.
  152. */
  153. #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
  154. #define MAX_PREALLOCATED_PMDS MAX_UNSHARED_PTRS_PER_PGD
  155. /*
  156. * We allocate separate PMDs for the kernel part of the user page-table
  157. * when PTI is enabled. We need them to map the per-process LDT into the
  158. * user-space page-table.
  159. */
  160. #define PREALLOCATED_USER_PMDS (boot_cpu_has(X86_FEATURE_PTI) ? \
  161. KERNEL_PGD_PTRS : 0)
  162. #define MAX_PREALLOCATED_USER_PMDS KERNEL_PGD_PTRS
  163. void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
  164. {
  165. paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
  166. /* Note: almost everything apart from _PAGE_PRESENT is
  167. reserved at the pmd (PDPT) level. */
  168. set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
  169. /*
  170. * According to Intel App note "TLBs, Paging-Structure Caches,
  171. * and Their Invalidation", April 2007, document 317080-001,
  172. * section 8.1: in PAE mode we explicitly have to flush the
  173. * TLB via cr3 if the top-level pgd is changed...
  174. */
  175. flush_tlb_mm(mm);
  176. }
  177. #else /* !CONFIG_X86_PAE */
  178. /* No need to prepopulate any pagetable entries in non-PAE modes. */
  179. #define PREALLOCATED_PMDS 0
  180. #define MAX_PREALLOCATED_PMDS 0
  181. #define PREALLOCATED_USER_PMDS 0
  182. #define MAX_PREALLOCATED_USER_PMDS 0
  183. #endif /* CONFIG_X86_PAE */
  184. static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
  185. {
  186. int i;
  187. struct ptdesc *ptdesc;
  188. for (i = 0; i < count; i++)
  189. if (pmds[i]) {
  190. ptdesc = virt_to_ptdesc(pmds[i]);
  191. pagetable_pmd_dtor(ptdesc);
  192. pagetable_free(ptdesc);
  193. mm_dec_nr_pmds(mm);
  194. }
  195. }
  196. static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
  197. {
  198. int i;
  199. bool failed = false;
  200. gfp_t gfp = GFP_PGTABLE_USER;
  201. if (mm == &init_mm)
  202. gfp &= ~__GFP_ACCOUNT;
  203. gfp &= ~__GFP_HIGHMEM;
  204. for (i = 0; i < count; i++) {
  205. pmd_t *pmd = NULL;
  206. struct ptdesc *ptdesc = pagetable_alloc(gfp, 0);
  207. if (!ptdesc)
  208. failed = true;
  209. if (ptdesc && !pagetable_pmd_ctor(ptdesc)) {
  210. pagetable_free(ptdesc);
  211. ptdesc = NULL;
  212. failed = true;
  213. }
  214. if (ptdesc) {
  215. mm_inc_nr_pmds(mm);
  216. pmd = ptdesc_address(ptdesc);
  217. }
  218. pmds[i] = pmd;
  219. }
  220. if (failed) {
  221. free_pmds(mm, pmds, count);
  222. return -ENOMEM;
  223. }
  224. return 0;
  225. }
  226. /*
  227. * Mop up any pmd pages which may still be attached to the pgd.
  228. * Normally they will be freed by munmap/exit_mmap, but any pmd we
  229. * preallocate which never got a corresponding vma will need to be
  230. * freed manually.
  231. */
  232. static void mop_up_one_pmd(struct mm_struct *mm, pgd_t *pgdp)
  233. {
  234. pgd_t pgd = *pgdp;
  235. if (pgd_val(pgd) != 0) {
  236. pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
  237. pgd_clear(pgdp);
  238. paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
  239. pmd_free(mm, pmd);
  240. mm_dec_nr_pmds(mm);
  241. }
  242. }
  243. static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
  244. {
  245. int i;
  246. for (i = 0; i < PREALLOCATED_PMDS; i++)
  247. mop_up_one_pmd(mm, &pgdp[i]);
  248. #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
  249. if (!boot_cpu_has(X86_FEATURE_PTI))
  250. return;
  251. pgdp = kernel_to_user_pgdp(pgdp);
  252. for (i = 0; i < PREALLOCATED_USER_PMDS; i++)
  253. mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]);
  254. #endif
  255. }
  256. static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
  257. {
  258. p4d_t *p4d;
  259. pud_t *pud;
  260. int i;
  261. p4d = p4d_offset(pgd, 0);
  262. pud = pud_offset(p4d, 0);
  263. for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
  264. pmd_t *pmd = pmds[i];
  265. if (i >= KERNEL_PGD_BOUNDARY)
  266. memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
  267. sizeof(pmd_t) * PTRS_PER_PMD);
  268. pud_populate(mm, pud, pmd);
  269. }
  270. }
  271. #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
  272. static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
  273. pgd_t *k_pgd, pmd_t *pmds[])
  274. {
  275. pgd_t *s_pgd = kernel_to_user_pgdp(swapper_pg_dir);
  276. pgd_t *u_pgd = kernel_to_user_pgdp(k_pgd);
  277. p4d_t *u_p4d;
  278. pud_t *u_pud;
  279. int i;
  280. u_p4d = p4d_offset(u_pgd, 0);
  281. u_pud = pud_offset(u_p4d, 0);
  282. s_pgd += KERNEL_PGD_BOUNDARY;
  283. u_pud += KERNEL_PGD_BOUNDARY;
  284. for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) {
  285. pmd_t *pmd = pmds[i];
  286. memcpy(pmd, (pmd_t *)pgd_page_vaddr(*s_pgd),
  287. sizeof(pmd_t) * PTRS_PER_PMD);
  288. pud_populate(mm, u_pud, pmd);
  289. }
  290. }
  291. #else
  292. static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
  293. pgd_t *k_pgd, pmd_t *pmds[])
  294. {
  295. }
  296. #endif
  297. /*
  298. * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
  299. * assumes that pgd should be in one page.
  300. *
  301. * But kernel with PAE paging that is not running as a Xen domain
  302. * only needs to allocate 32 bytes for pgd instead of one page.
  303. */
  304. #ifdef CONFIG_X86_PAE
  305. #include <linux/slab.h>
  306. #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
  307. #define PGD_ALIGN 32
  308. static struct kmem_cache *pgd_cache;
  309. void __init pgtable_cache_init(void)
  310. {
  311. /*
  312. * When PAE kernel is running as a Xen domain, it does not use
  313. * shared kernel pmd. And this requires a whole page for pgd.
  314. */
  315. if (!SHARED_KERNEL_PMD)
  316. return;
  317. /*
  318. * when PAE kernel is not running as a Xen domain, it uses
  319. * shared kernel pmd. Shared kernel pmd does not require a whole
  320. * page for pgd. We are able to just allocate a 32-byte for pgd.
  321. * During boot time, we create a 32-byte slab for pgd table allocation.
  322. */
  323. pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
  324. SLAB_PANIC, NULL);
  325. }
  326. static inline pgd_t *_pgd_alloc(void)
  327. {
  328. /*
  329. * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
  330. * We allocate one page for pgd.
  331. */
  332. if (!SHARED_KERNEL_PMD)
  333. return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER,
  334. PGD_ALLOCATION_ORDER);
  335. /*
  336. * Now PAE kernel is not running as a Xen domain. We can allocate
  337. * a 32-byte slab for pgd to save memory space.
  338. */
  339. return kmem_cache_alloc(pgd_cache, GFP_PGTABLE_USER);
  340. }
  341. static inline void _pgd_free(pgd_t *pgd)
  342. {
  343. if (!SHARED_KERNEL_PMD)
  344. free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
  345. else
  346. kmem_cache_free(pgd_cache, pgd);
  347. }
  348. #else
  349. static inline pgd_t *_pgd_alloc(void)
  350. {
  351. return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER,
  352. PGD_ALLOCATION_ORDER);
  353. }
  354. static inline void _pgd_free(pgd_t *pgd)
  355. {
  356. free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
  357. }
  358. #endif /* CONFIG_X86_PAE */
  359. pgd_t *pgd_alloc(struct mm_struct *mm)
  360. {
  361. pgd_t *pgd;
  362. pmd_t *u_pmds[MAX_PREALLOCATED_USER_PMDS];
  363. pmd_t *pmds[MAX_PREALLOCATED_PMDS];
  364. pgd = _pgd_alloc();
  365. if (pgd == NULL)
  366. goto out;
  367. mm->pgd = pgd;
  368. if (sizeof(pmds) != 0 &&
  369. preallocate_pmds(mm, pmds, PREALLOCATED_PMDS) != 0)
  370. goto out_free_pgd;
  371. if (sizeof(u_pmds) != 0 &&
  372. preallocate_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS) != 0)
  373. goto out_free_pmds;
  374. if (paravirt_pgd_alloc(mm) != 0)
  375. goto out_free_user_pmds;
  376. /*
  377. * Make sure that pre-populating the pmds is atomic with
  378. * respect to anything walking the pgd_list, so that they
  379. * never see a partially populated pgd.
  380. */
  381. spin_lock(&pgd_lock);
  382. pgd_ctor(mm, pgd);
  383. if (sizeof(pmds) != 0)
  384. pgd_prepopulate_pmd(mm, pgd, pmds);
  385. if (sizeof(u_pmds) != 0)
  386. pgd_prepopulate_user_pmd(mm, pgd, u_pmds);
  387. spin_unlock(&pgd_lock);
  388. return pgd;
  389. out_free_user_pmds:
  390. if (sizeof(u_pmds) != 0)
  391. free_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS);
  392. out_free_pmds:
  393. if (sizeof(pmds) != 0)
  394. free_pmds(mm, pmds, PREALLOCATED_PMDS);
  395. out_free_pgd:
  396. _pgd_free(pgd);
  397. out:
  398. return NULL;
  399. }
  400. void pgd_free(struct mm_struct *mm, pgd_t *pgd)
  401. {
  402. pgd_mop_up_pmds(mm, pgd);
  403. pgd_dtor(pgd);
  404. paravirt_pgd_free(mm, pgd);
  405. _pgd_free(pgd);
  406. }
  407. /*
  408. * Used to set accessed or dirty bits in the page table entries
  409. * on other architectures. On x86, the accessed and dirty bits
  410. * are tracked by hardware. However, do_wp_page calls this function
  411. * to also make the pte writeable at the same time the dirty bit is
  412. * set. In that case we do actually need to write the PTE.
  413. */
  414. int ptep_set_access_flags(struct vm_area_struct *vma,
  415. unsigned long address, pte_t *ptep,
  416. pte_t entry, int dirty)
  417. {
  418. int changed = !pte_same(*ptep, entry);
  419. if (changed && dirty)
  420. set_pte(ptep, entry);
  421. return changed;
  422. }
  423. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  424. int pmdp_set_access_flags(struct vm_area_struct *vma,
  425. unsigned long address, pmd_t *pmdp,
  426. pmd_t entry, int dirty)
  427. {
  428. int changed = !pmd_same(*pmdp, entry);
  429. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  430. if (changed && dirty) {
  431. set_pmd(pmdp, entry);
  432. /*
  433. * We had a write-protection fault here and changed the pmd
  434. * to to more permissive. No need to flush the TLB for that,
  435. * #PF is architecturally guaranteed to do that and in the
  436. * worst-case we'll generate a spurious fault.
  437. */
  438. }
  439. return changed;
  440. }
  441. int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  442. pud_t *pudp, pud_t entry, int dirty)
  443. {
  444. int changed = !pud_same(*pudp, entry);
  445. VM_BUG_ON(address & ~HPAGE_PUD_MASK);
  446. if (changed && dirty) {
  447. set_pud(pudp, entry);
  448. /*
  449. * We had a write-protection fault here and changed the pud
  450. * to to more permissive. No need to flush the TLB for that,
  451. * #PF is architecturally guaranteed to do that and in the
  452. * worst-case we'll generate a spurious fault.
  453. */
  454. }
  455. return changed;
  456. }
  457. #endif
  458. int ptep_test_and_clear_young(struct vm_area_struct *vma,
  459. unsigned long addr, pte_t *ptep)
  460. {
  461. int ret = 0;
  462. if (pte_young(*ptep))
  463. ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
  464. (unsigned long *) &ptep->pte);
  465. return ret;
  466. }
  467. #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
  468. int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  469. unsigned long addr, pmd_t *pmdp)
  470. {
  471. int ret = 0;
  472. if (pmd_young(*pmdp))
  473. ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
  474. (unsigned long *)pmdp);
  475. return ret;
  476. }
  477. #endif
  478. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  479. int pudp_test_and_clear_young(struct vm_area_struct *vma,
  480. unsigned long addr, pud_t *pudp)
  481. {
  482. int ret = 0;
  483. if (pud_young(*pudp))
  484. ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
  485. (unsigned long *)pudp);
  486. return ret;
  487. }
  488. #endif
  489. int ptep_clear_flush_young(struct vm_area_struct *vma,
  490. unsigned long address, pte_t *ptep)
  491. {
  492. /*
  493. * On x86 CPUs, clearing the accessed bit without a TLB flush
  494. * doesn't cause data corruption. [ It could cause incorrect
  495. * page aging and the (mistaken) reclaim of hot pages, but the
  496. * chance of that should be relatively low. ]
  497. *
  498. * So as a performance optimization don't flush the TLB when
  499. * clearing the accessed bit, it will eventually be flushed by
  500. * a context switch or a VM operation anyway. [ In the rare
  501. * event of it not getting flushed for a long time the delay
  502. * shouldn't really matter because there's no real memory
  503. * pressure for swapout to react to. ]
  504. */
  505. return ptep_test_and_clear_young(vma, address, ptep);
  506. }
  507. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  508. int pmdp_clear_flush_young(struct vm_area_struct *vma,
  509. unsigned long address, pmd_t *pmdp)
  510. {
  511. int young;
  512. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  513. young = pmdp_test_and_clear_young(vma, address, pmdp);
  514. if (young)
  515. flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
  516. return young;
  517. }
  518. pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, unsigned long address,
  519. pmd_t *pmdp)
  520. {
  521. VM_WARN_ON_ONCE(!pmd_present(*pmdp));
  522. /*
  523. * No flush is necessary. Once an invalid PTE is established, the PTE's
  524. * access and dirty bits cannot be updated.
  525. */
  526. return pmdp_establish(vma, address, pmdp, pmd_mkinvalid(*pmdp));
  527. }
  528. #endif
  529. #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
  530. defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
  531. pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address,
  532. pud_t *pudp)
  533. {
  534. VM_WARN_ON_ONCE(!pud_present(*pudp));
  535. pud_t old = pudp_establish(vma, address, pudp, pud_mkinvalid(*pudp));
  536. flush_pud_tlb_range(vma, address, address + HPAGE_PUD_SIZE);
  537. return old;
  538. }
  539. #endif
  540. /**
  541. * reserve_top_address - reserves a hole in the top of kernel address space
  542. * @reserve - size of hole to reserve
  543. *
  544. * Can be used to relocate the fixmap area and poke a hole in the top
  545. * of kernel address space to make room for a hypervisor.
  546. */
  547. void __init reserve_top_address(unsigned long reserve)
  548. {
  549. #ifdef CONFIG_X86_32
  550. BUG_ON(fixmaps_set > 0);
  551. __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
  552. printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
  553. -reserve, __FIXADDR_TOP + PAGE_SIZE);
  554. #endif
  555. }
  556. int fixmaps_set;
  557. void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
  558. {
  559. unsigned long address = __fix_to_virt(idx);
  560. #ifdef CONFIG_X86_64
  561. /*
  562. * Ensure that the static initial page tables are covering the
  563. * fixmap completely.
  564. */
  565. BUILD_BUG_ON(__end_of_permanent_fixed_addresses >
  566. (FIXMAP_PMD_NUM * PTRS_PER_PTE));
  567. #endif
  568. if (idx >= __end_of_fixed_addresses) {
  569. BUG();
  570. return;
  571. }
  572. set_pte_vaddr(address, pte);
  573. fixmaps_set++;
  574. }
  575. void native_set_fixmap(unsigned /* enum fixed_addresses */ idx,
  576. phys_addr_t phys, pgprot_t flags)
  577. {
  578. /* Sanitize 'prot' against any unsupported bits: */
  579. pgprot_val(flags) &= __default_kernel_pte_mask;
  580. __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
  581. }
  582. #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
  583. #ifdef CONFIG_X86_5LEVEL
  584. /**
  585. * p4d_set_huge - setup kernel P4D mapping
  586. *
  587. * No 512GB pages yet -- always return 0
  588. */
  589. int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
  590. {
  591. return 0;
  592. }
  593. /**
  594. * p4d_clear_huge - clear kernel P4D mapping when it is set
  595. *
  596. * No 512GB pages yet -- always return 0
  597. */
  598. void p4d_clear_huge(p4d_t *p4d)
  599. {
  600. }
  601. #endif
  602. /**
  603. * pud_set_huge - setup kernel PUD mapping
  604. *
  605. * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
  606. * function sets up a huge page only if the complete range has the same MTRR
  607. * caching mode.
  608. *
  609. * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
  610. * page mapping attempt fails.
  611. *
  612. * Returns 1 on success and 0 on failure.
  613. */
  614. int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
  615. {
  616. u8 uniform;
  617. mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);
  618. if (!uniform)
  619. return 0;
  620. /* Bail out if we are we on a populated non-leaf entry: */
  621. if (pud_present(*pud) && !pud_leaf(*pud))
  622. return 0;
  623. set_pte((pte_t *)pud, pfn_pte(
  624. (u64)addr >> PAGE_SHIFT,
  625. __pgprot(protval_4k_2_large(pgprot_val(prot)) | _PAGE_PSE)));
  626. return 1;
  627. }
  628. /**
  629. * pmd_set_huge - setup kernel PMD mapping
  630. *
  631. * See text over pud_set_huge() above.
  632. *
  633. * Returns 1 on success and 0 on failure.
  634. */
  635. int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
  636. {
  637. u8 uniform;
  638. mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform);
  639. if (!uniform) {
  640. pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
  641. __func__, addr, addr + PMD_SIZE);
  642. return 0;
  643. }
  644. /* Bail out if we are we on a populated non-leaf entry: */
  645. if (pmd_present(*pmd) && !pmd_leaf(*pmd))
  646. return 0;
  647. set_pte((pte_t *)pmd, pfn_pte(
  648. (u64)addr >> PAGE_SHIFT,
  649. __pgprot(protval_4k_2_large(pgprot_val(prot)) | _PAGE_PSE)));
  650. return 1;
  651. }
  652. /**
  653. * pud_clear_huge - clear kernel PUD mapping when it is set
  654. *
  655. * Returns 1 on success and 0 on failure (no PUD map is found).
  656. */
  657. int pud_clear_huge(pud_t *pud)
  658. {
  659. if (pud_leaf(*pud)) {
  660. pud_clear(pud);
  661. return 1;
  662. }
  663. return 0;
  664. }
  665. /**
  666. * pmd_clear_huge - clear kernel PMD mapping when it is set
  667. *
  668. * Returns 1 on success and 0 on failure (no PMD map is found).
  669. */
  670. int pmd_clear_huge(pmd_t *pmd)
  671. {
  672. if (pmd_leaf(*pmd)) {
  673. pmd_clear(pmd);
  674. return 1;
  675. }
  676. return 0;
  677. }
  678. #ifdef CONFIG_X86_64
  679. /**
  680. * pud_free_pmd_page - Clear pud entry and free pmd page.
  681. * @pud: Pointer to a PUD.
  682. * @addr: Virtual address associated with pud.
  683. *
  684. * Context: The pud range has been unmapped and TLB purged.
  685. * Return: 1 if clearing the entry succeeded. 0 otherwise.
  686. *
  687. * NOTE: Callers must allow a single page allocation.
  688. */
  689. int pud_free_pmd_page(pud_t *pud, unsigned long addr)
  690. {
  691. pmd_t *pmd, *pmd_sv;
  692. pte_t *pte;
  693. int i;
  694. pmd = pud_pgtable(*pud);
  695. pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
  696. if (!pmd_sv)
  697. return 0;
  698. for (i = 0; i < PTRS_PER_PMD; i++) {
  699. pmd_sv[i] = pmd[i];
  700. if (!pmd_none(pmd[i]))
  701. pmd_clear(&pmd[i]);
  702. }
  703. pud_clear(pud);
  704. /* INVLPG to clear all paging-structure caches */
  705. flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
  706. for (i = 0; i < PTRS_PER_PMD; i++) {
  707. if (!pmd_none(pmd_sv[i])) {
  708. pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]);
  709. free_page((unsigned long)pte);
  710. }
  711. }
  712. free_page((unsigned long)pmd_sv);
  713. pagetable_pmd_dtor(virt_to_ptdesc(pmd));
  714. free_page((unsigned long)pmd);
  715. return 1;
  716. }
  717. /**
  718. * pmd_free_pte_page - Clear pmd entry and free pte page.
  719. * @pmd: Pointer to a PMD.
  720. * @addr: Virtual address associated with pmd.
  721. *
  722. * Context: The pmd range has been unmapped and TLB purged.
  723. * Return: 1 if clearing the entry succeeded. 0 otherwise.
  724. */
  725. int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
  726. {
  727. pte_t *pte;
  728. pte = (pte_t *)pmd_page_vaddr(*pmd);
  729. pmd_clear(pmd);
  730. /* INVLPG to clear all paging-structure caches */
  731. flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
  732. free_page((unsigned long)pte);
  733. return 1;
  734. }
  735. #else /* !CONFIG_X86_64 */
  736. /*
  737. * Disable free page handling on x86-PAE. This assures that ioremap()
  738. * does not update sync'd pmd entries. See vmalloc_sync_one().
  739. */
  740. int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
  741. {
  742. return pmd_none(*pmd);
  743. }
  744. #endif /* CONFIG_X86_64 */
  745. #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
  746. pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma)
  747. {
  748. if (vma->vm_flags & VM_SHADOW_STACK)
  749. return pte_mkwrite_shstk(pte);
  750. pte = pte_mkwrite_novma(pte);
  751. return pte_clear_saveddirty(pte);
  752. }
  753. pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma)
  754. {
  755. if (vma->vm_flags & VM_SHADOW_STACK)
  756. return pmd_mkwrite_shstk(pmd);
  757. pmd = pmd_mkwrite_novma(pmd);
  758. return pmd_clear_saveddirty(pmd);
  759. }
  760. void arch_check_zapped_pte(struct vm_area_struct *vma, pte_t pte)
  761. {
  762. /*
  763. * Hardware before shadow stack can (rarely) set Dirty=1
  764. * on a Write=0 PTE. So the below condition
  765. * only indicates a software bug when shadow stack is
  766. * supported by the HW. This checking is covered in
  767. * pte_shstk().
  768. */
  769. VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&
  770. pte_shstk(pte));
  771. }
  772. void arch_check_zapped_pmd(struct vm_area_struct *vma, pmd_t pmd)
  773. {
  774. /* See note in arch_check_zapped_pte() */
  775. VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&
  776. pmd_shstk(pmd));
  777. }
  778. void arch_check_zapped_pud(struct vm_area_struct *vma, pud_t pud)
  779. {
  780. /* See note in arch_check_zapped_pte() */
  781. VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) && pud_shstk(pud));
  782. }