Kconfig 8.6 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. #
  3. # Bus Devices
  4. #
  5. menu "Bus devices"
  6. config ARM_CCI
  7. bool
  8. config ARM_CCI400_COMMON
  9. bool
  10. select ARM_CCI
  11. config ARM_CCI400_PORT_CTRL
  12. bool
  13. depends on ARM && OF && CPU_V7
  14. select ARM_CCI400_COMMON
  15. help
  16. Low level power management driver for CCI400 cache coherent
  17. interconnect for ARM platforms.
  18. config ARM_INTEGRATOR_LM
  19. bool "ARM Integrator Logic Module bus"
  20. depends on HAS_IOMEM
  21. depends on ARCH_INTEGRATOR || COMPILE_TEST
  22. default ARCH_INTEGRATOR
  23. help
  24. Say y here to enable support for the ARM Logic Module bus
  25. found on the ARM Integrator AP (Application Platform)
  26. config BRCMSTB_GISB_ARB
  27. tristate "Broadcom STB GISB bus arbiter"
  28. depends on ARCH_BRCMSTB || BMIPS_GENERIC
  29. default ARCH_BRCMSTB || BMIPS_GENERIC
  30. help
  31. Driver for the Broadcom Set Top Box System-on-a-chip internal bus
  32. arbiter. This driver provides timeout and target abort error handling
  33. and internal bus master decoding.
  34. config BT1_APB
  35. bool "Baikal-T1 APB-bus driver"
  36. depends on MIPS_BAIKAL_T1 || COMPILE_TEST
  37. select REGMAP_MMIO
  38. help
  39. Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
  40. IO requests are routed to this bus by means of the DW AMBA 3 AXI
  41. Interconnect. In case of any APB protocol collisions, slave device
  42. not responding on timeout an IRQ is raised with an erroneous address
  43. reported to the APB terminator (APB Errors Handler Block). This
  44. driver provides the interrupt handler to detect the erroneous
  45. address, prints an error message about the address fault, updates an
  46. errors counter. The counter and the APB-bus operations timeout can be
  47. accessed via corresponding sysfs nodes.
  48. config BT1_AXI
  49. bool "Baikal-T1 AXI-bus driver"
  50. depends on MIPS_BAIKAL_T1 || COMPILE_TEST
  51. select MFD_SYSCON
  52. help
  53. AXI3-bus is the main communication bus connecting all high-speed
  54. peripheral IP-cores with RAM controller and with MIPS P5600 cores on
  55. Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
  56. Interconnect (so called AXI Main Interconnect) routing IO requests
  57. from one SoC block to another. This driver provides a way to detect
  58. any bus protocol errors and device not responding situations by
  59. means of an embedded on top of the interconnect errors handler
  60. block (EHB). AXI Interconnect QoS arbitration tuning is currently
  61. unsupported.
  62. config MOXTET
  63. tristate "CZ.NIC Turris Mox module configuration bus"
  64. depends on SPI_MASTER && OF
  65. help
  66. Say yes here to add support for the module configuration bus found
  67. on CZ.NIC's Turris Mox. This is needed for the ability to discover
  68. the order in which the modules are connected and to get/set some of
  69. their settings. For example the GPIOs on Mox SFP module are
  70. configured through this bus.
  71. config HISILICON_LPC
  72. bool "Support for ISA I/O space on HiSilicon Hip06/7"
  73. depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC)
  74. depends on HAS_IOPORT
  75. select INDIRECT_PIO if ARM64
  76. help
  77. Driver to enable I/O access to devices attached to the Low Pin
  78. Count bus on the HiSilicon Hip06/7 SoC.
  79. config IMX_WEIM
  80. bool "Freescale EIM DRIVER"
  81. depends on ARCH_MXC || COMPILE_TEST
  82. help
  83. Driver for i.MX WEIM controller.
  84. The WEIM(Wireless External Interface Module) works like a bus.
  85. You can attach many different devices on it, such as NOR, onenand.
  86. config INTEL_IXP4XX_EB
  87. bool "Intel IXP4xx expansion bus interface driver"
  88. depends on HAS_IOMEM
  89. depends on ARCH_IXP4XX || COMPILE_TEST
  90. default ARCH_IXP4XX
  91. select MFD_SYSCON
  92. help
  93. Driver for the Intel IXP4xx expansion bus interface. The driver is
  94. needed to set up various chip select configuration parameters before
  95. devices on the expansion bus can be discovered.
  96. config MIPS_CDMM
  97. bool "MIPS Common Device Memory Map (CDMM) Driver"
  98. depends on CPU_MIPSR2 || CPU_MIPSR5
  99. help
  100. Driver needed for the MIPS Common Device Memory Map bus in MIPS
  101. cores. This bus is for per-CPU tightly coupled devices such as the
  102. Fast Debug Channel (FDC).
  103. For this to work, either your bootloader needs to enable the CDMM
  104. region at an unused physical address on the boot CPU, or else your
  105. platform code needs to implement mips_cdmm_phys_base() (see
  106. asm/cdmm.h).
  107. config MVEBU_MBUS
  108. bool
  109. depends on PLAT_ORION
  110. help
  111. Driver needed for the MBus configuration on Marvell EBU SoCs
  112. (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
  113. config OMAP_INTERCONNECT
  114. tristate "OMAP INTERCONNECT DRIVER"
  115. depends on ARCH_OMAP2PLUS
  116. help
  117. Driver to enable OMAP interconnect error handling driver.
  118. config OMAP_OCP2SCP
  119. tristate "OMAP OCP2SCP DRIVER"
  120. depends on ARCH_OMAP2PLUS
  121. help
  122. Driver to enable ocp2scp module which transforms ocp interface
  123. protocol to scp protocol. In OMAP4, USB PHY is connected via
  124. OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
  125. OCP2SCP.
  126. config QCOM_EBI2
  127. bool "Qualcomm External Bus Interface 2 (EBI2)"
  128. depends on HAS_IOMEM
  129. depends on ARCH_QCOM || COMPILE_TEST
  130. default ARCH_QCOM
  131. help
  132. Say y here to enable support for the Qualcomm External Bus
  133. Interface 2, which can be used to connect things like NAND Flash,
  134. SRAM, ethernet adapters, FPGAs and LCD displays.
  135. config QCOM_SSC_BLOCK_BUS
  136. bool "Qualcomm SSC Block Bus Init Driver"
  137. depends on ARCH_QCOM
  138. help
  139. Say y here to enable support for initializing the bus that connects
  140. the SSC block's internal bus to the cNoC (configurantion NoC) on
  141. (some) qcom SoCs.
  142. The SSC (Snapdragon Sensor Core) block contains a gpio controller,
  143. i2c/spi/uart controllers, a hexagon core, and a clock controller
  144. which provides clocks for the above.
  145. config STM32_FIREWALL
  146. bool "STM32 Firewall framework"
  147. depends on (ARCH_STM32 || COMPILE_TEST) && OF
  148. select OF_DYNAMIC
  149. help
  150. Say y to enable STM32 firewall framework and its services. Firewall
  151. controllers will be able to register to the framework. Access for
  152. hardware resources linked to a firewall controller can be requested
  153. through this STM32 framework.
  154. config SUN50I_DE2_BUS
  155. bool "Allwinner A64 DE2 Bus Driver"
  156. default ARM64
  157. depends on ARCH_SUNXI
  158. select SUNXI_SRAM
  159. help
  160. Say y here to enable support for Allwinner A64 DE2 bus driver. It's
  161. mostly transparent, but a SRAM region needs to be claimed in the SRAM
  162. controller to make the all blocks in the DE2 part accessible.
  163. config SUNXI_RSB
  164. tristate "Allwinner sunXi Reduced Serial Bus Driver"
  165. default MACH_SUN8I || MACH_SUN9I || ARM64
  166. depends on ARCH_SUNXI
  167. select REGMAP
  168. help
  169. Say y here to enable support for Allwinner's Reduced Serial Bus
  170. (RSB) support. This controller is responsible for communicating
  171. with various RSB based devices, such as AXP223, AXP8XX PMICs,
  172. and AC100/AC200 ICs.
  173. config TEGRA_ACONNECT
  174. tristate "Tegra ACONNECT Bus Driver"
  175. depends on ARCH_TEGRA
  176. depends on OF && PM
  177. help
  178. Driver for the Tegra ACONNECT bus which is used to interface with
  179. the devices inside the Audio Processing Engine (APE) for
  180. Tegra210 and later.
  181. config TEGRA_GMI
  182. tristate "Tegra Generic Memory Interface bus driver"
  183. depends on ARCH_TEGRA
  184. help
  185. Driver for the Tegra Generic Memory Interface bus which can be used
  186. to attach devices such as NOR, UART, FPGA and more.
  187. config TI_PWMSS
  188. bool
  189. default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP)
  190. help
  191. PWM Subsystem driver support for AM33xx SOC.
  192. PWM submodules require PWM config space access from submodule
  193. drivers and require common parent driver support.
  194. config TI_SYSC
  195. bool "TI sysc interconnect target module driver"
  196. depends on ARCH_OMAP2PLUS || ARCH_K3
  197. default y
  198. help
  199. Generic driver for Texas Instruments interconnect target module
  200. found on many TI SoCs.
  201. config TS_NBUS
  202. tristate "Technologic Systems NBUS Driver"
  203. depends on SOC_IMX28
  204. depends on OF_GPIO && PWM
  205. help
  206. Driver for the Technologic Systems NBUS which is used to interface
  207. with the peripherals in the FPGA of the TS-4600 SoM.
  208. config UNIPHIER_SYSTEM_BUS
  209. tristate "UniPhier System Bus driver"
  210. depends on ARCH_UNIPHIER && OF
  211. default y
  212. help
  213. Support for UniPhier System Bus, a simple external bus. This is
  214. needed to use on-board devices connected to UniPhier SoCs.
  215. config VEXPRESS_CONFIG
  216. tristate "Versatile Express configuration bus"
  217. default y if ARCH_VEXPRESS
  218. depends on ARM || ARM64
  219. depends on OF
  220. select REGMAP
  221. help
  222. Platform configuration infrastructure for the ARM Ltd.
  223. Versatile Express.
  224. config DA8XX_MSTPRI
  225. bool "TI da8xx master peripheral priority driver"
  226. depends on ARCH_DAVINCI_DA8XX
  227. help
  228. Driver for Texas Instruments da8xx master peripheral priority
  229. configuration. Allows to adjust the priorities of all master
  230. peripherals.
  231. source "drivers/bus/fsl-mc/Kconfig"
  232. source "drivers/bus/mhi/Kconfig"
  233. endmenu