imx-weim.c 9.7 KB

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  1. /*
  2. * EIM driver for Freescale's i.MX chips
  3. *
  4. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/clk.h>
  12. #include <linux/io.h>
  13. #include <linux/of_address.h>
  14. #include <linux/of.h>
  15. #include <linux/of_platform.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/property.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  20. #include <linux/regmap.h>
  21. struct imx_weim_devtype {
  22. unsigned int cs_count;
  23. unsigned int cs_regs_count;
  24. unsigned int cs_stride;
  25. unsigned int wcr_offset;
  26. unsigned int wcr_bcm;
  27. unsigned int wcr_cont_bclk;
  28. };
  29. static const struct imx_weim_devtype imx1_weim_devtype = {
  30. .cs_count = 6,
  31. .cs_regs_count = 2,
  32. .cs_stride = 0x08,
  33. };
  34. static const struct imx_weim_devtype imx27_weim_devtype = {
  35. .cs_count = 6,
  36. .cs_regs_count = 3,
  37. .cs_stride = 0x10,
  38. };
  39. static const struct imx_weim_devtype imx50_weim_devtype = {
  40. .cs_count = 4,
  41. .cs_regs_count = 6,
  42. .cs_stride = 0x18,
  43. .wcr_offset = 0x90,
  44. .wcr_bcm = BIT(0),
  45. .wcr_cont_bclk = BIT(3),
  46. };
  47. static const struct imx_weim_devtype imx51_weim_devtype = {
  48. .cs_count = 6,
  49. .cs_regs_count = 6,
  50. .cs_stride = 0x18,
  51. };
  52. #define MAX_CS_REGS_COUNT 6
  53. #define MAX_CS_COUNT 6
  54. #define OF_REG_SIZE 3
  55. struct cs_timing {
  56. bool is_applied;
  57. u32 regs[MAX_CS_REGS_COUNT];
  58. };
  59. struct cs_timing_state {
  60. struct cs_timing cs[MAX_CS_COUNT];
  61. };
  62. struct weim_priv {
  63. void __iomem *base;
  64. struct cs_timing_state timing_state;
  65. };
  66. static const struct of_device_id weim_id_table[] = {
  67. /* i.MX1/21 */
  68. { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
  69. /* i.MX25/27/31/35 */
  70. { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
  71. /* i.MX50/53/6Q */
  72. { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
  73. { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
  74. /* i.MX51 */
  75. { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
  76. { }
  77. };
  78. MODULE_DEVICE_TABLE(of, weim_id_table);
  79. static int imx_weim_gpr_setup(struct platform_device *pdev)
  80. {
  81. struct device_node *np = pdev->dev.of_node;
  82. struct of_range_parser parser;
  83. struct of_range range;
  84. struct regmap *gpr;
  85. u32 gprvals[4] = {
  86. 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */
  87. 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */
  88. 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */
  89. 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */
  90. };
  91. u32 gprval = 0;
  92. u32 val;
  93. int cs = 0;
  94. int i = 0;
  95. gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");
  96. if (IS_ERR(gpr)) {
  97. dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n");
  98. return 0;
  99. }
  100. if (of_range_parser_init(&parser, np))
  101. goto err;
  102. for_each_of_range(&parser, &range) {
  103. cs = range.bus_addr >> 32;
  104. val = (range.size / SZ_32M) | 1;
  105. gprval |= val << cs * 3;
  106. i++;
  107. }
  108. if (i == 0)
  109. goto err;
  110. for (i = 0; i < ARRAY_SIZE(gprvals); i++) {
  111. if (gprval == gprvals[i]) {
  112. /* Found it. Set up IOMUXC_GPR1[11:0] with it. */
  113. regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval);
  114. return 0;
  115. }
  116. }
  117. err:
  118. dev_err(&pdev->dev, "Invalid 'ranges' configuration\n");
  119. return -EINVAL;
  120. }
  121. /* Parse and set the timing for this device. */
  122. static int weim_timing_setup(struct device *dev, struct device_node *np,
  123. const struct imx_weim_devtype *devtype)
  124. {
  125. u32 cs_idx, value[MAX_CS_REGS_COUNT];
  126. int i, ret;
  127. int reg_idx, num_regs;
  128. struct cs_timing *cst;
  129. struct weim_priv *priv;
  130. struct cs_timing_state *ts;
  131. void __iomem *base;
  132. if (WARN_ON(devtype->cs_regs_count > MAX_CS_REGS_COUNT))
  133. return -EINVAL;
  134. if (WARN_ON(devtype->cs_count > MAX_CS_COUNT))
  135. return -EINVAL;
  136. priv = dev_get_drvdata(dev);
  137. base = priv->base;
  138. ts = &priv->timing_state;
  139. ret = of_property_read_u32_array(np, "fsl,weim-cs-timing",
  140. value, devtype->cs_regs_count);
  141. if (ret)
  142. return ret;
  143. /*
  144. * the child node's "reg" property may contain multiple address ranges,
  145. * extract the chip select for each.
  146. */
  147. num_regs = of_property_count_elems_of_size(np, "reg", OF_REG_SIZE);
  148. if (num_regs < 0)
  149. return num_regs;
  150. if (!num_regs)
  151. return -EINVAL;
  152. for (reg_idx = 0; reg_idx < num_regs; reg_idx++) {
  153. /* get the CS index from this child node's "reg" property. */
  154. ret = of_property_read_u32_index(np, "reg",
  155. reg_idx * OF_REG_SIZE, &cs_idx);
  156. if (ret)
  157. break;
  158. if (cs_idx >= devtype->cs_count)
  159. return -EINVAL;
  160. /* prevent re-configuring a CS that's already been configured */
  161. cst = &ts->cs[cs_idx];
  162. if (cst->is_applied && memcmp(value, cst->regs,
  163. devtype->cs_regs_count * sizeof(u32))) {
  164. dev_err(dev, "fsl,weim-cs-timing conflict on %pOF", np);
  165. return -EINVAL;
  166. }
  167. /* set the timing for WEIM */
  168. for (i = 0; i < devtype->cs_regs_count; i++)
  169. writel(value[i],
  170. base + cs_idx * devtype->cs_stride + i * 4);
  171. if (!cst->is_applied) {
  172. cst->is_applied = true;
  173. memcpy(cst->regs, value,
  174. devtype->cs_regs_count * sizeof(u32));
  175. }
  176. }
  177. return 0;
  178. }
  179. static int weim_parse_dt(struct platform_device *pdev)
  180. {
  181. const struct imx_weim_devtype *devtype = device_get_match_data(&pdev->dev);
  182. int ret = 0, have_child = 0;
  183. struct device_node *child;
  184. struct weim_priv *priv;
  185. void __iomem *base;
  186. u32 reg;
  187. if (devtype == &imx50_weim_devtype) {
  188. ret = imx_weim_gpr_setup(pdev);
  189. if (ret)
  190. return ret;
  191. }
  192. priv = dev_get_drvdata(&pdev->dev);
  193. base = priv->base;
  194. if (of_property_read_bool(pdev->dev.of_node, "fsl,burst-clk-enable")) {
  195. if (devtype->wcr_bcm) {
  196. reg = readl(base + devtype->wcr_offset);
  197. reg |= devtype->wcr_bcm;
  198. if (of_property_read_bool(pdev->dev.of_node,
  199. "fsl,continuous-burst-clk")) {
  200. if (devtype->wcr_cont_bclk) {
  201. reg |= devtype->wcr_cont_bclk;
  202. } else {
  203. dev_err(&pdev->dev,
  204. "continuous burst clk not supported.\n");
  205. return -EINVAL;
  206. }
  207. }
  208. writel(reg, base + devtype->wcr_offset);
  209. } else {
  210. dev_err(&pdev->dev, "burst clk mode not supported.\n");
  211. return -EINVAL;
  212. }
  213. }
  214. for_each_available_child_of_node(pdev->dev.of_node, child) {
  215. ret = weim_timing_setup(&pdev->dev, child, devtype);
  216. if (ret)
  217. dev_warn(&pdev->dev, "%pOF set timing failed.\n",
  218. child);
  219. else
  220. have_child = 1;
  221. }
  222. if (have_child)
  223. ret = of_platform_default_populate(pdev->dev.of_node,
  224. NULL, &pdev->dev);
  225. if (ret)
  226. dev_err(&pdev->dev, "%pOF fail to create devices.\n",
  227. pdev->dev.of_node);
  228. return ret;
  229. }
  230. static int weim_probe(struct platform_device *pdev)
  231. {
  232. struct weim_priv *priv;
  233. struct clk *clk;
  234. void __iomem *base;
  235. int ret;
  236. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  237. if (!priv)
  238. return -ENOMEM;
  239. /* get the resource */
  240. base = devm_platform_ioremap_resource(pdev, 0);
  241. if (IS_ERR(base))
  242. return PTR_ERR(base);
  243. priv->base = base;
  244. dev_set_drvdata(&pdev->dev, priv);
  245. /* get the clock */
  246. clk = devm_clk_get_enabled(&pdev->dev, NULL);
  247. if (IS_ERR(clk))
  248. return PTR_ERR(clk);
  249. /* parse the device node */
  250. ret = weim_parse_dt(pdev);
  251. if (ret)
  252. return ret;
  253. dev_info(&pdev->dev, "Driver registered.\n");
  254. return 0;
  255. }
  256. #if IS_ENABLED(CONFIG_OF_DYNAMIC)
  257. static int of_weim_notify(struct notifier_block *nb, unsigned long action,
  258. void *arg)
  259. {
  260. const struct imx_weim_devtype *devtype;
  261. struct of_reconfig_data *rd = arg;
  262. const struct of_device_id *of_id;
  263. struct platform_device *pdev;
  264. int ret = NOTIFY_OK;
  265. switch (of_reconfig_get_state_change(action, rd)) {
  266. case OF_RECONFIG_CHANGE_ADD:
  267. of_id = of_match_node(weim_id_table, rd->dn->parent);
  268. if (!of_id)
  269. return NOTIFY_OK; /* not for us */
  270. devtype = of_id->data;
  271. pdev = of_find_device_by_node(rd->dn->parent);
  272. if (!pdev) {
  273. pr_err("%s: could not find platform device for '%pOF'\n",
  274. __func__, rd->dn->parent);
  275. return notifier_from_errno(-EINVAL);
  276. }
  277. if (weim_timing_setup(&pdev->dev, rd->dn, devtype))
  278. dev_warn(&pdev->dev,
  279. "Failed to setup timing for '%pOF'\n", rd->dn);
  280. if (!of_node_check_flag(rd->dn, OF_POPULATED)) {
  281. /*
  282. * Clear the flag before adding the device so that
  283. * fw_devlink doesn't skip adding consumers to this
  284. * device.
  285. */
  286. rd->dn->fwnode.flags &= ~FWNODE_FLAG_NOT_DEVICE;
  287. if (!of_platform_device_create(rd->dn, NULL, &pdev->dev)) {
  288. dev_err(&pdev->dev,
  289. "Failed to create child device '%pOF'\n",
  290. rd->dn);
  291. ret = notifier_from_errno(-EINVAL);
  292. }
  293. }
  294. platform_device_put(pdev);
  295. break;
  296. case OF_RECONFIG_CHANGE_REMOVE:
  297. if (!of_node_check_flag(rd->dn, OF_POPULATED))
  298. return NOTIFY_OK; /* device already destroyed */
  299. of_id = of_match_node(weim_id_table, rd->dn->parent);
  300. if (!of_id)
  301. return NOTIFY_OK; /* not for us */
  302. pdev = of_find_device_by_node(rd->dn);
  303. if (!pdev) {
  304. pr_err("Could not find platform device for '%pOF'\n",
  305. rd->dn);
  306. ret = notifier_from_errno(-EINVAL);
  307. } else {
  308. of_platform_device_destroy(&pdev->dev, NULL);
  309. platform_device_put(pdev);
  310. }
  311. break;
  312. default:
  313. break;
  314. }
  315. return ret;
  316. }
  317. static struct notifier_block weim_of_notifier = {
  318. .notifier_call = of_weim_notify,
  319. };
  320. #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
  321. static struct platform_driver weim_driver = {
  322. .driver = {
  323. .name = "imx-weim",
  324. .of_match_table = weim_id_table,
  325. },
  326. .probe = weim_probe,
  327. };
  328. static int __init weim_init(void)
  329. {
  330. #if IS_ENABLED(CONFIG_OF_DYNAMIC)
  331. WARN_ON(of_reconfig_notifier_register(&weim_of_notifier));
  332. #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
  333. return platform_driver_register(&weim_driver);
  334. }
  335. module_init(weim_init);
  336. static void __exit weim_exit(void)
  337. {
  338. #if IS_ENABLED(CONFIG_OF_DYNAMIC)
  339. of_reconfig_notifier_unregister(&weim_of_notifier);
  340. #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
  341. return platform_driver_unregister(&weim_driver);
  342. }
  343. module_exit(weim_exit);
  344. MODULE_AUTHOR("Freescale Semiconductor Inc.");
  345. MODULE_DESCRIPTION("i.MX EIM Controller Driver");
  346. MODULE_LICENSE("GPL");