npcm-rng.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2019 Nuvoton Technology corporation.
  3. #include <linux/kernel.h>
  4. #include <linux/module.h>
  5. #include <linux/io.h>
  6. #include <linux/iopoll.h>
  7. #include <linux/init.h>
  8. #include <linux/random.h>
  9. #include <linux/err.h>
  10. #include <linux/of.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/hw_random.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm_runtime.h>
  15. #define NPCM_RNGCS_REG 0x00 /* Control and status register */
  16. #define NPCM_RNGD_REG 0x04 /* Data register */
  17. #define NPCM_RNGMODE_REG 0x08 /* Mode register */
  18. #define NPCM_RNG_CLK_SET_62_5MHZ BIT(2) /* 60-80 MHz */
  19. #define NPCM_RNG_CLK_SET_25MHZ GENMASK(4, 3) /* 20-25 MHz */
  20. #define NPCM_RNG_DATA_VALID BIT(1)
  21. #define NPCM_RNG_ENABLE BIT(0)
  22. #define NPCM_RNG_M1ROSEL BIT(1)
  23. #define NPCM_RNG_TIMEOUT_USEC 20000
  24. #define NPCM_RNG_POLL_USEC 1000
  25. #define to_npcm_rng(p) container_of(p, struct npcm_rng, rng)
  26. struct npcm_rng {
  27. void __iomem *base;
  28. struct hwrng rng;
  29. u32 clkp;
  30. };
  31. static int npcm_rng_init(struct hwrng *rng)
  32. {
  33. struct npcm_rng *priv = to_npcm_rng(rng);
  34. writel(priv->clkp | NPCM_RNG_ENABLE, priv->base + NPCM_RNGCS_REG);
  35. return 0;
  36. }
  37. static void npcm_rng_cleanup(struct hwrng *rng)
  38. {
  39. struct npcm_rng *priv = to_npcm_rng(rng);
  40. writel(priv->clkp, priv->base + NPCM_RNGCS_REG);
  41. }
  42. static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
  43. {
  44. struct npcm_rng *priv = to_npcm_rng(rng);
  45. int retval = 0;
  46. int ready;
  47. pm_runtime_get_sync((struct device *)priv->rng.priv);
  48. while (max) {
  49. if (wait) {
  50. if (readb_poll_timeout(priv->base + NPCM_RNGCS_REG,
  51. ready,
  52. ready & NPCM_RNG_DATA_VALID,
  53. NPCM_RNG_POLL_USEC,
  54. NPCM_RNG_TIMEOUT_USEC))
  55. break;
  56. } else {
  57. if ((readb(priv->base + NPCM_RNGCS_REG) &
  58. NPCM_RNG_DATA_VALID) == 0)
  59. break;
  60. }
  61. *(u8 *)buf = readb(priv->base + NPCM_RNGD_REG);
  62. retval++;
  63. buf++;
  64. max--;
  65. }
  66. pm_runtime_mark_last_busy((struct device *)priv->rng.priv);
  67. pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv);
  68. return retval || !wait ? retval : -EIO;
  69. }
  70. static int npcm_rng_probe(struct platform_device *pdev)
  71. {
  72. struct npcm_rng *priv;
  73. int ret;
  74. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  75. if (!priv)
  76. return -ENOMEM;
  77. priv->base = devm_platform_ioremap_resource(pdev, 0);
  78. if (IS_ERR(priv->base))
  79. return PTR_ERR(priv->base);
  80. dev_set_drvdata(&pdev->dev, priv);
  81. pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
  82. pm_runtime_use_autosuspend(&pdev->dev);
  83. pm_runtime_enable(&pdev->dev);
  84. #ifndef CONFIG_PM
  85. priv->rng.init = npcm_rng_init;
  86. priv->rng.cleanup = npcm_rng_cleanup;
  87. #endif
  88. priv->rng.name = pdev->name;
  89. priv->rng.read = npcm_rng_read;
  90. priv->rng.priv = (unsigned long)&pdev->dev;
  91. priv->clkp = (u32)(uintptr_t)of_device_get_match_data(&pdev->dev);
  92. writel(NPCM_RNG_M1ROSEL, priv->base + NPCM_RNGMODE_REG);
  93. ret = devm_hwrng_register(&pdev->dev, &priv->rng);
  94. if (ret) {
  95. dev_err(&pdev->dev, "Failed to register rng device: %d\n",
  96. ret);
  97. pm_runtime_disable(&pdev->dev);
  98. pm_runtime_set_suspended(&pdev->dev);
  99. return ret;
  100. }
  101. return 0;
  102. }
  103. static void npcm_rng_remove(struct platform_device *pdev)
  104. {
  105. struct npcm_rng *priv = platform_get_drvdata(pdev);
  106. devm_hwrng_unregister(&pdev->dev, &priv->rng);
  107. pm_runtime_disable(&pdev->dev);
  108. pm_runtime_set_suspended(&pdev->dev);
  109. }
  110. #ifdef CONFIG_PM
  111. static int npcm_rng_runtime_suspend(struct device *dev)
  112. {
  113. struct npcm_rng *priv = dev_get_drvdata(dev);
  114. npcm_rng_cleanup(&priv->rng);
  115. return 0;
  116. }
  117. static int npcm_rng_runtime_resume(struct device *dev)
  118. {
  119. struct npcm_rng *priv = dev_get_drvdata(dev);
  120. return npcm_rng_init(&priv->rng);
  121. }
  122. #endif
  123. static const struct dev_pm_ops npcm_rng_pm_ops = {
  124. SET_RUNTIME_PM_OPS(npcm_rng_runtime_suspend,
  125. npcm_rng_runtime_resume, NULL)
  126. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  127. pm_runtime_force_resume)
  128. };
  129. static const struct of_device_id rng_dt_id[] __maybe_unused = {
  130. { .compatible = "nuvoton,npcm750-rng",
  131. .data = (void *)NPCM_RNG_CLK_SET_25MHZ },
  132. { .compatible = "nuvoton,npcm845-rng",
  133. .data = (void *)NPCM_RNG_CLK_SET_62_5MHZ },
  134. {},
  135. };
  136. MODULE_DEVICE_TABLE(of, rng_dt_id);
  137. static struct platform_driver npcm_rng_driver = {
  138. .driver = {
  139. .name = "npcm-rng",
  140. .pm = &npcm_rng_pm_ops,
  141. .of_match_table = of_match_ptr(rng_dt_id),
  142. },
  143. .probe = npcm_rng_probe,
  144. .remove_new = npcm_rng_remove,
  145. };
  146. module_platform_driver(npcm_rng_driver);
  147. MODULE_DESCRIPTION("Nuvoton NPCM Random Number Generator Driver");
  148. MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>");
  149. MODULE_LICENSE("GPL v2");