Kconfig 17 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config HAVE_CLK
  3. bool
  4. help
  5. The <linux/clk.h> calls support software clock gating and
  6. thus are a key power management tool on many systems.
  7. config HAVE_CLK_PREPARE
  8. bool
  9. config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
  10. bool
  11. select HAVE_CLK
  12. help
  13. Select this option when the clock API in <linux/clk.h> is implemented
  14. by platform/architecture code. This method is deprecated. Modern
  15. code should select COMMON_CLK instead and not define a custom
  16. 'struct clk'.
  17. menuconfig COMMON_CLK
  18. bool "Common Clock Framework"
  19. depends on !HAVE_LEGACY_CLK
  20. select HAVE_CLK_PREPARE
  21. select HAVE_CLK
  22. select RATIONAL
  23. help
  24. The common clock framework is a single definition of struct
  25. clk, useful across many platforms, as well as an
  26. implementation of the clock API in include/linux/clk.h.
  27. Architectures utilizing the common struct clk should select
  28. this option.
  29. if COMMON_CLK
  30. config COMMON_CLK_WM831X
  31. tristate "Clock driver for WM831x/2x PMICs"
  32. depends on MFD_WM831X
  33. help
  34. Supports the clocking subsystem of the WM831x/2x series of
  35. PMICs from Wolfson Microelectronics.
  36. source "drivers/clk/versatile/Kconfig"
  37. config CLK_HSDK
  38. bool "PLL Driver for HSDK platform"
  39. depends on ARC_SOC_HSDK || COMPILE_TEST
  40. depends on HAS_IOMEM
  41. help
  42. This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
  43. control.
  44. config LMK04832
  45. tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
  46. depends on SPI
  47. select REGMAP_SPI
  48. help
  49. Say yes here to build support for Texas Instruments' LMK04832 Ultra
  50. Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
  51. config COMMON_CLK_APPLE_NCO
  52. tristate "Clock driver for Apple SoC NCOs"
  53. depends on ARCH_APPLE || COMPILE_TEST
  54. default ARCH_APPLE
  55. help
  56. This driver supports NCO (Numerically Controlled Oscillator) blocks
  57. found on Apple SoCs such as t8103 (M1). The blocks are typically
  58. generators of audio clocks.
  59. config COMMON_CLK_MAX77686
  60. tristate "Clock driver for Maxim 77620/77686/77802 MFD"
  61. depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
  62. help
  63. This driver supports Maxim 77620/77686/77802 crystal oscillator
  64. clock.
  65. config COMMON_CLK_MAX9485
  66. tristate "Maxim 9485 Programmable Clock Generator"
  67. depends on I2C
  68. help
  69. This driver supports Maxim 9485 Programmable Audio Clock Generator
  70. config COMMON_CLK_RK808
  71. tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
  72. depends on MFD_RK8XX
  73. help
  74. This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
  75. These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
  76. Clkout1 is always on, Clkout2 can off by control register.
  77. config COMMON_CLK_HI655X
  78. tristate "Clock driver for Hi655x" if EXPERT
  79. depends on (MFD_HI655X_PMIC || COMPILE_TEST)
  80. select REGMAP
  81. default MFD_HI655X_PMIC
  82. help
  83. This driver supports the hi655x PMIC clock. This
  84. multi-function device has one fixed-rate oscillator, clocked
  85. at 32KHz.
  86. config COMMON_CLK_SCMI
  87. tristate "Clock driver controlled via SCMI interface"
  88. depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
  89. help
  90. This driver provides support for clocks that are controlled
  91. by firmware that implements the SCMI interface.
  92. This driver uses SCMI Message Protocol to interact with the
  93. firmware providing all the clock controls.
  94. config COMMON_CLK_SCPI
  95. tristate "Clock driver controlled via SCPI interface"
  96. depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
  97. help
  98. This driver provides support for clocks that are controlled
  99. by firmware that implements the SCPI interface.
  100. This driver uses SCPI Message Protocol to interact with the
  101. firmware providing all the clock controls.
  102. config COMMON_CLK_SI5341
  103. tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
  104. depends on I2C
  105. select REGMAP_I2C
  106. help
  107. This driver supports Silicon Labs Si5341 and Si5340 programmable clock
  108. generators. Not all features of these chips are currently supported
  109. by the driver, in particular it only supports XTAL input. The chip can
  110. be pre-programmed to support other configurations and features not yet
  111. implemented in the driver.
  112. config COMMON_CLK_SI5351
  113. tristate "Clock driver for SiLabs 5351A/B/C"
  114. depends on I2C
  115. select REGMAP_I2C
  116. help
  117. This driver supports Silicon Labs 5351A/B/C programmable clock
  118. generators.
  119. config COMMON_CLK_SI514
  120. tristate "Clock driver for SiLabs 514 devices"
  121. depends on I2C
  122. depends on OF
  123. select REGMAP_I2C
  124. help
  125. This driver supports the Silicon Labs 514 programmable clock
  126. generator.
  127. config COMMON_CLK_SI544
  128. tristate "Clock driver for SiLabs 544 devices"
  129. depends on I2C
  130. select REGMAP_I2C
  131. help
  132. This driver supports the Silicon Labs 544 programmable clock
  133. generator.
  134. config COMMON_CLK_SI570
  135. tristate "Clock driver for SiLabs 570 and compatible devices"
  136. depends on I2C
  137. depends on OF
  138. select REGMAP_I2C
  139. help
  140. This driver supports Silicon Labs 570/571/598/599 programmable
  141. clock generators.
  142. config COMMON_CLK_BM1880
  143. bool "Clock driver for Bitmain BM1880 SoC"
  144. depends on ARCH_BITMAIN || COMPILE_TEST
  145. default ARCH_BITMAIN
  146. help
  147. This driver supports the clocks on Bitmain BM1880 SoC.
  148. config COMMON_CLK_CDCE706
  149. tristate "Clock driver for TI CDCE706 clock synthesizer"
  150. depends on I2C
  151. select REGMAP_I2C
  152. help
  153. This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
  154. config COMMON_CLK_TPS68470
  155. tristate "Clock Driver for TI TPS68470 PMIC"
  156. depends on I2C
  157. depends on INTEL_SKL_INT3472 || COMPILE_TEST
  158. select REGMAP_I2C
  159. help
  160. This driver supports the clocks provided by the TPS68470 PMIC.
  161. config COMMON_CLK_CDCE925
  162. tristate "Clock driver for TI CDCE913/925/937/949 devices"
  163. depends on I2C
  164. depends on OF
  165. select REGMAP_I2C
  166. help
  167. This driver supports the TI CDCE913/925/937/949 programmable clock
  168. synthesizer. Each chip has different number of PLLs and outputs.
  169. For example, the CDCE925 contains two PLLs with spread-spectrum
  170. clocking support and five output dividers. The driver only supports
  171. the following setup, and uses a fixed setting for the output muxes.
  172. Y1 is derived from the input clock
  173. Y2 and Y3 derive from PLL1
  174. Y4 and Y5 derive from PLL2
  175. Given a target output frequency, the driver will set the PLL and
  176. divider to best approximate the desired output.
  177. config COMMON_CLK_CS2000_CP
  178. tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
  179. depends on I2C
  180. select REGMAP_I2C
  181. help
  182. If you say yes here you get support for the CS2000 clock multiplier.
  183. config COMMON_CLK_EN7523
  184. bool "Clock driver for Airoha EN7523 SoC system clocks"
  185. depends on OF
  186. depends on ARCH_AIROHA || COMPILE_TEST
  187. default ARCH_AIROHA
  188. help
  189. This driver provides the fixed clocks and gates present on Airoha
  190. ARM silicon.
  191. config COMMON_CLK_EP93XX
  192. tristate "Clock driver for Cirrus Logic ep93xx SoC"
  193. depends on ARCH_EP93XX || COMPILE_TEST
  194. select AUXILIARY_BUS
  195. select REGMAP_MMIO
  196. help
  197. This driver supports the SoC clocks on the Cirrus Logic ep93xx.
  198. config COMMON_CLK_FSL_FLEXSPI
  199. tristate "Clock driver for FlexSPI on Layerscape SoCs"
  200. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  201. default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
  202. help
  203. On Layerscape SoCs there is a special clock for the FlexSPI
  204. interface.
  205. config COMMON_CLK_FSL_SAI
  206. bool "Clock driver for BCLK of Freescale SAI cores"
  207. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  208. help
  209. This driver supports the Freescale SAI (Synchronous Audio Interface)
  210. to be used as a generic clock output. Some SoCs have restrictions
  211. regarding the possible pin multiplexer settings. Eg. on some SoCs
  212. two SAI interfaces can only be enabled together. If just one is
  213. needed, the BCLK pin of the second one can be used as general
  214. purpose clock output. Ideally, it can be used to drive an audio
  215. codec (sometimes known as MCLK).
  216. config COMMON_CLK_GEMINI
  217. bool "Clock driver for Cortina Systems Gemini SoC"
  218. depends on ARCH_GEMINI || COMPILE_TEST
  219. select MFD_SYSCON
  220. select RESET_CONTROLLER
  221. help
  222. This driver supports the SoC clocks on the Cortina Systems Gemini
  223. platform, also known as SL3516 or CS3516.
  224. config COMMON_CLK_LAN966X
  225. tristate "Generic Clock Controller driver for LAN966X SoC"
  226. depends on HAS_IOMEM
  227. depends on OF
  228. depends on SOC_LAN966 || COMPILE_TEST
  229. help
  230. This driver provides support for Generic Clock Controller(GCK) on
  231. LAN966X SoC. GCK generates and supplies clock to various peripherals
  232. within the SoC.
  233. config COMMON_CLK_ASPEED
  234. bool "Clock driver for Aspeed BMC SoCs"
  235. depends on ARCH_ASPEED || COMPILE_TEST
  236. default ARCH_ASPEED
  237. select MFD_SYSCON
  238. select RESET_CONTROLLER
  239. help
  240. This driver supports the SoC clocks on the Aspeed BMC platforms.
  241. The G4 and G5 series, including the ast2400 and ast2500, are supported
  242. by this driver.
  243. config COMMON_CLK_S2MPS11
  244. tristate "Clock driver for S2MPS1X/S5M8767 MFD"
  245. depends on MFD_SEC_CORE || COMPILE_TEST
  246. help
  247. This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
  248. clock. These multi-function devices have two (S2MPS14) or three
  249. (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
  250. config CLK_TWL
  251. tristate "Clock driver for the TWL PMIC family"
  252. depends on TWL4030_CORE
  253. help
  254. Enable support for controlling the clock resources on TWL family
  255. PMICs. These devices have some 32K clock outputs which can be
  256. controlled by software. For now, only the TWL6032 clocks are
  257. supported.
  258. config CLK_TWL6040
  259. tristate "External McPDM functional clock from twl6040"
  260. depends on TWL6040_CORE
  261. help
  262. Enable the external functional clock support on OMAP4+ platforms for
  263. McPDM. McPDM module is using the external bit clock on the McPDM bus
  264. as functional clock.
  265. config COMMON_CLK_AXI_CLKGEN
  266. tristate "AXI clkgen driver"
  267. depends on HAS_IOMEM || COMPILE_TEST
  268. depends on OF
  269. help
  270. Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
  271. FPGAs. It is commonly used in Analog Devices' reference designs.
  272. config CLK_QORIQ
  273. bool "Clock driver for Freescale QorIQ platforms"
  274. depends on OF
  275. depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
  276. help
  277. This adds the clock driver support for Freescale QorIQ platforms
  278. using common clock framework.
  279. config CLK_LS1028A_PLLDIG
  280. tristate "Clock driver for LS1028A Display output"
  281. depends on ARCH_LAYERSCAPE || COMPILE_TEST
  282. default ARCH_LAYERSCAPE
  283. help
  284. This driver support the Display output interfaces(LCD, DPHY) pixel clocks
  285. of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
  286. features of the PLL are currently supported by the driver. By default,
  287. configured bypass mode with this PLL.
  288. config COMMON_CLK_XGENE
  289. bool "Clock driver for APM XGene SoC"
  290. default ARCH_XGENE
  291. depends on ARM64 || COMPILE_TEST
  292. help
  293. Support for the APM X-Gene SoC reference, PLL, and device clocks.
  294. config COMMON_CLK_LOCHNAGAR
  295. tristate "Cirrus Logic Lochnagar clock driver"
  296. depends on MFD_LOCHNAGAR
  297. help
  298. This driver supports the clocking features of the Cirrus Logic
  299. Lochnagar audio development board.
  300. config COMMON_CLK_LOONGSON2
  301. bool "Clock driver for Loongson-2 SoC"
  302. depends on LOONGARCH || COMPILE_TEST
  303. help
  304. This driver provides support for clock controller on Loongson-2 SoC.
  305. The clock controller can generates and supplies clock to various
  306. peripherals within the SoC.
  307. Say Y here to support Loongson-2 SoC clock driver.
  308. config COMMON_CLK_NXP
  309. def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
  310. select REGMAP_MMIO if ARCH_LPC32XX
  311. select MFD_SYSCON if ARCH_LPC18XX
  312. help
  313. Support for clock providers on NXP platforms.
  314. config COMMON_CLK_PALMAS
  315. tristate "Clock driver for TI Palmas devices"
  316. depends on MFD_PALMAS
  317. help
  318. This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
  319. using common clock framework.
  320. config COMMON_CLK_PWM
  321. tristate "Clock driver for PWMs used as clock outputs"
  322. depends on PWM
  323. help
  324. Adapter driver so that any PWM output can be (mis)used as clock signal
  325. at 50% duty cycle.
  326. config COMMON_CLK_PXA
  327. def_bool COMMON_CLK && ARCH_PXA
  328. help
  329. Support for the Marvell PXA SoC.
  330. config COMMON_CLK_RS9_PCIE
  331. tristate "Clock driver for Renesas 9-series PCIe clock generators"
  332. depends on I2C
  333. depends on OF
  334. select REGMAP_I2C
  335. help
  336. This driver supports the Renesas 9-series PCIe clock generator
  337. models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
  338. config COMMON_CLK_SI521XX
  339. tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
  340. depends on I2C
  341. depends on OF
  342. select REGMAP_I2C
  343. help
  344. This driver supports the SkyWorks Si521xx PCIe clock generator
  345. models Si52144/Si52146/Si52147.
  346. config COMMON_CLK_VC3
  347. tristate "Clock driver for Renesas VersaClock 3 devices"
  348. depends on I2C
  349. depends on OF
  350. select REGMAP_I2C
  351. help
  352. This driver supports the Renesas VersaClock 3 programmable clock
  353. generators.
  354. config COMMON_CLK_VC5
  355. tristate "Clock driver for IDT VersaClock 5,6 devices"
  356. depends on I2C
  357. depends on OF
  358. select REGMAP_I2C
  359. help
  360. This driver supports the IDT VersaClock 5 and VersaClock 6
  361. programmable clock generators.
  362. config COMMON_CLK_VC7
  363. tristate "Clock driver for Renesas Versaclock 7 devices"
  364. depends on I2C
  365. depends on OF
  366. select REGMAP_I2C
  367. help
  368. Renesas Versaclock7 is a family of configurable clock generator
  369. and jitter attenuator ICs with fractional and integer dividers.
  370. config COMMON_CLK_STM32F
  371. def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
  372. help
  373. Support for stm32f4 and stm32f7 SoC families clocks
  374. config COMMON_CLK_STM32H7
  375. def_bool COMMON_CLK && MACH_STM32H743
  376. help
  377. Support for stm32h7 SoC family clocks
  378. config COMMON_CLK_MMP2
  379. def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
  380. help
  381. Support for Marvell MMP2 and MMP3 SoC clocks
  382. config COMMON_CLK_MMP2_AUDIO
  383. tristate "Clock driver for MMP2 Audio subsystem"
  384. depends on COMMON_CLK_MMP2 || COMPILE_TEST
  385. help
  386. This driver supports clocks for Audio subsystem on MMP2 SoC.
  387. config COMMON_CLK_BD718XX
  388. tristate "Clock driver for 32K clk gates on ROHM PMICs"
  389. depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
  390. help
  391. This driver supports ROHM BD71837, BD71847, BD71850, BD71815
  392. and BD71828 PMICs clock gates.
  393. config COMMON_CLK_FIXED_MMIO
  394. bool "Clock driver for Memory Mapped Fixed values"
  395. depends on COMMON_CLK && OF
  396. depends on HAS_IOMEM
  397. help
  398. Support for Memory Mapped IO Fixed clocks
  399. config COMMON_CLK_K210
  400. bool "Clock driver for the Canaan Kendryte K210 SoC"
  401. depends on OF && RISCV && SOC_CANAAN_K210
  402. default SOC_CANAAN_K210
  403. help
  404. Support for the Canaan Kendryte K210 RISC-V SoC clocks.
  405. config COMMON_CLK_SP7021
  406. tristate "Clock driver for Sunplus SP7021 SoC"
  407. depends on SOC_SP7021 || COMPILE_TEST
  408. default SOC_SP7021
  409. help
  410. This driver supports the Sunplus SP7021 SoC clocks.
  411. It implements SP7021 PLLs/gate.
  412. Not all features of the PLL are currently supported
  413. by the driver.
  414. source "drivers/clk/actions/Kconfig"
  415. source "drivers/clk/analogbits/Kconfig"
  416. source "drivers/clk/baikal-t1/Kconfig"
  417. source "drivers/clk/bcm/Kconfig"
  418. source "drivers/clk/hisilicon/Kconfig"
  419. source "drivers/clk/imgtec/Kconfig"
  420. source "drivers/clk/imx/Kconfig"
  421. source "drivers/clk/ingenic/Kconfig"
  422. source "drivers/clk/keystone/Kconfig"
  423. source "drivers/clk/mediatek/Kconfig"
  424. source "drivers/clk/meson/Kconfig"
  425. source "drivers/clk/mstar/Kconfig"
  426. source "drivers/clk/microchip/Kconfig"
  427. source "drivers/clk/mvebu/Kconfig"
  428. source "drivers/clk/nuvoton/Kconfig"
  429. source "drivers/clk/pistachio/Kconfig"
  430. source "drivers/clk/qcom/Kconfig"
  431. source "drivers/clk/ralink/Kconfig"
  432. source "drivers/clk/renesas/Kconfig"
  433. source "drivers/clk/rockchip/Kconfig"
  434. source "drivers/clk/samsung/Kconfig"
  435. source "drivers/clk/sifive/Kconfig"
  436. source "drivers/clk/socfpga/Kconfig"
  437. source "drivers/clk/sophgo/Kconfig"
  438. source "drivers/clk/sprd/Kconfig"
  439. source "drivers/clk/starfive/Kconfig"
  440. source "drivers/clk/sunxi/Kconfig"
  441. source "drivers/clk/sunxi-ng/Kconfig"
  442. source "drivers/clk/tegra/Kconfig"
  443. source "drivers/clk/thead/Kconfig"
  444. source "drivers/clk/stm32/Kconfig"
  445. source "drivers/clk/ti/Kconfig"
  446. source "drivers/clk/uniphier/Kconfig"
  447. source "drivers/clk/visconti/Kconfig"
  448. source "drivers/clk/x86/Kconfig"
  449. source "drivers/clk/xilinx/Kconfig"
  450. source "drivers/clk/zynqmp/Kconfig"
  451. # Kunit test cases
  452. config CLK_KUNIT_TEST
  453. tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
  454. depends on KUNIT
  455. default KUNIT_ALL_TESTS
  456. select DTC
  457. help
  458. Kunit tests for the common clock framework.
  459. config CLK_FIXED_RATE_KUNIT_TEST
  460. tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS
  461. depends on KUNIT
  462. default KUNIT_ALL_TESTS
  463. select DTC
  464. help
  465. KUnit tests for the basic fixed rate clk type.
  466. config CLK_GATE_KUNIT_TEST
  467. tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
  468. depends on KUNIT
  469. depends on !S390
  470. default KUNIT_ALL_TESTS
  471. help
  472. Kunit test for the basic clk gate type.
  473. config CLK_FD_KUNIT_TEST
  474. tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS
  475. depends on KUNIT
  476. default KUNIT_ALL_TESTS
  477. help
  478. Kunit test for the clk-fractional-divider type.
  479. endif