clk-raspberrypi.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Raspberry Pi driver for firmware controlled clocks
  4. *
  5. * Even though clk-bcm2835 provides an interface to the hardware registers for
  6. * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
  7. * We're not allowed to change it directly as we might race with the
  8. * over-temperature and under-voltage protections provided by the firmware.
  9. *
  10. * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
  11. */
  12. #include <linux/clkdev.h>
  13. #include <linux/clk-provider.h>
  14. #include <linux/io.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <soc/bcm2835/raspberrypi-firmware.h>
  18. static char *rpi_firmware_clk_names[] = {
  19. [RPI_FIRMWARE_EMMC_CLK_ID] = "emmc",
  20. [RPI_FIRMWARE_UART_CLK_ID] = "uart",
  21. [RPI_FIRMWARE_ARM_CLK_ID] = "arm",
  22. [RPI_FIRMWARE_CORE_CLK_ID] = "core",
  23. [RPI_FIRMWARE_V3D_CLK_ID] = "v3d",
  24. [RPI_FIRMWARE_H264_CLK_ID] = "h264",
  25. [RPI_FIRMWARE_ISP_CLK_ID] = "isp",
  26. [RPI_FIRMWARE_SDRAM_CLK_ID] = "sdram",
  27. [RPI_FIRMWARE_PIXEL_CLK_ID] = "pixel",
  28. [RPI_FIRMWARE_PWM_CLK_ID] = "pwm",
  29. [RPI_FIRMWARE_HEVC_CLK_ID] = "hevc",
  30. [RPI_FIRMWARE_EMMC2_CLK_ID] = "emmc2",
  31. [RPI_FIRMWARE_M2MC_CLK_ID] = "m2mc",
  32. [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
  33. [RPI_FIRMWARE_VEC_CLK_ID] = "vec",
  34. };
  35. #define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0)
  36. #define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1)
  37. struct raspberrypi_clk_variant;
  38. struct raspberrypi_clk {
  39. struct device *dev;
  40. struct rpi_firmware *firmware;
  41. struct platform_device *cpufreq;
  42. };
  43. struct raspberrypi_clk_data {
  44. struct clk_hw hw;
  45. unsigned int id;
  46. struct raspberrypi_clk_variant *variant;
  47. struct raspberrypi_clk *rpi;
  48. };
  49. struct raspberrypi_clk_variant {
  50. bool export;
  51. char *clkdev;
  52. unsigned long min_rate;
  53. bool minimize;
  54. };
  55. static struct raspberrypi_clk_variant
  56. raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
  57. [RPI_FIRMWARE_ARM_CLK_ID] = {
  58. .export = true,
  59. .clkdev = "cpu0",
  60. },
  61. [RPI_FIRMWARE_CORE_CLK_ID] = {
  62. .export = true,
  63. /*
  64. * The clock is shared between the HVS and the CSI
  65. * controllers, on the BCM2711 and will change depending
  66. * on the pixels composited on the HVS and the capture
  67. * resolution on Unicam.
  68. *
  69. * Since the rate can get quite large, and we need to
  70. * coordinate between both driver instances, let's
  71. * always use the minimum the drivers will let us.
  72. */
  73. .minimize = true,
  74. },
  75. [RPI_FIRMWARE_M2MC_CLK_ID] = {
  76. .export = true,
  77. /*
  78. * If we boot without any cable connected to any of the
  79. * HDMI connector, the firmware will skip the HSM
  80. * initialization and leave it with a rate of 0,
  81. * resulting in a bus lockup when we're accessing the
  82. * registers even if it's enabled.
  83. *
  84. * Let's put a sensible default so that we don't end up
  85. * in this situation.
  86. */
  87. .min_rate = 120000000,
  88. /*
  89. * The clock is shared between the two HDMI controllers
  90. * on the BCM2711 and will change depending on the
  91. * resolution output on each. Since the rate can get
  92. * quite large, and we need to coordinate between both
  93. * driver instances, let's always use the minimum the
  94. * drivers will let us.
  95. */
  96. .minimize = true,
  97. },
  98. [RPI_FIRMWARE_V3D_CLK_ID] = {
  99. .export = true,
  100. },
  101. [RPI_FIRMWARE_PIXEL_CLK_ID] = {
  102. .export = true,
  103. },
  104. [RPI_FIRMWARE_HEVC_CLK_ID] = {
  105. .export = true,
  106. },
  107. [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
  108. .export = true,
  109. },
  110. [RPI_FIRMWARE_VEC_CLK_ID] = {
  111. .export = true,
  112. },
  113. };
  114. /*
  115. * Structure of the message passed to Raspberry Pi's firmware in order to
  116. * change clock rates. The 'disable_turbo' option is only available to the ARM
  117. * clock (pllb) which we enable by default as turbo mode will alter multiple
  118. * clocks at once.
  119. *
  120. * Even though we're able to access the clock registers directly we're bound to
  121. * use the firmware interface as the firmware ultimately takes care of
  122. * mitigating overheating/undervoltage situations and we would be changing
  123. * frequencies behind his back.
  124. *
  125. * For more information on the firmware interface check:
  126. * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
  127. */
  128. struct raspberrypi_firmware_prop {
  129. __le32 id;
  130. __le32 val;
  131. __le32 disable_turbo;
  132. } __packed;
  133. static int raspberrypi_clock_property(struct rpi_firmware *firmware,
  134. const struct raspberrypi_clk_data *data,
  135. u32 tag, u32 *val)
  136. {
  137. struct raspberrypi_firmware_prop msg = {
  138. .id = cpu_to_le32(data->id),
  139. .val = cpu_to_le32(*val),
  140. .disable_turbo = cpu_to_le32(1),
  141. };
  142. int ret;
  143. ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
  144. if (ret)
  145. return ret;
  146. *val = le32_to_cpu(msg.val);
  147. return 0;
  148. }
  149. static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
  150. {
  151. struct raspberrypi_clk_data *data =
  152. container_of(hw, struct raspberrypi_clk_data, hw);
  153. struct raspberrypi_clk *rpi = data->rpi;
  154. u32 val = 0;
  155. int ret;
  156. ret = raspberrypi_clock_property(rpi->firmware, data,
  157. RPI_FIRMWARE_GET_CLOCK_STATE, &val);
  158. if (ret)
  159. return 0;
  160. return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
  161. }
  162. static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
  163. unsigned long parent_rate)
  164. {
  165. struct raspberrypi_clk_data *data =
  166. container_of(hw, struct raspberrypi_clk_data, hw);
  167. struct raspberrypi_clk *rpi = data->rpi;
  168. u32 val = 0;
  169. int ret;
  170. ret = raspberrypi_clock_property(rpi->firmware, data,
  171. RPI_FIRMWARE_GET_CLOCK_RATE, &val);
  172. if (ret)
  173. return 0;
  174. return val;
  175. }
  176. static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
  177. unsigned long parent_rate)
  178. {
  179. struct raspberrypi_clk_data *data =
  180. container_of(hw, struct raspberrypi_clk_data, hw);
  181. struct raspberrypi_clk *rpi = data->rpi;
  182. u32 _rate = rate;
  183. int ret;
  184. ret = raspberrypi_clock_property(rpi->firmware, data,
  185. RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
  186. if (ret)
  187. dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n",
  188. clk_hw_get_name(hw), ret);
  189. return ret;
  190. }
  191. static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
  192. struct clk_rate_request *req)
  193. {
  194. struct raspberrypi_clk_data *data =
  195. container_of(hw, struct raspberrypi_clk_data, hw);
  196. struct raspberrypi_clk_variant *variant = data->variant;
  197. /*
  198. * The firmware will do the rounding but that isn't part of
  199. * the interface with the firmware, so we just do our best
  200. * here.
  201. */
  202. req->rate = clamp(req->rate, req->min_rate, req->max_rate);
  203. /*
  204. * We want to aggressively reduce the clock rate here, so let's
  205. * just ignore the requested rate and return the bare minimum
  206. * rate we can get away with.
  207. */
  208. if (variant->minimize && req->min_rate > 0)
  209. req->rate = req->min_rate;
  210. return 0;
  211. }
  212. static const struct clk_ops raspberrypi_firmware_clk_ops = {
  213. .is_prepared = raspberrypi_fw_is_prepared,
  214. .recalc_rate = raspberrypi_fw_get_rate,
  215. .determine_rate = raspberrypi_fw_dumb_determine_rate,
  216. .set_rate = raspberrypi_fw_set_rate,
  217. };
  218. static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
  219. unsigned int parent,
  220. unsigned int id,
  221. struct raspberrypi_clk_variant *variant)
  222. {
  223. struct raspberrypi_clk_data *data;
  224. struct clk_init_data init = {};
  225. u32 min_rate, max_rate;
  226. int ret;
  227. data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
  228. if (!data)
  229. return ERR_PTR(-ENOMEM);
  230. data->rpi = rpi;
  231. data->id = id;
  232. data->variant = variant;
  233. init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
  234. "fw-clk-%s",
  235. rpi_firmware_clk_names[id]);
  236. init.ops = &raspberrypi_firmware_clk_ops;
  237. init.flags = CLK_GET_RATE_NOCACHE;
  238. data->hw.init = &init;
  239. ret = raspberrypi_clock_property(rpi->firmware, data,
  240. RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
  241. &min_rate);
  242. if (ret) {
  243. dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n",
  244. id, ret);
  245. return ERR_PTR(ret);
  246. }
  247. ret = raspberrypi_clock_property(rpi->firmware, data,
  248. RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
  249. &max_rate);
  250. if (ret) {
  251. dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
  252. id, ret);
  253. return ERR_PTR(ret);
  254. }
  255. ret = devm_clk_hw_register(rpi->dev, &data->hw);
  256. if (ret)
  257. return ERR_PTR(ret);
  258. clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
  259. if (variant->clkdev) {
  260. ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
  261. NULL, variant->clkdev);
  262. if (ret) {
  263. dev_err(rpi->dev, "Failed to initialize clkdev\n");
  264. return ERR_PTR(ret);
  265. }
  266. }
  267. if (variant->min_rate) {
  268. unsigned long rate;
  269. clk_hw_set_rate_range(&data->hw, variant->min_rate, max_rate);
  270. rate = raspberrypi_fw_get_rate(&data->hw, 0);
  271. if (rate < variant->min_rate) {
  272. ret = raspberrypi_fw_set_rate(&data->hw, variant->min_rate, 0);
  273. if (ret)
  274. return ERR_PTR(ret);
  275. }
  276. }
  277. return &data->hw;
  278. }
  279. struct rpi_firmware_get_clocks_response {
  280. u32 parent;
  281. u32 id;
  282. };
  283. static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
  284. struct clk_hw_onecell_data *data)
  285. {
  286. struct rpi_firmware_get_clocks_response *clks;
  287. int ret;
  288. /*
  289. * The firmware doesn't guarantee that the last element of
  290. * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional
  291. * zero element as sentinel.
  292. */
  293. clks = devm_kcalloc(rpi->dev,
  294. RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks),
  295. GFP_KERNEL);
  296. if (!clks)
  297. return -ENOMEM;
  298. ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
  299. clks,
  300. sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
  301. if (ret)
  302. return ret;
  303. while (clks->id) {
  304. struct raspberrypi_clk_variant *variant;
  305. if (clks->id >= RPI_FIRMWARE_NUM_CLK_ID) {
  306. dev_err(rpi->dev, "Unknown clock id: %u (max: %u)\n",
  307. clks->id, RPI_FIRMWARE_NUM_CLK_ID - 1);
  308. return -EINVAL;
  309. }
  310. variant = &raspberrypi_clk_variants[clks->id];
  311. if (variant->export) {
  312. struct clk_hw *hw;
  313. hw = raspberrypi_clk_register(rpi, clks->parent,
  314. clks->id, variant);
  315. if (IS_ERR(hw))
  316. return PTR_ERR(hw);
  317. data->num = clks->id + 1;
  318. data->hws[clks->id] = hw;
  319. }
  320. clks++;
  321. }
  322. return 0;
  323. }
  324. static int raspberrypi_clk_probe(struct platform_device *pdev)
  325. {
  326. struct clk_hw_onecell_data *clk_data;
  327. struct device_node *firmware_node;
  328. struct device *dev = &pdev->dev;
  329. struct rpi_firmware *firmware;
  330. struct raspberrypi_clk *rpi;
  331. int ret;
  332. /*
  333. * We can be probed either through the an old-fashioned
  334. * platform device registration or through a DT node that is a
  335. * child of the firmware node. Handle both cases.
  336. */
  337. if (dev->of_node)
  338. firmware_node = of_get_parent(dev->of_node);
  339. else
  340. firmware_node = of_find_compatible_node(NULL, NULL,
  341. "raspberrypi,bcm2835-firmware");
  342. if (!firmware_node) {
  343. dev_err(dev, "Missing firmware node\n");
  344. return -ENOENT;
  345. }
  346. firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
  347. of_node_put(firmware_node);
  348. if (!firmware)
  349. return -EPROBE_DEFER;
  350. rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
  351. if (!rpi)
  352. return -ENOMEM;
  353. rpi->dev = dev;
  354. rpi->firmware = firmware;
  355. platform_set_drvdata(pdev, rpi);
  356. clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
  357. RPI_FIRMWARE_NUM_CLK_ID),
  358. GFP_KERNEL);
  359. if (!clk_data)
  360. return -ENOMEM;
  361. ret = raspberrypi_discover_clocks(rpi, clk_data);
  362. if (ret)
  363. return ret;
  364. ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
  365. clk_data);
  366. if (ret)
  367. return ret;
  368. rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
  369. -1, NULL, 0);
  370. return 0;
  371. }
  372. static void raspberrypi_clk_remove(struct platform_device *pdev)
  373. {
  374. struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
  375. platform_device_unregister(rpi->cpufreq);
  376. }
  377. static const struct of_device_id raspberrypi_clk_match[] = {
  378. { .compatible = "raspberrypi,firmware-clocks" },
  379. { },
  380. };
  381. MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
  382. static struct platform_driver raspberrypi_clk_driver = {
  383. .driver = {
  384. .name = "raspberrypi-clk",
  385. .of_match_table = raspberrypi_clk_match,
  386. },
  387. .probe = raspberrypi_clk_probe,
  388. .remove = raspberrypi_clk_remove,
  389. };
  390. module_platform_driver(raspberrypi_clk_driver);
  391. MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
  392. MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
  393. MODULE_LICENSE("GPL");
  394. MODULE_ALIAS("platform:raspberrypi-clk");