clk-conf.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2014 Samsung Electronics Co., Ltd.
  4. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/clk-provider.h>
  8. #include <linux/clk/clk-conf.h>
  9. #include <linux/device.h>
  10. #include <linux/of.h>
  11. #include <linux/printk.h>
  12. #include <linux/slab.h>
  13. static int __set_clk_parents(struct device_node *node, bool clk_supplier)
  14. {
  15. struct of_phandle_args clkspec;
  16. int index, rc, num_parents;
  17. struct clk *clk, *pclk;
  18. num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
  19. "#clock-cells");
  20. if (num_parents == -EINVAL)
  21. pr_err("clk: invalid value of clock-parents property at %pOF\n",
  22. node);
  23. for (index = 0; index < num_parents; index++) {
  24. rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
  25. "#clock-cells", index, &clkspec);
  26. if (rc < 0) {
  27. /* skip empty (null) phandles */
  28. if (rc == -ENOENT)
  29. continue;
  30. else
  31. return rc;
  32. }
  33. if (clkspec.np == node && !clk_supplier) {
  34. of_node_put(clkspec.np);
  35. return 0;
  36. }
  37. pclk = of_clk_get_from_provider(&clkspec);
  38. of_node_put(clkspec.np);
  39. if (IS_ERR(pclk)) {
  40. if (PTR_ERR(pclk) != -EPROBE_DEFER)
  41. pr_warn("clk: couldn't get parent clock %d for %pOF\n",
  42. index, node);
  43. return PTR_ERR(pclk);
  44. }
  45. rc = of_parse_phandle_with_args(node, "assigned-clocks",
  46. "#clock-cells", index, &clkspec);
  47. if (rc < 0)
  48. goto err;
  49. if (clkspec.np == node && !clk_supplier) {
  50. of_node_put(clkspec.np);
  51. rc = 0;
  52. goto err;
  53. }
  54. clk = of_clk_get_from_provider(&clkspec);
  55. of_node_put(clkspec.np);
  56. if (IS_ERR(clk)) {
  57. if (PTR_ERR(clk) != -EPROBE_DEFER)
  58. pr_warn("clk: couldn't get assigned clock %d for %pOF\n",
  59. index, node);
  60. rc = PTR_ERR(clk);
  61. goto err;
  62. }
  63. rc = clk_set_parent(clk, pclk);
  64. if (rc < 0)
  65. pr_err("clk: failed to reparent %s to %s: %d\n",
  66. __clk_get_name(clk), __clk_get_name(pclk), rc);
  67. clk_put(clk);
  68. clk_put(pclk);
  69. }
  70. return 0;
  71. err:
  72. clk_put(pclk);
  73. return rc;
  74. }
  75. static int __set_clk_rates(struct device_node *node, bool clk_supplier)
  76. {
  77. struct of_phandle_args clkspec;
  78. int rc, count, count_64, index;
  79. struct clk *clk;
  80. u64 *rates_64 __free(kfree) = NULL;
  81. u32 *rates __free(kfree) = NULL;
  82. count = of_property_count_u32_elems(node, "assigned-clock-rates");
  83. count_64 = of_property_count_u64_elems(node, "assigned-clock-rates-u64");
  84. if (count_64 > 0) {
  85. count = count_64;
  86. rates_64 = kcalloc(count, sizeof(*rates_64), GFP_KERNEL);
  87. if (!rates_64)
  88. return -ENOMEM;
  89. rc = of_property_read_u64_array(node,
  90. "assigned-clock-rates-u64",
  91. rates_64, count);
  92. } else if (count > 0) {
  93. rates = kcalloc(count, sizeof(*rates), GFP_KERNEL);
  94. if (!rates)
  95. return -ENOMEM;
  96. rc = of_property_read_u32_array(node, "assigned-clock-rates",
  97. rates, count);
  98. } else {
  99. return 0;
  100. }
  101. if (rc)
  102. return rc;
  103. for (index = 0; index < count; index++) {
  104. unsigned long rate;
  105. if (rates_64)
  106. rate = rates_64[index];
  107. else
  108. rate = rates[index];
  109. if (rate) {
  110. rc = of_parse_phandle_with_args(node, "assigned-clocks",
  111. "#clock-cells", index, &clkspec);
  112. if (rc < 0) {
  113. /* skip empty (null) phandles */
  114. if (rc == -ENOENT)
  115. continue;
  116. else
  117. return rc;
  118. }
  119. if (clkspec.np == node && !clk_supplier) {
  120. of_node_put(clkspec.np);
  121. return 0;
  122. }
  123. clk = of_clk_get_from_provider(&clkspec);
  124. of_node_put(clkspec.np);
  125. if (IS_ERR(clk)) {
  126. if (PTR_ERR(clk) != -EPROBE_DEFER)
  127. pr_warn("clk: couldn't get clock %d for %pOF\n",
  128. index, node);
  129. return PTR_ERR(clk);
  130. }
  131. rc = clk_set_rate(clk, rate);
  132. if (rc < 0)
  133. pr_err("clk: couldn't set %s clk rate to %lu (%d), current rate: %lu\n",
  134. __clk_get_name(clk), rate, rc,
  135. clk_get_rate(clk));
  136. clk_put(clk);
  137. }
  138. }
  139. return 0;
  140. }
  141. /**
  142. * of_clk_set_defaults() - parse and set assigned clocks configuration
  143. * @node: device node to apply clock settings for
  144. * @clk_supplier: true if clocks supplied by @node should also be considered
  145. *
  146. * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
  147. * and sets any specified clock parents and rates. The @clk_supplier argument
  148. * should be set to true if @node may be also a clock supplier of any clock
  149. * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
  150. * If @clk_supplier is false the function exits returning 0 as soon as it
  151. * determines the @node is also a supplier of any of the clocks.
  152. */
  153. int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
  154. {
  155. int rc;
  156. if (!node)
  157. return 0;
  158. rc = __set_clk_parents(node, clk_supplier);
  159. if (rc < 0)
  160. return rc;
  161. return __set_clk_rates(node, clk_supplier);
  162. }
  163. EXPORT_SYMBOL_GPL(of_clk_set_defaults);