kunit_clk_parent_data_test.dtso 643 B

12345678910111213141516171819202122232425262728
  1. // SPDX-License-Identifier: GPL-2.0
  2. /dts-v1/;
  3. /plugin/;
  4. #include "clk_parent_data_test.h"
  5. &{/} {
  6. fixed_50: kunit-clock-50MHz {
  7. compatible = "fixed-clock";
  8. #clock-cells = <0>;
  9. clock-frequency = <50000000>;
  10. clock-output-names = CLK_PARENT_DATA_50MHZ_NAME;
  11. };
  12. fixed_parent: kunit-clock-1MHz {
  13. compatible = "fixed-clock";
  14. #clock-cells = <0>;
  15. clock-frequency = <1000000>;
  16. clock-output-names = CLK_PARENT_DATA_1MHZ_NAME;
  17. };
  18. kunit-clock-controller {
  19. compatible = "test,clk-parent-data";
  20. clocks = <&fixed_parent>, <&fixed_50>;
  21. clock-names = CLK_PARENT_DATA_PARENT1, CLK_PARENT_DATA_PARENT2;
  22. #clock-cells = <1>;
  23. };
  24. };