clk-mt8192-venc.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2021 MediaTek Inc.
  4. // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
  5. #include <linux/clk-provider.h>
  6. #include <linux/mod_devicetable.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt8192-clk.h>
  11. static const struct mtk_gate_regs venc_cg_regs = {
  12. .set_ofs = 0x4,
  13. .clr_ofs = 0x8,
  14. .sta_ofs = 0x0,
  15. };
  16. #define GATE_VENC(_id, _name, _parent, _shift) \
  17. GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
  18. static const struct mtk_gate venc_clks[] = {
  19. GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "venc_sel", 0),
  20. GATE_VENC(CLK_VENC_SET1_VENC, "venc_set1_venc", "venc_sel", 4),
  21. GATE_VENC(CLK_VENC_SET2_JPGENC, "venc_set2_jpgenc", "venc_sel", 8),
  22. GATE_VENC(CLK_VENC_SET5_GALS, "venc_set5_gals", "venc_sel", 28),
  23. };
  24. static const struct mtk_clk_desc venc_desc = {
  25. .clks = venc_clks,
  26. .num_clks = ARRAY_SIZE(venc_clks),
  27. };
  28. static const struct of_device_id of_match_clk_mt8192_venc[] = {
  29. {
  30. .compatible = "mediatek,mt8192-vencsys",
  31. .data = &venc_desc,
  32. }, {
  33. /* sentinel */
  34. }
  35. };
  36. MODULE_DEVICE_TABLE(of, of_match_clk_mt8192_venc);
  37. static struct platform_driver clk_mt8192_venc_drv = {
  38. .probe = mtk_clk_simple_probe,
  39. .remove = mtk_clk_simple_remove,
  40. .driver = {
  41. .name = "clk-mt8192-venc",
  42. .of_match_table = of_match_clk_mt8192_venc,
  43. },
  44. };
  45. module_platform_driver(clk_mt8192_venc_drv);
  46. MODULE_DESCRIPTION("MediaTek MT8192 Video Encoders clocks driver");
  47. MODULE_LICENSE("GPL");