clk-mtk.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014 MediaTek Inc.
  4. * Author: James Liao <jamesjj.liao@mediatek.com>
  5. */
  6. #include <linux/bitops.h>
  7. #include <linux/clk-provider.h>
  8. #include <linux/err.h>
  9. #include <linux/io.h>
  10. #include <linux/mfd/syscon.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/of_address.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/slab.h>
  17. #include "clk-mtk.h"
  18. #include "clk-gate.h"
  19. #include "clk-mux.h"
  20. const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
  21. EXPORT_SYMBOL_GPL(cg_regs_dummy);
  22. static int mtk_clk_dummy_enable(struct clk_hw *hw)
  23. {
  24. return 0;
  25. }
  26. static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
  27. const struct clk_ops mtk_clk_dummy_ops = {
  28. .enable = mtk_clk_dummy_enable,
  29. .disable = mtk_clk_dummy_disable,
  30. };
  31. EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
  32. static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
  33. unsigned int clk_num)
  34. {
  35. int i;
  36. clk_data->num = clk_num;
  37. for (i = 0; i < clk_num; i++)
  38. clk_data->hws[i] = ERR_PTR(-ENOENT);
  39. }
  40. struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
  41. unsigned int clk_num)
  42. {
  43. struct clk_hw_onecell_data *clk_data;
  44. clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, clk_num),
  45. GFP_KERNEL);
  46. if (!clk_data)
  47. return NULL;
  48. mtk_init_clk_data(clk_data, clk_num);
  49. return clk_data;
  50. }
  51. EXPORT_SYMBOL_GPL(mtk_devm_alloc_clk_data);
  52. struct clk_hw_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
  53. {
  54. struct clk_hw_onecell_data *clk_data;
  55. clk_data = kzalloc(struct_size(clk_data, hws, clk_num), GFP_KERNEL);
  56. if (!clk_data)
  57. return NULL;
  58. mtk_init_clk_data(clk_data, clk_num);
  59. return clk_data;
  60. }
  61. EXPORT_SYMBOL_GPL(mtk_alloc_clk_data);
  62. void mtk_free_clk_data(struct clk_hw_onecell_data *clk_data)
  63. {
  64. kfree(clk_data);
  65. }
  66. EXPORT_SYMBOL_GPL(mtk_free_clk_data);
  67. int mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks, int num,
  68. struct clk_hw_onecell_data *clk_data)
  69. {
  70. int i;
  71. struct clk_hw *hw;
  72. if (!clk_data)
  73. return -ENOMEM;
  74. for (i = 0; i < num; i++) {
  75. const struct mtk_fixed_clk *rc = &clks[i];
  76. if (!IS_ERR_OR_NULL(clk_data->hws[rc->id])) {
  77. pr_warn("Trying to register duplicate clock ID: %d\n", rc->id);
  78. continue;
  79. }
  80. hw = clk_hw_register_fixed_rate(NULL, rc->name, rc->parent, 0,
  81. rc->rate);
  82. if (IS_ERR(hw)) {
  83. pr_err("Failed to register clk %s: %pe\n", rc->name,
  84. hw);
  85. goto err;
  86. }
  87. clk_data->hws[rc->id] = hw;
  88. }
  89. return 0;
  90. err:
  91. while (--i >= 0) {
  92. const struct mtk_fixed_clk *rc = &clks[i];
  93. if (IS_ERR_OR_NULL(clk_data->hws[rc->id]))
  94. continue;
  95. clk_hw_unregister_fixed_rate(clk_data->hws[rc->id]);
  96. clk_data->hws[rc->id] = ERR_PTR(-ENOENT);
  97. }
  98. return PTR_ERR(hw);
  99. }
  100. EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks);
  101. void mtk_clk_unregister_fixed_clks(const struct mtk_fixed_clk *clks, int num,
  102. struct clk_hw_onecell_data *clk_data)
  103. {
  104. int i;
  105. if (!clk_data)
  106. return;
  107. for (i = num; i > 0; i--) {
  108. const struct mtk_fixed_clk *rc = &clks[i - 1];
  109. if (IS_ERR_OR_NULL(clk_data->hws[rc->id]))
  110. continue;
  111. clk_hw_unregister_fixed_rate(clk_data->hws[rc->id]);
  112. clk_data->hws[rc->id] = ERR_PTR(-ENOENT);
  113. }
  114. }
  115. EXPORT_SYMBOL_GPL(mtk_clk_unregister_fixed_clks);
  116. int mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num,
  117. struct clk_hw_onecell_data *clk_data)
  118. {
  119. int i;
  120. struct clk_hw *hw;
  121. if (!clk_data)
  122. return -ENOMEM;
  123. for (i = 0; i < num; i++) {
  124. const struct mtk_fixed_factor *ff = &clks[i];
  125. if (!IS_ERR_OR_NULL(clk_data->hws[ff->id])) {
  126. pr_warn("Trying to register duplicate clock ID: %d\n", ff->id);
  127. continue;
  128. }
  129. hw = clk_hw_register_fixed_factor(NULL, ff->name, ff->parent_name,
  130. ff->flags, ff->mult, ff->div);
  131. if (IS_ERR(hw)) {
  132. pr_err("Failed to register clk %s: %pe\n", ff->name,
  133. hw);
  134. goto err;
  135. }
  136. clk_data->hws[ff->id] = hw;
  137. }
  138. return 0;
  139. err:
  140. while (--i >= 0) {
  141. const struct mtk_fixed_factor *ff = &clks[i];
  142. if (IS_ERR_OR_NULL(clk_data->hws[ff->id]))
  143. continue;
  144. clk_hw_unregister_fixed_factor(clk_data->hws[ff->id]);
  145. clk_data->hws[ff->id] = ERR_PTR(-ENOENT);
  146. }
  147. return PTR_ERR(hw);
  148. }
  149. EXPORT_SYMBOL_GPL(mtk_clk_register_factors);
  150. void mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num,
  151. struct clk_hw_onecell_data *clk_data)
  152. {
  153. int i;
  154. if (!clk_data)
  155. return;
  156. for (i = num; i > 0; i--) {
  157. const struct mtk_fixed_factor *ff = &clks[i - 1];
  158. if (IS_ERR_OR_NULL(clk_data->hws[ff->id]))
  159. continue;
  160. clk_hw_unregister_fixed_factor(clk_data->hws[ff->id]);
  161. clk_data->hws[ff->id] = ERR_PTR(-ENOENT);
  162. }
  163. }
  164. EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
  165. static struct clk_hw *mtk_clk_register_composite(struct device *dev,
  166. const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
  167. {
  168. struct clk_hw *hw;
  169. struct clk_mux *mux = NULL;
  170. struct clk_gate *gate = NULL;
  171. struct clk_divider *div = NULL;
  172. struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
  173. const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
  174. const char * const *parent_names;
  175. const char *parent;
  176. int num_parents;
  177. int ret;
  178. if (mc->mux_shift >= 0) {
  179. mux = kzalloc(sizeof(*mux), GFP_KERNEL);
  180. if (!mux)
  181. return ERR_PTR(-ENOMEM);
  182. mux->reg = base + mc->mux_reg;
  183. mux->mask = BIT(mc->mux_width) - 1;
  184. mux->shift = mc->mux_shift;
  185. mux->lock = lock;
  186. mux->flags = mc->mux_flags;
  187. mux_hw = &mux->hw;
  188. mux_ops = &clk_mux_ops;
  189. parent_names = mc->parent_names;
  190. num_parents = mc->num_parents;
  191. } else {
  192. parent = mc->parent;
  193. parent_names = &parent;
  194. num_parents = 1;
  195. }
  196. if (mc->gate_shift >= 0) {
  197. gate = kzalloc(sizeof(*gate), GFP_KERNEL);
  198. if (!gate) {
  199. ret = -ENOMEM;
  200. goto err_out;
  201. }
  202. gate->reg = base + mc->gate_reg;
  203. gate->bit_idx = mc->gate_shift;
  204. gate->flags = CLK_GATE_SET_TO_DISABLE;
  205. gate->lock = lock;
  206. gate_hw = &gate->hw;
  207. gate_ops = &clk_gate_ops;
  208. }
  209. if (mc->divider_shift >= 0) {
  210. div = kzalloc(sizeof(*div), GFP_KERNEL);
  211. if (!div) {
  212. ret = -ENOMEM;
  213. goto err_out;
  214. }
  215. div->reg = base + mc->divider_reg;
  216. div->shift = mc->divider_shift;
  217. div->width = mc->divider_width;
  218. div->lock = lock;
  219. div_hw = &div->hw;
  220. div_ops = &clk_divider_ops;
  221. }
  222. hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
  223. mux_hw, mux_ops,
  224. div_hw, div_ops,
  225. gate_hw, gate_ops,
  226. mc->flags);
  227. if (IS_ERR(hw)) {
  228. ret = PTR_ERR(hw);
  229. goto err_out;
  230. }
  231. return hw;
  232. err_out:
  233. kfree(div);
  234. kfree(gate);
  235. kfree(mux);
  236. return ERR_PTR(ret);
  237. }
  238. static void mtk_clk_unregister_composite(struct clk_hw *hw)
  239. {
  240. struct clk_composite *composite;
  241. struct clk_mux *mux = NULL;
  242. struct clk_gate *gate = NULL;
  243. struct clk_divider *div = NULL;
  244. if (!hw)
  245. return;
  246. composite = to_clk_composite(hw);
  247. if (composite->mux_hw)
  248. mux = to_clk_mux(composite->mux_hw);
  249. if (composite->gate_hw)
  250. gate = to_clk_gate(composite->gate_hw);
  251. if (composite->rate_hw)
  252. div = to_clk_divider(composite->rate_hw);
  253. clk_hw_unregister_composite(hw);
  254. kfree(div);
  255. kfree(gate);
  256. kfree(mux);
  257. }
  258. int mtk_clk_register_composites(struct device *dev,
  259. const struct mtk_composite *mcs, int num,
  260. void __iomem *base, spinlock_t *lock,
  261. struct clk_hw_onecell_data *clk_data)
  262. {
  263. struct clk_hw *hw;
  264. int i;
  265. if (!clk_data)
  266. return -ENOMEM;
  267. for (i = 0; i < num; i++) {
  268. const struct mtk_composite *mc = &mcs[i];
  269. if (!IS_ERR_OR_NULL(clk_data->hws[mc->id])) {
  270. pr_warn("Trying to register duplicate clock ID: %d\n",
  271. mc->id);
  272. continue;
  273. }
  274. hw = mtk_clk_register_composite(dev, mc, base, lock);
  275. if (IS_ERR(hw)) {
  276. pr_err("Failed to register clk %s: %pe\n", mc->name,
  277. hw);
  278. goto err;
  279. }
  280. clk_data->hws[mc->id] = hw;
  281. }
  282. return 0;
  283. err:
  284. while (--i >= 0) {
  285. const struct mtk_composite *mc = &mcs[i];
  286. if (IS_ERR_OR_NULL(clk_data->hws[mcs->id]))
  287. continue;
  288. mtk_clk_unregister_composite(clk_data->hws[mc->id]);
  289. clk_data->hws[mc->id] = ERR_PTR(-ENOENT);
  290. }
  291. return PTR_ERR(hw);
  292. }
  293. EXPORT_SYMBOL_GPL(mtk_clk_register_composites);
  294. void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
  295. struct clk_hw_onecell_data *clk_data)
  296. {
  297. int i;
  298. if (!clk_data)
  299. return;
  300. for (i = num; i > 0; i--) {
  301. const struct mtk_composite *mc = &mcs[i - 1];
  302. if (IS_ERR_OR_NULL(clk_data->hws[mc->id]))
  303. continue;
  304. mtk_clk_unregister_composite(clk_data->hws[mc->id]);
  305. clk_data->hws[mc->id] = ERR_PTR(-ENOENT);
  306. }
  307. }
  308. EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites);
  309. int mtk_clk_register_dividers(struct device *dev,
  310. const struct mtk_clk_divider *mcds, int num,
  311. void __iomem *base, spinlock_t *lock,
  312. struct clk_hw_onecell_data *clk_data)
  313. {
  314. struct clk_hw *hw;
  315. int i;
  316. if (!clk_data)
  317. return -ENOMEM;
  318. for (i = 0; i < num; i++) {
  319. const struct mtk_clk_divider *mcd = &mcds[i];
  320. if (!IS_ERR_OR_NULL(clk_data->hws[mcd->id])) {
  321. pr_warn("Trying to register duplicate clock ID: %d\n",
  322. mcd->id);
  323. continue;
  324. }
  325. hw = clk_hw_register_divider(dev, mcd->name, mcd->parent_name,
  326. mcd->flags, base + mcd->div_reg, mcd->div_shift,
  327. mcd->div_width, mcd->clk_divider_flags, lock);
  328. if (IS_ERR(hw)) {
  329. pr_err("Failed to register clk %s: %pe\n", mcd->name,
  330. hw);
  331. goto err;
  332. }
  333. clk_data->hws[mcd->id] = hw;
  334. }
  335. return 0;
  336. err:
  337. while (--i >= 0) {
  338. const struct mtk_clk_divider *mcd = &mcds[i];
  339. if (IS_ERR_OR_NULL(clk_data->hws[mcd->id]))
  340. continue;
  341. clk_hw_unregister_divider(clk_data->hws[mcd->id]);
  342. clk_data->hws[mcd->id] = ERR_PTR(-ENOENT);
  343. }
  344. return PTR_ERR(hw);
  345. }
  346. EXPORT_SYMBOL_GPL(mtk_clk_register_dividers);
  347. void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num,
  348. struct clk_hw_onecell_data *clk_data)
  349. {
  350. int i;
  351. if (!clk_data)
  352. return;
  353. for (i = num; i > 0; i--) {
  354. const struct mtk_clk_divider *mcd = &mcds[i - 1];
  355. if (IS_ERR_OR_NULL(clk_data->hws[mcd->id]))
  356. continue;
  357. clk_hw_unregister_divider(clk_data->hws[mcd->id]);
  358. clk_data->hws[mcd->id] = ERR_PTR(-ENOENT);
  359. }
  360. }
  361. EXPORT_SYMBOL_GPL(mtk_clk_unregister_dividers);
  362. static int __mtk_clk_simple_probe(struct platform_device *pdev,
  363. struct device_node *node)
  364. {
  365. const struct platform_device_id *id;
  366. const struct mtk_clk_desc *mcd;
  367. struct clk_hw_onecell_data *clk_data;
  368. void __iomem *base = NULL;
  369. int num_clks, r;
  370. mcd = device_get_match_data(&pdev->dev);
  371. if (!mcd) {
  372. /* Clock driver wasn't registered from devicetree */
  373. id = platform_get_device_id(pdev);
  374. if (id)
  375. mcd = (const struct mtk_clk_desc *)id->driver_data;
  376. if (!mcd)
  377. return -EINVAL;
  378. }
  379. /* Composite and divider clocks needs us to pass iomem pointer */
  380. if (mcd->composite_clks || mcd->divider_clks) {
  381. if (!mcd->shared_io)
  382. base = devm_platform_ioremap_resource(pdev, 0);
  383. else
  384. base = of_iomap(node, 0);
  385. if (IS_ERR_OR_NULL(base))
  386. return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM;
  387. }
  388. if (mcd->need_runtime_pm) {
  389. devm_pm_runtime_enable(&pdev->dev);
  390. /*
  391. * Do a pm_runtime_resume_and_get() to workaround a possible
  392. * deadlock between clk_register() and the genpd framework.
  393. */
  394. r = pm_runtime_resume_and_get(&pdev->dev);
  395. if (r)
  396. return r;
  397. }
  398. /* Calculate how many clk_hw_onecell_data entries to allocate */
  399. num_clks = mcd->num_clks + mcd->num_composite_clks;
  400. num_clks += mcd->num_fixed_clks + mcd->num_factor_clks;
  401. num_clks += mcd->num_mux_clks + mcd->num_divider_clks;
  402. clk_data = mtk_alloc_clk_data(num_clks);
  403. if (!clk_data) {
  404. r = -ENOMEM;
  405. goto free_base;
  406. }
  407. if (mcd->fixed_clks) {
  408. r = mtk_clk_register_fixed_clks(mcd->fixed_clks,
  409. mcd->num_fixed_clks, clk_data);
  410. if (r)
  411. goto free_data;
  412. }
  413. if (mcd->factor_clks) {
  414. r = mtk_clk_register_factors(mcd->factor_clks,
  415. mcd->num_factor_clks, clk_data);
  416. if (r)
  417. goto unregister_fixed_clks;
  418. }
  419. if (mcd->mux_clks) {
  420. r = mtk_clk_register_muxes(&pdev->dev, mcd->mux_clks,
  421. mcd->num_mux_clks, node,
  422. mcd->clk_lock, clk_data);
  423. if (r)
  424. goto unregister_factors;
  425. }
  426. if (mcd->composite_clks) {
  427. /* We don't check composite_lock because it's optional */
  428. r = mtk_clk_register_composites(&pdev->dev,
  429. mcd->composite_clks,
  430. mcd->num_composite_clks,
  431. base, mcd->clk_lock, clk_data);
  432. if (r)
  433. goto unregister_muxes;
  434. }
  435. if (mcd->divider_clks) {
  436. r = mtk_clk_register_dividers(&pdev->dev,
  437. mcd->divider_clks,
  438. mcd->num_divider_clks,
  439. base, mcd->clk_lock, clk_data);
  440. if (r)
  441. goto unregister_composites;
  442. }
  443. if (mcd->clks) {
  444. r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks,
  445. mcd->num_clks, clk_data);
  446. if (r)
  447. goto unregister_dividers;
  448. }
  449. if (mcd->clk_notifier_func) {
  450. struct clk *mfg_mux = clk_data->hws[mcd->mfg_clk_idx]->clk;
  451. r = mcd->clk_notifier_func(&pdev->dev, mfg_mux);
  452. if (r)
  453. goto unregister_clks;
  454. }
  455. r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
  456. if (r)
  457. goto unregister_clks;
  458. platform_set_drvdata(pdev, clk_data);
  459. if (mcd->rst_desc) {
  460. r = mtk_register_reset_controller_with_dev(&pdev->dev,
  461. mcd->rst_desc);
  462. if (r)
  463. goto unregister_clks;
  464. }
  465. if (mcd->need_runtime_pm)
  466. pm_runtime_put(&pdev->dev);
  467. return r;
  468. unregister_clks:
  469. if (mcd->clks)
  470. mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
  471. unregister_dividers:
  472. if (mcd->divider_clks)
  473. mtk_clk_unregister_dividers(mcd->divider_clks,
  474. mcd->num_divider_clks, clk_data);
  475. unregister_composites:
  476. if (mcd->composite_clks)
  477. mtk_clk_unregister_composites(mcd->composite_clks,
  478. mcd->num_composite_clks, clk_data);
  479. unregister_muxes:
  480. if (mcd->mux_clks)
  481. mtk_clk_unregister_muxes(mcd->mux_clks,
  482. mcd->num_mux_clks, clk_data);
  483. unregister_factors:
  484. if (mcd->factor_clks)
  485. mtk_clk_unregister_factors(mcd->factor_clks,
  486. mcd->num_factor_clks, clk_data);
  487. unregister_fixed_clks:
  488. if (mcd->fixed_clks)
  489. mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
  490. mcd->num_fixed_clks, clk_data);
  491. free_data:
  492. mtk_free_clk_data(clk_data);
  493. free_base:
  494. if (mcd->shared_io && base)
  495. iounmap(base);
  496. if (mcd->need_runtime_pm)
  497. pm_runtime_put(&pdev->dev);
  498. return r;
  499. }
  500. static void __mtk_clk_simple_remove(struct platform_device *pdev,
  501. struct device_node *node)
  502. {
  503. struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
  504. const struct mtk_clk_desc *mcd = device_get_match_data(&pdev->dev);
  505. of_clk_del_provider(node);
  506. if (mcd->clks)
  507. mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
  508. if (mcd->divider_clks)
  509. mtk_clk_unregister_dividers(mcd->divider_clks,
  510. mcd->num_divider_clks, clk_data);
  511. if (mcd->composite_clks)
  512. mtk_clk_unregister_composites(mcd->composite_clks,
  513. mcd->num_composite_clks, clk_data);
  514. if (mcd->mux_clks)
  515. mtk_clk_unregister_muxes(mcd->mux_clks,
  516. mcd->num_mux_clks, clk_data);
  517. if (mcd->factor_clks)
  518. mtk_clk_unregister_factors(mcd->factor_clks,
  519. mcd->num_factor_clks, clk_data);
  520. if (mcd->fixed_clks)
  521. mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
  522. mcd->num_fixed_clks, clk_data);
  523. mtk_free_clk_data(clk_data);
  524. }
  525. int mtk_clk_pdev_probe(struct platform_device *pdev)
  526. {
  527. struct device *dev = &pdev->dev;
  528. struct device_node *node = dev->parent->of_node;
  529. return __mtk_clk_simple_probe(pdev, node);
  530. }
  531. EXPORT_SYMBOL_GPL(mtk_clk_pdev_probe);
  532. int mtk_clk_simple_probe(struct platform_device *pdev)
  533. {
  534. struct device_node *node = pdev->dev.of_node;
  535. return __mtk_clk_simple_probe(pdev, node);
  536. }
  537. EXPORT_SYMBOL_GPL(mtk_clk_simple_probe);
  538. void mtk_clk_pdev_remove(struct platform_device *pdev)
  539. {
  540. struct device *dev = &pdev->dev;
  541. struct device_node *node = dev->parent->of_node;
  542. __mtk_clk_simple_remove(pdev, node);
  543. }
  544. EXPORT_SYMBOL_GPL(mtk_clk_pdev_remove);
  545. void mtk_clk_simple_remove(struct platform_device *pdev)
  546. {
  547. __mtk_clk_simple_remove(pdev, pdev->dev.of_node);
  548. }
  549. EXPORT_SYMBOL_GPL(mtk_clk_simple_remove);
  550. MODULE_LICENSE("GPL");