i8254.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Intel 8254 Programmable Interval Timer
  4. * Copyright (C) William Breathitt Gray
  5. */
  6. #include <linux/bitfield.h>
  7. #include <linux/bits.h>
  8. #include <linux/counter.h>
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/export.h>
  12. #include <linux/i8254.h>
  13. #include <linux/limits.h>
  14. #include <linux/module.h>
  15. #include <linux/mutex.h>
  16. #include <linux/regmap.h>
  17. #include <linux/unaligned.h>
  18. #define I8254_COUNTER_REG(_counter) (_counter)
  19. #define I8254_CONTROL_REG 0x3
  20. #define I8254_SC GENMASK(7, 6)
  21. #define I8254_RW GENMASK(5, 4)
  22. #define I8254_M GENMASK(3, 1)
  23. #define I8254_CONTROL(_sc, _rw, _m) \
  24. (u8_encode_bits(_sc, I8254_SC) | u8_encode_bits(_rw, I8254_RW) | \
  25. u8_encode_bits(_m, I8254_M))
  26. #define I8254_RW_TWO_BYTE 0x3
  27. #define I8254_MODE_INTERRUPT_ON_TERMINAL_COUNT 0
  28. #define I8254_MODE_HARDWARE_RETRIGGERABLE_ONESHOT 1
  29. #define I8254_MODE_RATE_GENERATOR 2
  30. #define I8254_MODE_SQUARE_WAVE_MODE 3
  31. #define I8254_MODE_SOFTWARE_TRIGGERED_STROBE 4
  32. #define I8254_MODE_HARDWARE_TRIGGERED_STROBE 5
  33. #define I8254_COUNTER_LATCH(_counter) I8254_CONTROL(_counter, 0x0, 0x0)
  34. #define I8254_PROGRAM_COUNTER(_counter, _mode) I8254_CONTROL(_counter, I8254_RW_TWO_BYTE, _mode)
  35. #define I8254_NUM_COUNTERS 3
  36. /**
  37. * struct i8254 - I8254 device private data structure
  38. * @lock: synchronization lock to prevent I/O race conditions
  39. * @preset: array of Counter Register states
  40. * @out_mode: array of mode configuration states
  41. * @map: Regmap for the device
  42. */
  43. struct i8254 {
  44. struct mutex lock;
  45. u16 preset[I8254_NUM_COUNTERS];
  46. u8 out_mode[I8254_NUM_COUNTERS];
  47. struct regmap *map;
  48. };
  49. static int i8254_count_read(struct counter_device *const counter, struct counter_count *const count,
  50. u64 *const val)
  51. {
  52. struct i8254 *const priv = counter_priv(counter);
  53. int ret;
  54. u8 value[2];
  55. mutex_lock(&priv->lock);
  56. ret = regmap_write(priv->map, I8254_CONTROL_REG, I8254_COUNTER_LATCH(count->id));
  57. if (ret) {
  58. mutex_unlock(&priv->lock);
  59. return ret;
  60. }
  61. ret = regmap_noinc_read(priv->map, I8254_COUNTER_REG(count->id), value, sizeof(value));
  62. if (ret) {
  63. mutex_unlock(&priv->lock);
  64. return ret;
  65. }
  66. mutex_unlock(&priv->lock);
  67. *val = get_unaligned_le16(value);
  68. return ret;
  69. }
  70. static int i8254_function_read(struct counter_device *const counter,
  71. struct counter_count *const count,
  72. enum counter_function *const function)
  73. {
  74. *function = COUNTER_FUNCTION_DECREASE;
  75. return 0;
  76. }
  77. #define I8254_SYNAPSES_PER_COUNT 2
  78. #define I8254_SIGNAL_ID_CLK 0
  79. #define I8254_SIGNAL_ID_GATE 1
  80. static int i8254_action_read(struct counter_device *const counter,
  81. struct counter_count *const count,
  82. struct counter_synapse *const synapse,
  83. enum counter_synapse_action *const action)
  84. {
  85. struct i8254 *const priv = counter_priv(counter);
  86. switch (synapse->signal->id % I8254_SYNAPSES_PER_COUNT) {
  87. case I8254_SIGNAL_ID_CLK:
  88. *action = COUNTER_SYNAPSE_ACTION_FALLING_EDGE;
  89. return 0;
  90. case I8254_SIGNAL_ID_GATE:
  91. switch (priv->out_mode[count->id]) {
  92. case I8254_MODE_HARDWARE_RETRIGGERABLE_ONESHOT:
  93. case I8254_MODE_RATE_GENERATOR:
  94. case I8254_MODE_SQUARE_WAVE_MODE:
  95. case I8254_MODE_HARDWARE_TRIGGERED_STROBE:
  96. *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
  97. return 0;
  98. default:
  99. *action = COUNTER_SYNAPSE_ACTION_NONE;
  100. return 0;
  101. }
  102. default:
  103. /* should never reach this path */
  104. return -EINVAL;
  105. }
  106. }
  107. static int i8254_count_ceiling_read(struct counter_device *const counter,
  108. struct counter_count *const count, u64 *const ceiling)
  109. {
  110. struct i8254 *const priv = counter_priv(counter);
  111. mutex_lock(&priv->lock);
  112. switch (priv->out_mode[count->id]) {
  113. case I8254_MODE_RATE_GENERATOR:
  114. /* Rate Generator decrements 0 by one and the counter "wraps around" */
  115. *ceiling = (priv->preset[count->id] == 0) ? U16_MAX : priv->preset[count->id];
  116. break;
  117. case I8254_MODE_SQUARE_WAVE_MODE:
  118. if (priv->preset[count->id] % 2)
  119. *ceiling = priv->preset[count->id] - 1;
  120. else if (priv->preset[count->id] == 0)
  121. /* Square Wave Mode decrements 0 by two and the counter "wraps around" */
  122. *ceiling = U16_MAX - 1;
  123. else
  124. *ceiling = priv->preset[count->id];
  125. break;
  126. default:
  127. *ceiling = U16_MAX;
  128. break;
  129. }
  130. mutex_unlock(&priv->lock);
  131. return 0;
  132. }
  133. static int i8254_count_mode_read(struct counter_device *const counter,
  134. struct counter_count *const count,
  135. enum counter_count_mode *const count_mode)
  136. {
  137. const struct i8254 *const priv = counter_priv(counter);
  138. switch (priv->out_mode[count->id]) {
  139. case I8254_MODE_INTERRUPT_ON_TERMINAL_COUNT:
  140. *count_mode = COUNTER_COUNT_MODE_INTERRUPT_ON_TERMINAL_COUNT;
  141. return 0;
  142. case I8254_MODE_HARDWARE_RETRIGGERABLE_ONESHOT:
  143. *count_mode = COUNTER_COUNT_MODE_HARDWARE_RETRIGGERABLE_ONESHOT;
  144. return 0;
  145. case I8254_MODE_RATE_GENERATOR:
  146. *count_mode = COUNTER_COUNT_MODE_RATE_GENERATOR;
  147. return 0;
  148. case I8254_MODE_SQUARE_WAVE_MODE:
  149. *count_mode = COUNTER_COUNT_MODE_SQUARE_WAVE_MODE;
  150. return 0;
  151. case I8254_MODE_SOFTWARE_TRIGGERED_STROBE:
  152. *count_mode = COUNTER_COUNT_MODE_SOFTWARE_TRIGGERED_STROBE;
  153. return 0;
  154. case I8254_MODE_HARDWARE_TRIGGERED_STROBE:
  155. *count_mode = COUNTER_COUNT_MODE_HARDWARE_TRIGGERED_STROBE;
  156. return 0;
  157. default:
  158. /* should never reach this path */
  159. return -EINVAL;
  160. }
  161. }
  162. static int i8254_count_mode_write(struct counter_device *const counter,
  163. struct counter_count *const count,
  164. const enum counter_count_mode count_mode)
  165. {
  166. struct i8254 *const priv = counter_priv(counter);
  167. u8 out_mode;
  168. int ret;
  169. switch (count_mode) {
  170. case COUNTER_COUNT_MODE_INTERRUPT_ON_TERMINAL_COUNT:
  171. out_mode = I8254_MODE_INTERRUPT_ON_TERMINAL_COUNT;
  172. break;
  173. case COUNTER_COUNT_MODE_HARDWARE_RETRIGGERABLE_ONESHOT:
  174. out_mode = I8254_MODE_HARDWARE_RETRIGGERABLE_ONESHOT;
  175. break;
  176. case COUNTER_COUNT_MODE_RATE_GENERATOR:
  177. out_mode = I8254_MODE_RATE_GENERATOR;
  178. break;
  179. case COUNTER_COUNT_MODE_SQUARE_WAVE_MODE:
  180. out_mode = I8254_MODE_SQUARE_WAVE_MODE;
  181. break;
  182. case COUNTER_COUNT_MODE_SOFTWARE_TRIGGERED_STROBE:
  183. out_mode = I8254_MODE_SOFTWARE_TRIGGERED_STROBE;
  184. break;
  185. case COUNTER_COUNT_MODE_HARDWARE_TRIGGERED_STROBE:
  186. out_mode = I8254_MODE_HARDWARE_TRIGGERED_STROBE;
  187. break;
  188. default:
  189. /* should never reach this path */
  190. return -EINVAL;
  191. }
  192. mutex_lock(&priv->lock);
  193. /* Counter Register is cleared when the counter is programmed */
  194. priv->preset[count->id] = 0;
  195. priv->out_mode[count->id] = out_mode;
  196. ret = regmap_write(priv->map, I8254_CONTROL_REG,
  197. I8254_PROGRAM_COUNTER(count->id, out_mode));
  198. mutex_unlock(&priv->lock);
  199. return ret;
  200. }
  201. static int i8254_count_floor_read(struct counter_device *const counter,
  202. struct counter_count *const count, u64 *const floor)
  203. {
  204. struct i8254 *const priv = counter_priv(counter);
  205. mutex_lock(&priv->lock);
  206. switch (priv->out_mode[count->id]) {
  207. case I8254_MODE_RATE_GENERATOR:
  208. /* counter is always reloaded after 1, but 0 is a possible reload value */
  209. *floor = (priv->preset[count->id] == 0) ? 0 : 1;
  210. break;
  211. case I8254_MODE_SQUARE_WAVE_MODE:
  212. /* counter is always reloaded after 2 for even preset values */
  213. *floor = (priv->preset[count->id] % 2 || priv->preset[count->id] == 0) ? 0 : 2;
  214. break;
  215. default:
  216. *floor = 0;
  217. break;
  218. }
  219. mutex_unlock(&priv->lock);
  220. return 0;
  221. }
  222. static int i8254_count_preset_read(struct counter_device *const counter,
  223. struct counter_count *const count, u64 *const preset)
  224. {
  225. const struct i8254 *const priv = counter_priv(counter);
  226. *preset = priv->preset[count->id];
  227. return 0;
  228. }
  229. static int i8254_count_preset_write(struct counter_device *const counter,
  230. struct counter_count *const count, const u64 preset)
  231. {
  232. struct i8254 *const priv = counter_priv(counter);
  233. int ret;
  234. u8 value[2];
  235. if (preset > U16_MAX)
  236. return -ERANGE;
  237. mutex_lock(&priv->lock);
  238. if (priv->out_mode[count->id] == I8254_MODE_RATE_GENERATOR ||
  239. priv->out_mode[count->id] == I8254_MODE_SQUARE_WAVE_MODE) {
  240. if (preset == 1) {
  241. mutex_unlock(&priv->lock);
  242. return -EINVAL;
  243. }
  244. }
  245. priv->preset[count->id] = preset;
  246. put_unaligned_le16(preset, value);
  247. ret = regmap_noinc_write(priv->map, I8254_COUNTER_REG(count->id), value, 2);
  248. mutex_unlock(&priv->lock);
  249. return ret;
  250. }
  251. static int i8254_init_hw(struct regmap *const map)
  252. {
  253. unsigned long i;
  254. int ret;
  255. for (i = 0; i < I8254_NUM_COUNTERS; i++) {
  256. /* Initialize each counter to Mode 0 */
  257. ret = regmap_write(map, I8254_CONTROL_REG,
  258. I8254_PROGRAM_COUNTER(i, I8254_MODE_INTERRUPT_ON_TERMINAL_COUNT));
  259. if (ret)
  260. return ret;
  261. }
  262. return 0;
  263. }
  264. static const struct counter_ops i8254_ops = {
  265. .count_read = i8254_count_read,
  266. .function_read = i8254_function_read,
  267. .action_read = i8254_action_read,
  268. };
  269. #define I8254_SIGNAL(_id, _name) { \
  270. .id = (_id), \
  271. .name = (_name), \
  272. }
  273. static struct counter_signal i8254_signals[] = {
  274. I8254_SIGNAL(0, "CLK 0"), I8254_SIGNAL(1, "GATE 0"),
  275. I8254_SIGNAL(2, "CLK 1"), I8254_SIGNAL(3, "GATE 1"),
  276. I8254_SIGNAL(4, "CLK 2"), I8254_SIGNAL(5, "GATE 2"),
  277. };
  278. static const enum counter_synapse_action i8254_clk_actions[] = {
  279. COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
  280. };
  281. static const enum counter_synapse_action i8254_gate_actions[] = {
  282. COUNTER_SYNAPSE_ACTION_NONE,
  283. COUNTER_SYNAPSE_ACTION_RISING_EDGE,
  284. };
  285. #define I8254_SYNAPSES_BASE(_id) ((_id) * I8254_SYNAPSES_PER_COUNT)
  286. #define I8254_SYNAPSE_CLK(_id) { \
  287. .actions_list = i8254_clk_actions, \
  288. .num_actions = ARRAY_SIZE(i8254_clk_actions), \
  289. .signal = &i8254_signals[I8254_SYNAPSES_BASE(_id) + 0], \
  290. }
  291. #define I8254_SYNAPSE_GATE(_id) { \
  292. .actions_list = i8254_gate_actions, \
  293. .num_actions = ARRAY_SIZE(i8254_gate_actions), \
  294. .signal = &i8254_signals[I8254_SYNAPSES_BASE(_id) + 1], \
  295. }
  296. static struct counter_synapse i8254_synapses[] = {
  297. I8254_SYNAPSE_CLK(0), I8254_SYNAPSE_GATE(0),
  298. I8254_SYNAPSE_CLK(1), I8254_SYNAPSE_GATE(1),
  299. I8254_SYNAPSE_CLK(2), I8254_SYNAPSE_GATE(2),
  300. };
  301. static const enum counter_function i8254_functions_list[] = {
  302. COUNTER_FUNCTION_DECREASE,
  303. };
  304. static const enum counter_count_mode i8254_count_modes[] = {
  305. COUNTER_COUNT_MODE_INTERRUPT_ON_TERMINAL_COUNT,
  306. COUNTER_COUNT_MODE_HARDWARE_RETRIGGERABLE_ONESHOT,
  307. COUNTER_COUNT_MODE_RATE_GENERATOR,
  308. COUNTER_COUNT_MODE_SQUARE_WAVE_MODE,
  309. COUNTER_COUNT_MODE_SOFTWARE_TRIGGERED_STROBE,
  310. COUNTER_COUNT_MODE_HARDWARE_TRIGGERED_STROBE,
  311. };
  312. static DEFINE_COUNTER_AVAILABLE(i8254_count_modes_available, i8254_count_modes);
  313. static struct counter_comp i8254_count_ext[] = {
  314. COUNTER_COMP_CEILING(i8254_count_ceiling_read, NULL),
  315. COUNTER_COMP_COUNT_MODE(i8254_count_mode_read, i8254_count_mode_write,
  316. i8254_count_modes_available),
  317. COUNTER_COMP_FLOOR(i8254_count_floor_read, NULL),
  318. COUNTER_COMP_PRESET(i8254_count_preset_read, i8254_count_preset_write),
  319. };
  320. #define I8254_COUNT(_id, _name) { \
  321. .id = (_id), \
  322. .name = (_name), \
  323. .functions_list = i8254_functions_list, \
  324. .num_functions = ARRAY_SIZE(i8254_functions_list), \
  325. .synapses = &i8254_synapses[I8254_SYNAPSES_BASE(_id)], \
  326. .num_synapses = I8254_SYNAPSES_PER_COUNT, \
  327. .ext = i8254_count_ext, \
  328. .num_ext = ARRAY_SIZE(i8254_count_ext) \
  329. }
  330. static struct counter_count i8254_counts[I8254_NUM_COUNTERS] = {
  331. I8254_COUNT(0, "Counter 0"), I8254_COUNT(1, "Counter 1"), I8254_COUNT(2, "Counter 2"),
  332. };
  333. /**
  334. * devm_i8254_regmap_register - Register an i8254 Counter device
  335. * @dev: device that is registering this i8254 Counter device
  336. * @config: configuration for i8254_regmap_config
  337. *
  338. * Registers an Intel 8254 Programmable Interval Timer Counter device. Returns 0 on success and
  339. * negative error number on failure.
  340. */
  341. int devm_i8254_regmap_register(struct device *const dev,
  342. const struct i8254_regmap_config *const config)
  343. {
  344. struct counter_device *counter;
  345. struct i8254 *priv;
  346. int err;
  347. if (!config->parent)
  348. return -EINVAL;
  349. if (!config->map)
  350. return -EINVAL;
  351. counter = devm_counter_alloc(dev, sizeof(*priv));
  352. if (!counter)
  353. return -ENOMEM;
  354. priv = counter_priv(counter);
  355. priv->map = config->map;
  356. counter->name = dev_name(config->parent);
  357. counter->parent = config->parent;
  358. counter->ops = &i8254_ops;
  359. counter->counts = i8254_counts;
  360. counter->num_counts = ARRAY_SIZE(i8254_counts);
  361. counter->signals = i8254_signals;
  362. counter->num_signals = ARRAY_SIZE(i8254_signals);
  363. mutex_init(&priv->lock);
  364. err = i8254_init_hw(priv->map);
  365. if (err)
  366. return err;
  367. err = devm_counter_add(dev, counter);
  368. if (err < 0)
  369. return dev_err_probe(dev, err, "Failed to add counter\n");
  370. return 0;
  371. }
  372. EXPORT_SYMBOL_NS_GPL(devm_i8254_regmap_register, I8254);
  373. MODULE_AUTHOR("William Breathitt Gray");
  374. MODULE_DESCRIPTION("Intel 8254 Programmable Interval Timer");
  375. MODULE_LICENSE("GPL");
  376. MODULE_IMPORT_NS(COUNTER);