Kconfig 26 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. menuconfig CRYPTO_HW
  3. bool "Hardware crypto devices"
  4. default y
  5. help
  6. Say Y here to get to see options for hardware crypto devices and
  7. processors. This option alone does not add any kernel code.
  8. If you say N, all options in this submenu will be skipped and disabled.
  9. if CRYPTO_HW
  10. source "drivers/crypto/allwinner/Kconfig"
  11. config CRYPTO_DEV_PADLOCK
  12. tristate "Support for VIA PadLock ACE"
  13. depends on X86 && !UML
  14. help
  15. Some VIA processors come with an integrated crypto engine
  16. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  17. that provides instructions for very fast cryptographic
  18. operations with supported algorithms.
  19. The instructions are used only when the CPU supports them.
  20. Otherwise software encryption is used.
  21. config CRYPTO_DEV_PADLOCK_AES
  22. tristate "PadLock driver for AES algorithm"
  23. depends on CRYPTO_DEV_PADLOCK
  24. select CRYPTO_SKCIPHER
  25. select CRYPTO_LIB_AES
  26. help
  27. Use VIA PadLock for AES algorithm.
  28. Available in VIA C3 and newer CPUs.
  29. If unsure say M. The compiled module will be
  30. called padlock-aes.
  31. config CRYPTO_DEV_PADLOCK_SHA
  32. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  33. depends on CRYPTO_DEV_PADLOCK
  34. select CRYPTO_HASH
  35. select CRYPTO_SHA1
  36. select CRYPTO_SHA256
  37. help
  38. Use VIA PadLock for SHA1/SHA256 algorithms.
  39. Available in VIA C7 and newer processors.
  40. If unsure say M. The compiled module will be
  41. called padlock-sha.
  42. config CRYPTO_DEV_GEODE
  43. tristate "Support for the Geode LX AES engine"
  44. depends on X86_32 && PCI
  45. select CRYPTO_ALGAPI
  46. select CRYPTO_SKCIPHER
  47. help
  48. Say 'Y' here to use the AMD Geode LX processor on-board AES
  49. engine for the CryptoAPI AES algorithm.
  50. To compile this driver as a module, choose M here: the module
  51. will be called geode-aes.
  52. config ZCRYPT
  53. tristate "Support for s390 cryptographic adapters"
  54. depends on S390
  55. depends on AP
  56. select HW_RANDOM
  57. help
  58. Select this option if you want to enable support for
  59. s390 cryptographic adapters like Crypto Express 4 up
  60. to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP)
  61. or Accelerator (CEXxA) mode.
  62. config PKEY
  63. tristate "Kernel API for protected key handling"
  64. depends on S390
  65. help
  66. With this option enabled the pkey kernel modules provide an API
  67. for creation and handling of protected keys. Other parts of the
  68. kernel or userspace applications may use these functions.
  69. The protected key support is distributed into:
  70. - A pkey base and API kernel module (pkey.ko) which offers the
  71. infrastructure for the pkey handler kernel modules, the ioctl
  72. and the sysfs API and the in-kernel API to the crypto cipher
  73. implementations using protected key.
  74. - A pkey pckmo kernel module (pkey-pckmo.ko) which is automatically
  75. loaded when pckmo support (that is generation of protected keys
  76. from clear key values) is available.
  77. - A pkey CCA kernel module (pkey-cca.ko) which is automatically
  78. loaded when a CEX crypto card is available.
  79. - A pkey EP11 kernel module (pkey-ep11.ko) which is automatically
  80. loaded when a CEX crypto card is available.
  81. Select this option if you want to enable the kernel and userspace
  82. API for protected key handling.
  83. config PKEY_CCA
  84. tristate "PKEY CCA support handler"
  85. depends on PKEY
  86. depends on ZCRYPT
  87. help
  88. This is the CCA support handler for deriving protected keys
  89. from CCA (secure) keys. Also this handler provides an alternate
  90. way to make protected keys from clear key values.
  91. The PKEY CCA support handler needs a Crypto Express card (CEX)
  92. in CCA mode.
  93. If you have selected the PKEY option then you should also enable
  94. this option unless you are sure you never need to derive protected
  95. keys from CCA key material.
  96. config PKEY_EP11
  97. tristate "PKEY EP11 support handler"
  98. depends on PKEY
  99. depends on ZCRYPT
  100. help
  101. This is the EP11 support handler for deriving protected keys
  102. from EP11 (secure) keys. Also this handler provides an alternate
  103. way to make protected keys from clear key values.
  104. The PKEY EP11 support handler needs a Crypto Express card (CEX)
  105. in EP11 mode.
  106. If you have selected the PKEY option then you should also enable
  107. this option unless you are sure you never need to derive protected
  108. keys from EP11 key material.
  109. config PKEY_PCKMO
  110. tristate "PKEY PCKMO support handler"
  111. depends on PKEY
  112. help
  113. This is the PCKMO support handler for deriving protected keys
  114. from clear key values via invoking the PCKMO instruction.
  115. The PCKMO instruction can be enabled and disabled in the crypto
  116. settings at the LPAR profile. This handler checks for availability
  117. during initialization and if build as a kernel module unloads
  118. itself if PCKMO is disabled.
  119. The PCKMO way of deriving protected keys from clear key material
  120. is especially used during self test of protected key ciphers like
  121. PAES but the CCA and EP11 handler provide alternate ways to
  122. generate protected keys from clear key values.
  123. If you have selected the PKEY option then you should also enable
  124. this option unless you are sure you never need to derive protected
  125. keys from clear key values directly via PCKMO.
  126. config CRYPTO_PAES_S390
  127. tristate "PAES cipher algorithms"
  128. depends on S390
  129. depends on ZCRYPT
  130. depends on PKEY
  131. select CRYPTO_ALGAPI
  132. select CRYPTO_SKCIPHER
  133. help
  134. This is the s390 hardware accelerated implementation of the
  135. AES cipher algorithms for use with protected key.
  136. Select this option if you want to use the paes cipher
  137. for example to use protected key encrypted devices.
  138. config S390_PRNG
  139. tristate "Pseudo random number generator device driver"
  140. depends on S390
  141. default "m"
  142. help
  143. Select this option if you want to use the s390 pseudo random number
  144. generator. The PRNG is part of the cryptographic processor functions
  145. and uses triple-DES to generate secure random numbers like the
  146. ANSI X9.17 standard. User-space programs access the
  147. pseudo-random-number device through the char device /dev/prandom.
  148. It is available as of z9.
  149. config CRYPTO_DEV_NIAGARA2
  150. tristate "Niagara2 Stream Processing Unit driver"
  151. select CRYPTO_LIB_DES
  152. select CRYPTO_SKCIPHER
  153. select CRYPTO_HASH
  154. select CRYPTO_MD5
  155. select CRYPTO_SHA1
  156. select CRYPTO_SHA256
  157. depends on SPARC64
  158. help
  159. Each core of a Niagara2 processor contains a Stream
  160. Processing Unit, which itself contains several cryptographic
  161. sub-units. One set provides the Modular Arithmetic Unit,
  162. used for SSL offload. The other set provides the Cipher
  163. Group, which can perform encryption, decryption, hashing,
  164. checksumming, and raw copies.
  165. config CRYPTO_DEV_SL3516
  166. tristate "Storlink SL3516 crypto offloader"
  167. depends on ARCH_GEMINI || COMPILE_TEST
  168. depends on HAS_IOMEM && PM
  169. select CRYPTO_SKCIPHER
  170. select CRYPTO_ENGINE
  171. select CRYPTO_ECB
  172. select CRYPTO_AES
  173. select HW_RANDOM
  174. help
  175. This option allows you to have support for SL3516 crypto offloader.
  176. config CRYPTO_DEV_SL3516_DEBUG
  177. bool "Enable SL3516 stats"
  178. depends on CRYPTO_DEV_SL3516
  179. depends on DEBUG_FS
  180. help
  181. Say y to enable SL3516 debug stats.
  182. This will create /sys/kernel/debug/sl3516/stats for displaying
  183. the number of requests per algorithm and other internal stats.
  184. config CRYPTO_DEV_HIFN_795X
  185. tristate "Driver HIFN 795x crypto accelerator chips"
  186. select CRYPTO_LIB_DES
  187. select CRYPTO_SKCIPHER
  188. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  189. depends on PCI
  190. depends on !ARCH_DMA_ADDR_T_64BIT
  191. help
  192. This option allows you to have support for HIFN 795x crypto adapters.
  193. config CRYPTO_DEV_HIFN_795X_RNG
  194. bool "HIFN 795x random number generator"
  195. depends on CRYPTO_DEV_HIFN_795X
  196. help
  197. Select this option if you want to enable the random number generator
  198. on the HIFN 795x crypto adapters.
  199. source "drivers/crypto/caam/Kconfig"
  200. config CRYPTO_DEV_TALITOS
  201. tristate "Talitos Freescale Security Engine (SEC)"
  202. select CRYPTO_AEAD
  203. select CRYPTO_AUTHENC
  204. select CRYPTO_SKCIPHER
  205. select CRYPTO_HASH
  206. select CRYPTO_LIB_DES
  207. select HW_RANDOM
  208. depends on FSL_SOC
  209. help
  210. Say 'Y' here to use the Freescale Security Engine (SEC)
  211. to offload cryptographic algorithm computation.
  212. The Freescale SEC is present on PowerQUICC 'E' processors, such
  213. as the MPC8349E and MPC8548E.
  214. To compile this driver as a module, choose M here: the module
  215. will be called talitos.
  216. config CRYPTO_DEV_TALITOS1
  217. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  218. depends on CRYPTO_DEV_TALITOS
  219. depends on PPC_8xx || PPC_82xx
  220. default y
  221. help
  222. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  223. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  224. version 1.2 found on MPC8xx
  225. config CRYPTO_DEV_TALITOS2
  226. bool "SEC2+ (SEC version 2.0 or upper)"
  227. depends on CRYPTO_DEV_TALITOS
  228. default y if !PPC_8xx
  229. help
  230. Say 'Y' here to use the Freescale Security Engine (SEC)
  231. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  232. config CRYPTO_DEV_PPC4XX
  233. tristate "Driver AMCC PPC4xx crypto accelerator"
  234. depends on PPC && 4xx
  235. select CRYPTO_HASH
  236. select CRYPTO_AEAD
  237. select CRYPTO_AES
  238. select CRYPTO_LIB_AES
  239. select CRYPTO_CCM
  240. select CRYPTO_CTR
  241. select CRYPTO_GCM
  242. select CRYPTO_SKCIPHER
  243. help
  244. This option allows you to have support for AMCC crypto acceleration.
  245. config HW_RANDOM_PPC4XX
  246. bool "PowerPC 4xx generic true random number generator support"
  247. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
  248. default y
  249. help
  250. This option provides the kernel-side support for the TRNG hardware
  251. found in the security function of some PowerPC 4xx SoCs.
  252. config CRYPTO_DEV_OMAP
  253. tristate "Support for OMAP crypto HW accelerators"
  254. depends on ARCH_OMAP2PLUS
  255. help
  256. OMAP processors have various crypto HW accelerators. Select this if
  257. you want to use the OMAP modules for any of the crypto algorithms.
  258. if CRYPTO_DEV_OMAP
  259. config CRYPTO_DEV_OMAP_SHAM
  260. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  261. depends on ARCH_OMAP2PLUS
  262. select CRYPTO_ENGINE
  263. select CRYPTO_SHA1
  264. select CRYPTO_MD5
  265. select CRYPTO_SHA256
  266. select CRYPTO_SHA512
  267. select CRYPTO_HMAC
  268. help
  269. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  270. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  271. config CRYPTO_DEV_OMAP_AES
  272. tristate "Support for OMAP AES hw engine"
  273. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  274. select CRYPTO_AES
  275. select CRYPTO_SKCIPHER
  276. select CRYPTO_ENGINE
  277. select CRYPTO_CBC
  278. select CRYPTO_ECB
  279. select CRYPTO_CTR
  280. select CRYPTO_AEAD
  281. help
  282. OMAP processors have AES module accelerator. Select this if you
  283. want to use the OMAP module for AES algorithms.
  284. config CRYPTO_DEV_OMAP_DES
  285. tristate "Support for OMAP DES/3DES hw engine"
  286. depends on ARCH_OMAP2PLUS
  287. select CRYPTO_LIB_DES
  288. select CRYPTO_SKCIPHER
  289. select CRYPTO_ENGINE
  290. help
  291. OMAP processors have DES/3DES module accelerator. Select this if you
  292. want to use the OMAP module for DES and 3DES algorithms. Currently
  293. the ECB and CBC modes of operation are supported by the driver. Also
  294. accesses made on unaligned boundaries are supported.
  295. endif # CRYPTO_DEV_OMAP
  296. config CRYPTO_DEV_SAHARA
  297. tristate "Support for SAHARA crypto accelerator"
  298. depends on ARCH_MXC && OF
  299. select CRYPTO_SKCIPHER
  300. select CRYPTO_AES
  301. select CRYPTO_ECB
  302. select CRYPTO_ENGINE
  303. help
  304. This option enables support for the SAHARA HW crypto accelerator
  305. found in some Freescale i.MX chips.
  306. config CRYPTO_DEV_EXYNOS_RNG
  307. tristate "Exynos HW pseudo random number generator support"
  308. depends on ARCH_EXYNOS || COMPILE_TEST
  309. depends on HAS_IOMEM
  310. select CRYPTO_RNG
  311. help
  312. This driver provides kernel-side support through the
  313. cryptographic API for the pseudo random number generator hardware
  314. found on Exynos SoCs.
  315. To compile this driver as a module, choose M here: the
  316. module will be called exynos-rng.
  317. If unsure, say Y.
  318. config CRYPTO_DEV_S5P
  319. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  320. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  321. depends on HAS_IOMEM
  322. select CRYPTO_AES
  323. select CRYPTO_SKCIPHER
  324. help
  325. This option allows you to have support for S5P crypto acceleration.
  326. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  327. algorithms execution.
  328. config CRYPTO_DEV_EXYNOS_HASH
  329. bool "Support for Samsung Exynos HASH accelerator"
  330. depends on CRYPTO_DEV_S5P
  331. depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
  332. select CRYPTO_SHA1
  333. select CRYPTO_MD5
  334. select CRYPTO_SHA256
  335. help
  336. Select this to offload Exynos from HASH MD5/SHA1/SHA256.
  337. This will select software SHA1, MD5 and SHA256 as they are
  338. needed for small and zero-size messages.
  339. HASH algorithms will be disabled if EXYNOS_RNG
  340. is enabled due to hw conflict.
  341. config CRYPTO_DEV_NX
  342. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  343. depends on PPC64
  344. help
  345. This enables support for the NX hardware cryptographic accelerator
  346. coprocessor that is in IBM PowerPC P7+ or later processors. This
  347. does not actually enable any drivers, it only allows you to select
  348. which acceleration type (encryption and/or compression) to enable.
  349. if CRYPTO_DEV_NX
  350. source "drivers/crypto/nx/Kconfig"
  351. endif
  352. config CRYPTO_DEV_ATMEL_AUTHENC
  353. bool "Support for Atmel IPSEC/SSL hw accelerator"
  354. depends on ARCH_AT91 || COMPILE_TEST
  355. depends on CRYPTO_DEV_ATMEL_AES
  356. help
  357. Some Atmel processors can combine the AES and SHA hw accelerators
  358. to enhance support of IPSEC/SSL.
  359. Select this if you want to use the Atmel modules for
  360. authenc(hmac(shaX),Y(cbc)) algorithms.
  361. config CRYPTO_DEV_ATMEL_AES
  362. tristate "Support for Atmel AES hw accelerator"
  363. depends on ARCH_AT91 || COMPILE_TEST
  364. select CRYPTO_AES
  365. select CRYPTO_AEAD
  366. select CRYPTO_SKCIPHER
  367. select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
  368. select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
  369. help
  370. Some Atmel processors have AES hw accelerator.
  371. Select this if you want to use the Atmel module for
  372. AES algorithms.
  373. To compile this driver as a module, choose M here: the module
  374. will be called atmel-aes.
  375. config CRYPTO_DEV_ATMEL_TDES
  376. tristate "Support for Atmel DES/TDES hw accelerator"
  377. depends on ARCH_AT91 || COMPILE_TEST
  378. select CRYPTO_LIB_DES
  379. select CRYPTO_SKCIPHER
  380. help
  381. Some Atmel processors have DES/TDES hw accelerator.
  382. Select this if you want to use the Atmel module for
  383. DES/TDES algorithms.
  384. To compile this driver as a module, choose M here: the module
  385. will be called atmel-tdes.
  386. config CRYPTO_DEV_ATMEL_SHA
  387. tristate "Support for Atmel SHA hw accelerator"
  388. depends on ARCH_AT91 || COMPILE_TEST
  389. select CRYPTO_HASH
  390. help
  391. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  392. hw accelerator.
  393. Select this if you want to use the Atmel module for
  394. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  395. To compile this driver as a module, choose M here: the module
  396. will be called atmel-sha.
  397. config CRYPTO_DEV_ATMEL_I2C
  398. tristate
  399. select BITREVERSE
  400. config CRYPTO_DEV_ATMEL_ECC
  401. tristate "Support for Microchip / Atmel ECC hw accelerator"
  402. depends on I2C
  403. select CRYPTO_DEV_ATMEL_I2C
  404. select CRYPTO_ECDH
  405. select CRC16
  406. help
  407. Microhip / Atmel ECC hw accelerator.
  408. Select this if you want to use the Microchip / Atmel module for
  409. ECDH algorithm.
  410. To compile this driver as a module, choose M here: the module
  411. will be called atmel-ecc.
  412. config CRYPTO_DEV_ATMEL_SHA204A
  413. tristate "Support for Microchip / Atmel SHA accelerator and RNG"
  414. depends on I2C
  415. select CRYPTO_DEV_ATMEL_I2C
  416. select HW_RANDOM
  417. select CRC16
  418. help
  419. Microhip / Atmel SHA accelerator and RNG.
  420. Select this if you want to use the Microchip / Atmel SHA204A
  421. module as a random number generator. (Other functions of the
  422. chip are currently not exposed by this driver)
  423. To compile this driver as a module, choose M here: the module
  424. will be called atmel-sha204a.
  425. config CRYPTO_DEV_CCP
  426. bool "Support for AMD Secure Processor"
  427. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  428. help
  429. The AMD Secure Processor provides support for the Cryptographic Coprocessor
  430. (CCP) and the Platform Security Processor (PSP) devices.
  431. if CRYPTO_DEV_CCP
  432. source "drivers/crypto/ccp/Kconfig"
  433. endif
  434. config CRYPTO_DEV_MXS_DCP
  435. tristate "Support for Freescale MXS DCP"
  436. depends on (ARCH_MXS || ARCH_MXC)
  437. select STMP_DEVICE
  438. select CRYPTO_CBC
  439. select CRYPTO_ECB
  440. select CRYPTO_AES
  441. select CRYPTO_SKCIPHER
  442. select CRYPTO_HASH
  443. help
  444. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  445. co-processor on the die.
  446. To compile this driver as a module, choose M here: the module
  447. will be called mxs-dcp.
  448. source "drivers/crypto/cavium/cpt/Kconfig"
  449. source "drivers/crypto/cavium/nitrox/Kconfig"
  450. source "drivers/crypto/marvell/Kconfig"
  451. source "drivers/crypto/intel/Kconfig"
  452. config CRYPTO_DEV_CAVIUM_ZIP
  453. tristate "Cavium ZIP driver"
  454. depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
  455. help
  456. Select this option if you want to enable compression/decompression
  457. acceleration on Cavium's ARM based SoCs
  458. config CRYPTO_DEV_QCE
  459. tristate "Qualcomm crypto engine accelerator"
  460. depends on ARCH_QCOM || COMPILE_TEST
  461. depends on HAS_IOMEM
  462. help
  463. This driver supports Qualcomm crypto engine accelerator
  464. hardware. To compile this driver as a module, choose M here. The
  465. module will be called qcrypto.
  466. config CRYPTO_DEV_QCE_SKCIPHER
  467. bool
  468. depends on CRYPTO_DEV_QCE
  469. select CRYPTO_AES
  470. select CRYPTO_LIB_DES
  471. select CRYPTO_ECB
  472. select CRYPTO_CBC
  473. select CRYPTO_XTS
  474. select CRYPTO_CTR
  475. select CRYPTO_SKCIPHER
  476. config CRYPTO_DEV_QCE_SHA
  477. bool
  478. depends on CRYPTO_DEV_QCE
  479. select CRYPTO_SHA1
  480. select CRYPTO_SHA256
  481. config CRYPTO_DEV_QCE_AEAD
  482. bool
  483. depends on CRYPTO_DEV_QCE
  484. select CRYPTO_AUTHENC
  485. select CRYPTO_LIB_DES
  486. choice
  487. prompt "Algorithms enabled for QCE acceleration"
  488. default CRYPTO_DEV_QCE_ENABLE_ALL
  489. depends on CRYPTO_DEV_QCE
  490. help
  491. This option allows to choose whether to build support for all algorithms
  492. (default), hashes-only, or skciphers-only.
  493. The QCE engine does not appear to scale as well as the CPU to handle
  494. multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
  495. QCE handles only 2 requests in parallel.
  496. Ipsec throughput seems to improve when disabling either family of
  497. algorithms, sharing the load with the CPU. Enabling skciphers-only
  498. appears to work best.
  499. config CRYPTO_DEV_QCE_ENABLE_ALL
  500. bool "All supported algorithms"
  501. select CRYPTO_DEV_QCE_SKCIPHER
  502. select CRYPTO_DEV_QCE_SHA
  503. select CRYPTO_DEV_QCE_AEAD
  504. help
  505. Enable all supported algorithms:
  506. - AES (CBC, CTR, ECB, XTS)
  507. - 3DES (CBC, ECB)
  508. - DES (CBC, ECB)
  509. - SHA1, HMAC-SHA1
  510. - SHA256, HMAC-SHA256
  511. config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
  512. bool "Symmetric-key ciphers only"
  513. select CRYPTO_DEV_QCE_SKCIPHER
  514. help
  515. Enable symmetric-key ciphers only:
  516. - AES (CBC, CTR, ECB, XTS)
  517. - 3DES (ECB, CBC)
  518. - DES (ECB, CBC)
  519. config CRYPTO_DEV_QCE_ENABLE_SHA
  520. bool "Hash/HMAC only"
  521. select CRYPTO_DEV_QCE_SHA
  522. help
  523. Enable hashes/HMAC algorithms only:
  524. - SHA1, HMAC-SHA1
  525. - SHA256, HMAC-SHA256
  526. config CRYPTO_DEV_QCE_ENABLE_AEAD
  527. bool "AEAD algorithms only"
  528. select CRYPTO_DEV_QCE_AEAD
  529. help
  530. Enable AEAD algorithms only:
  531. - authenc()
  532. - ccm(aes)
  533. - rfc4309(ccm(aes))
  534. endchoice
  535. config CRYPTO_DEV_QCE_SW_MAX_LEN
  536. int "Default maximum request size to use software for AES"
  537. depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
  538. default 512
  539. help
  540. This sets the default maximum request size to perform AES requests
  541. using software instead of the crypto engine. It can be changed by
  542. setting the aes_sw_max_len parameter.
  543. Small blocks are processed faster in software than hardware.
  544. Considering the 256-bit ciphers, software is 2-3 times faster than
  545. qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
  546. With 128-bit keys, the break-even point would be around 1024-bytes.
  547. The default is set a little lower, to 512 bytes, to balance the
  548. cost in CPU usage. The minimum recommended setting is 16-bytes
  549. (1 AES block), since AES-GCM will fail if you set it lower.
  550. Setting this to zero will send all requests to the hardware.
  551. Note that 192-bit keys are not supported by the hardware and are
  552. always processed by the software fallback, and all DES requests
  553. are done by the hardware.
  554. config CRYPTO_DEV_QCOM_RNG
  555. tristate "Qualcomm Random Number Generator Driver"
  556. depends on ARCH_QCOM || COMPILE_TEST
  557. depends on HW_RANDOM
  558. select CRYPTO_RNG
  559. help
  560. This driver provides support for the Random Number
  561. Generator hardware found on Qualcomm SoCs.
  562. To compile this driver as a module, choose M here. The
  563. module will be called qcom-rng. If unsure, say N.
  564. #config CRYPTO_DEV_VMX
  565. # bool "Support for VMX cryptographic acceleration instructions"
  566. # depends on PPC64 && VSX
  567. # help
  568. # Support for VMX cryptographic acceleration instructions.
  569. #
  570. #source "drivers/crypto/vmx/Kconfig"
  571. config CRYPTO_DEV_IMGTEC_HASH
  572. tristate "Imagination Technologies hardware hash accelerator"
  573. depends on MIPS || COMPILE_TEST
  574. select CRYPTO_MD5
  575. select CRYPTO_SHA1
  576. select CRYPTO_SHA256
  577. select CRYPTO_HASH
  578. help
  579. This driver interfaces with the Imagination Technologies
  580. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  581. hashing algorithms.
  582. config CRYPTO_DEV_ROCKCHIP
  583. tristate "Rockchip's Cryptographic Engine driver"
  584. depends on OF && ARCH_ROCKCHIP
  585. depends on PM
  586. select CRYPTO_ECB
  587. select CRYPTO_CBC
  588. select CRYPTO_DES
  589. select CRYPTO_AES
  590. select CRYPTO_ENGINE
  591. select CRYPTO_LIB_DES
  592. select CRYPTO_MD5
  593. select CRYPTO_SHA1
  594. select CRYPTO_SHA256
  595. select CRYPTO_HASH
  596. select CRYPTO_SKCIPHER
  597. help
  598. This driver interfaces with the hardware crypto accelerator.
  599. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  600. config CRYPTO_DEV_ROCKCHIP_DEBUG
  601. bool "Enable Rockchip crypto stats"
  602. depends on CRYPTO_DEV_ROCKCHIP
  603. depends on DEBUG_FS
  604. help
  605. Say y to enable Rockchip crypto debug stats.
  606. This will create /sys/kernel/debug/rk3288_crypto/stats for displaying
  607. the number of requests per algorithm and other internal stats.
  608. config CRYPTO_DEV_TEGRA
  609. tristate "Enable Tegra Security Engine"
  610. depends on TEGRA_HOST1X
  611. select CRYPTO_ENGINE
  612. help
  613. Select this to enable Tegra Security Engine which accelerates various
  614. AES encryption/decryption and HASH algorithms.
  615. config CRYPTO_DEV_ZYNQMP_AES
  616. tristate "Support for Xilinx ZynqMP AES hw accelerator"
  617. depends on ZYNQMP_FIRMWARE || COMPILE_TEST
  618. select CRYPTO_AES
  619. select CRYPTO_ENGINE
  620. select CRYPTO_AEAD
  621. help
  622. Xilinx ZynqMP has AES-GCM engine used for symmetric key
  623. encryption and decryption. This driver interfaces with AES hw
  624. accelerator. Select this if you want to use the ZynqMP module
  625. for AES algorithms.
  626. config CRYPTO_DEV_ZYNQMP_SHA3
  627. tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
  628. depends on ZYNQMP_FIRMWARE || COMPILE_TEST
  629. select CRYPTO_SHA3
  630. help
  631. Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
  632. This driver interfaces with SHA3 hardware engine.
  633. Select this if you want to use the ZynqMP module
  634. for SHA3 hash computation.
  635. source "drivers/crypto/chelsio/Kconfig"
  636. source "drivers/crypto/virtio/Kconfig"
  637. config CRYPTO_DEV_BCM_SPU
  638. tristate "Broadcom symmetric crypto/hash acceleration support"
  639. depends on ARCH_BCM_IPROC
  640. depends on MAILBOX
  641. default m
  642. select CRYPTO_AUTHENC
  643. select CRYPTO_LIB_DES
  644. select CRYPTO_MD5
  645. select CRYPTO_SHA1
  646. select CRYPTO_SHA256
  647. select CRYPTO_SHA512
  648. help
  649. This driver provides support for Broadcom crypto acceleration using the
  650. Secure Processing Unit (SPU). The SPU driver registers skcipher,
  651. ahash, and aead algorithms with the kernel cryptographic API.
  652. source "drivers/crypto/stm32/Kconfig"
  653. config CRYPTO_DEV_SAFEXCEL
  654. tristate "Inside Secure's SafeXcel cryptographic engine driver"
  655. depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
  656. select CRYPTO_LIB_AES
  657. select CRYPTO_AUTHENC
  658. select CRYPTO_SKCIPHER
  659. select CRYPTO_LIB_DES
  660. select CRYPTO_HASH
  661. select CRYPTO_HMAC
  662. select CRYPTO_MD5
  663. select CRYPTO_SHA1
  664. select CRYPTO_SHA256
  665. select CRYPTO_SHA512
  666. select CRYPTO_CHACHA20POLY1305
  667. select CRYPTO_SHA3
  668. help
  669. This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
  670. engines designed by Inside Secure. It currently accelerates DES, 3DES and
  671. AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
  672. SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
  673. Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
  674. config CRYPTO_DEV_ARTPEC6
  675. tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
  676. depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
  677. depends on OF
  678. select CRYPTO_AEAD
  679. select CRYPTO_AES
  680. select CRYPTO_ALGAPI
  681. select CRYPTO_SKCIPHER
  682. select CRYPTO_CTR
  683. select CRYPTO_HASH
  684. select CRYPTO_SHA1
  685. select CRYPTO_SHA256
  686. select CRYPTO_SHA512
  687. help
  688. Enables the driver for the on-chip crypto accelerator
  689. of Axis ARTPEC SoCs.
  690. To compile this driver as a module, choose M here.
  691. config CRYPTO_DEV_CCREE
  692. tristate "Support for ARM TrustZone CryptoCell family of security processors"
  693. depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
  694. depends on HAS_IOMEM
  695. select CRYPTO_HASH
  696. select CRYPTO_SKCIPHER
  697. select CRYPTO_LIB_DES
  698. select CRYPTO_AEAD
  699. select CRYPTO_AUTHENC
  700. select CRYPTO_SHA1
  701. select CRYPTO_MD5
  702. select CRYPTO_SHA256
  703. select CRYPTO_SHA512
  704. select CRYPTO_HMAC
  705. select CRYPTO_AES
  706. select CRYPTO_CBC
  707. select CRYPTO_ECB
  708. select CRYPTO_CTR
  709. select CRYPTO_XTS
  710. select CRYPTO_SM4_GENERIC
  711. select CRYPTO_SM3_GENERIC
  712. help
  713. Say 'Y' to enable a driver for the REE interface of the Arm
  714. TrustZone CryptoCell family of processors. Currently the
  715. CryptoCell 713, 703, 712, 710 and 630 are supported.
  716. Choose this if you wish to use hardware acceleration of
  717. cryptographic operations on the system REE.
  718. If unsure say Y.
  719. source "drivers/crypto/hisilicon/Kconfig"
  720. source "drivers/crypto/amlogic/Kconfig"
  721. config CRYPTO_DEV_SA2UL
  722. tristate "Support for TI security accelerator"
  723. depends on ARCH_K3 || COMPILE_TEST
  724. select CRYPTO_AES
  725. select CRYPTO_ALGAPI
  726. select CRYPTO_AUTHENC
  727. select CRYPTO_DES
  728. select CRYPTO_SHA1
  729. select CRYPTO_SHA256
  730. select CRYPTO_SHA512
  731. select HW_RANDOM
  732. select SG_SPLIT
  733. help
  734. K3 devices include a security accelerator engine that may be
  735. used for crypto offload. Select this if you want to use hardware
  736. acceleration for cryptographic algorithms on these devices.
  737. source "drivers/crypto/aspeed/Kconfig"
  738. source "drivers/crypto/starfive/Kconfig"
  739. endif # CRYPTO_HW