rk3288_crypto_ahash.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Crypto acceleration support for Rockchip RK3288
  4. *
  5. * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
  6. *
  7. * Author: Zain Wang <zain.wang@rock-chips.com>
  8. *
  9. * Some ideas are from marvell/cesa.c and s5p-sss.c driver.
  10. */
  11. #include <linux/unaligned.h>
  12. #include <crypto/internal/hash.h>
  13. #include <linux/device.h>
  14. #include <linux/err.h>
  15. #include <linux/iopoll.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/string.h>
  19. #include "rk3288_crypto.h"
  20. /*
  21. * IC can not process zero message hash,
  22. * so we put the fixed hash out when met zero message.
  23. */
  24. static bool rk_ahash_need_fallback(struct ahash_request *req)
  25. {
  26. struct scatterlist *sg;
  27. sg = req->src;
  28. while (sg) {
  29. if (!IS_ALIGNED(sg->offset, sizeof(u32))) {
  30. return true;
  31. }
  32. if (sg->length % 4) {
  33. return true;
  34. }
  35. sg = sg_next(sg);
  36. }
  37. return false;
  38. }
  39. static int rk_ahash_digest_fb(struct ahash_request *areq)
  40. {
  41. struct rk_ahash_rctx *rctx = ahash_request_ctx(areq);
  42. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  43. struct rk_ahash_ctx *tfmctx = crypto_ahash_ctx(tfm);
  44. struct ahash_alg *alg = crypto_ahash_alg(tfm);
  45. struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash.base);
  46. algt->stat_fb++;
  47. ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm);
  48. rctx->fallback_req.base.flags = areq->base.flags &
  49. CRYPTO_TFM_REQ_MAY_SLEEP;
  50. rctx->fallback_req.nbytes = areq->nbytes;
  51. rctx->fallback_req.src = areq->src;
  52. rctx->fallback_req.result = areq->result;
  53. return crypto_ahash_digest(&rctx->fallback_req);
  54. }
  55. static int zero_message_process(struct ahash_request *req)
  56. {
  57. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  58. int rk_digest_size = crypto_ahash_digestsize(tfm);
  59. switch (rk_digest_size) {
  60. case SHA1_DIGEST_SIZE:
  61. memcpy(req->result, sha1_zero_message_hash, rk_digest_size);
  62. break;
  63. case SHA256_DIGEST_SIZE:
  64. memcpy(req->result, sha256_zero_message_hash, rk_digest_size);
  65. break;
  66. case MD5_DIGEST_SIZE:
  67. memcpy(req->result, md5_zero_message_hash, rk_digest_size);
  68. break;
  69. default:
  70. return -EINVAL;
  71. }
  72. return 0;
  73. }
  74. static void rk_ahash_reg_init(struct ahash_request *req,
  75. struct rk_crypto_info *dev)
  76. {
  77. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  78. int reg_status;
  79. reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL) |
  80. RK_CRYPTO_HASH_FLUSH | _SBF(0xffff, 16);
  81. CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
  82. reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL);
  83. reg_status &= (~RK_CRYPTO_HASH_FLUSH);
  84. reg_status |= _SBF(0xffff, 16);
  85. CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
  86. memset_io(dev->reg + RK_CRYPTO_HASH_DOUT_0, 0, 32);
  87. CRYPTO_WRITE(dev, RK_CRYPTO_INTENA, RK_CRYPTO_HRDMA_ERR_ENA |
  88. RK_CRYPTO_HRDMA_DONE_ENA);
  89. CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, RK_CRYPTO_HRDMA_ERR_INT |
  90. RK_CRYPTO_HRDMA_DONE_INT);
  91. CRYPTO_WRITE(dev, RK_CRYPTO_HASH_CTRL, rctx->mode |
  92. RK_CRYPTO_HASH_SWAP_DO);
  93. CRYPTO_WRITE(dev, RK_CRYPTO_CONF, RK_CRYPTO_BYTESWAP_HRFIFO |
  94. RK_CRYPTO_BYTESWAP_BRFIFO |
  95. RK_CRYPTO_BYTESWAP_BTFIFO);
  96. CRYPTO_WRITE(dev, RK_CRYPTO_HASH_MSG_LEN, req->nbytes);
  97. }
  98. static int rk_ahash_init(struct ahash_request *req)
  99. {
  100. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  101. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  102. struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  103. ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
  104. rctx->fallback_req.base.flags = req->base.flags &
  105. CRYPTO_TFM_REQ_MAY_SLEEP;
  106. return crypto_ahash_init(&rctx->fallback_req);
  107. }
  108. static int rk_ahash_update(struct ahash_request *req)
  109. {
  110. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  111. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  112. struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  113. ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
  114. rctx->fallback_req.base.flags = req->base.flags &
  115. CRYPTO_TFM_REQ_MAY_SLEEP;
  116. rctx->fallback_req.nbytes = req->nbytes;
  117. rctx->fallback_req.src = req->src;
  118. return crypto_ahash_update(&rctx->fallback_req);
  119. }
  120. static int rk_ahash_final(struct ahash_request *req)
  121. {
  122. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  123. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  124. struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  125. ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
  126. rctx->fallback_req.base.flags = req->base.flags &
  127. CRYPTO_TFM_REQ_MAY_SLEEP;
  128. rctx->fallback_req.result = req->result;
  129. return crypto_ahash_final(&rctx->fallback_req);
  130. }
  131. static int rk_ahash_finup(struct ahash_request *req)
  132. {
  133. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  134. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  135. struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  136. ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
  137. rctx->fallback_req.base.flags = req->base.flags &
  138. CRYPTO_TFM_REQ_MAY_SLEEP;
  139. rctx->fallback_req.nbytes = req->nbytes;
  140. rctx->fallback_req.src = req->src;
  141. rctx->fallback_req.result = req->result;
  142. return crypto_ahash_finup(&rctx->fallback_req);
  143. }
  144. static int rk_ahash_import(struct ahash_request *req, const void *in)
  145. {
  146. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  147. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  148. struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  149. ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
  150. rctx->fallback_req.base.flags = req->base.flags &
  151. CRYPTO_TFM_REQ_MAY_SLEEP;
  152. return crypto_ahash_import(&rctx->fallback_req, in);
  153. }
  154. static int rk_ahash_export(struct ahash_request *req, void *out)
  155. {
  156. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  157. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  158. struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  159. ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
  160. rctx->fallback_req.base.flags = req->base.flags &
  161. CRYPTO_TFM_REQ_MAY_SLEEP;
  162. return crypto_ahash_export(&rctx->fallback_req, out);
  163. }
  164. static int rk_ahash_digest(struct ahash_request *req)
  165. {
  166. struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
  167. struct rk_crypto_info *dev;
  168. struct crypto_engine *engine;
  169. if (rk_ahash_need_fallback(req))
  170. return rk_ahash_digest_fb(req);
  171. if (!req->nbytes)
  172. return zero_message_process(req);
  173. dev = get_rk_crypto();
  174. rctx->dev = dev;
  175. engine = dev->engine;
  176. return crypto_transfer_hash_request_to_engine(engine, req);
  177. }
  178. static void crypto_ahash_dma_start(struct rk_crypto_info *dev, struct scatterlist *sg)
  179. {
  180. CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAS, sg_dma_address(sg));
  181. CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAL, sg_dma_len(sg) / 4);
  182. CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_HASH_START |
  183. (RK_CRYPTO_HASH_START << 16));
  184. }
  185. static int rk_hash_prepare(struct crypto_engine *engine, void *breq)
  186. {
  187. struct ahash_request *areq = container_of(breq, struct ahash_request, base);
  188. struct rk_ahash_rctx *rctx = ahash_request_ctx(areq);
  189. struct rk_crypto_info *rkc = rctx->dev;
  190. int ret;
  191. ret = dma_map_sg(rkc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE);
  192. if (ret <= 0)
  193. return -EINVAL;
  194. rctx->nrsg = ret;
  195. return 0;
  196. }
  197. static void rk_hash_unprepare(struct crypto_engine *engine, void *breq)
  198. {
  199. struct ahash_request *areq = container_of(breq, struct ahash_request, base);
  200. struct rk_ahash_rctx *rctx = ahash_request_ctx(areq);
  201. struct rk_crypto_info *rkc = rctx->dev;
  202. dma_unmap_sg(rkc->dev, areq->src, rctx->nrsg, DMA_TO_DEVICE);
  203. }
  204. static int rk_hash_run(struct crypto_engine *engine, void *breq)
  205. {
  206. struct ahash_request *areq = container_of(breq, struct ahash_request, base);
  207. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  208. struct rk_ahash_rctx *rctx = ahash_request_ctx(areq);
  209. struct ahash_alg *alg = crypto_ahash_alg(tfm);
  210. struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash.base);
  211. struct scatterlist *sg = areq->src;
  212. struct rk_crypto_info *rkc = rctx->dev;
  213. int err;
  214. int i;
  215. u32 v;
  216. err = pm_runtime_resume_and_get(rkc->dev);
  217. if (err)
  218. return err;
  219. err = rk_hash_prepare(engine, breq);
  220. if (err)
  221. goto theend;
  222. rctx->mode = 0;
  223. algt->stat_req++;
  224. rkc->nreq++;
  225. switch (crypto_ahash_digestsize(tfm)) {
  226. case SHA1_DIGEST_SIZE:
  227. rctx->mode = RK_CRYPTO_HASH_SHA1;
  228. break;
  229. case SHA256_DIGEST_SIZE:
  230. rctx->mode = RK_CRYPTO_HASH_SHA256;
  231. break;
  232. case MD5_DIGEST_SIZE:
  233. rctx->mode = RK_CRYPTO_HASH_MD5;
  234. break;
  235. default:
  236. err = -EINVAL;
  237. goto theend;
  238. }
  239. rk_ahash_reg_init(areq, rkc);
  240. while (sg) {
  241. reinit_completion(&rkc->complete);
  242. rkc->status = 0;
  243. crypto_ahash_dma_start(rkc, sg);
  244. wait_for_completion_interruptible_timeout(&rkc->complete,
  245. msecs_to_jiffies(2000));
  246. if (!rkc->status) {
  247. dev_err(rkc->dev, "DMA timeout\n");
  248. err = -EFAULT;
  249. goto theend;
  250. }
  251. sg = sg_next(sg);
  252. }
  253. /*
  254. * it will take some time to process date after last dma
  255. * transmission.
  256. *
  257. * waiting time is relative with the last date len,
  258. * so cannot set a fixed time here.
  259. * 10us makes system not call here frequently wasting
  260. * efficiency, and make it response quickly when dma
  261. * complete.
  262. */
  263. readl_poll_timeout(rkc->reg + RK_CRYPTO_HASH_STS, v, v == 0, 10, 1000);
  264. for (i = 0; i < crypto_ahash_digestsize(tfm) / 4; i++) {
  265. v = readl(rkc->reg + RK_CRYPTO_HASH_DOUT_0 + i * 4);
  266. put_unaligned_le32(v, areq->result + i * 4);
  267. }
  268. theend:
  269. pm_runtime_put_autosuspend(rkc->dev);
  270. rk_hash_unprepare(engine, breq);
  271. local_bh_disable();
  272. crypto_finalize_hash_request(engine, breq, err);
  273. local_bh_enable();
  274. return 0;
  275. }
  276. static int rk_hash_init_tfm(struct crypto_ahash *tfm)
  277. {
  278. struct rk_ahash_ctx *tctx = crypto_ahash_ctx(tfm);
  279. const char *alg_name = crypto_ahash_alg_name(tfm);
  280. struct ahash_alg *alg = crypto_ahash_alg(tfm);
  281. struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash.base);
  282. /* for fallback */
  283. tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0,
  284. CRYPTO_ALG_NEED_FALLBACK);
  285. if (IS_ERR(tctx->fallback_tfm)) {
  286. dev_err(algt->dev->dev, "Could not load fallback driver.\n");
  287. return PTR_ERR(tctx->fallback_tfm);
  288. }
  289. crypto_ahash_set_reqsize(tfm,
  290. sizeof(struct rk_ahash_rctx) +
  291. crypto_ahash_reqsize(tctx->fallback_tfm));
  292. return 0;
  293. }
  294. static void rk_hash_exit_tfm(struct crypto_ahash *tfm)
  295. {
  296. struct rk_ahash_ctx *tctx = crypto_ahash_ctx(tfm);
  297. crypto_free_ahash(tctx->fallback_tfm);
  298. }
  299. struct rk_crypto_tmp rk_ahash_sha1 = {
  300. .type = CRYPTO_ALG_TYPE_AHASH,
  301. .alg.hash.base = {
  302. .init = rk_ahash_init,
  303. .update = rk_ahash_update,
  304. .final = rk_ahash_final,
  305. .finup = rk_ahash_finup,
  306. .export = rk_ahash_export,
  307. .import = rk_ahash_import,
  308. .digest = rk_ahash_digest,
  309. .init_tfm = rk_hash_init_tfm,
  310. .exit_tfm = rk_hash_exit_tfm,
  311. .halg = {
  312. .digestsize = SHA1_DIGEST_SIZE,
  313. .statesize = sizeof(struct sha1_state),
  314. .base = {
  315. .cra_name = "sha1",
  316. .cra_driver_name = "rk-sha1",
  317. .cra_priority = 300,
  318. .cra_flags = CRYPTO_ALG_ASYNC |
  319. CRYPTO_ALG_NEED_FALLBACK,
  320. .cra_blocksize = SHA1_BLOCK_SIZE,
  321. .cra_ctxsize = sizeof(struct rk_ahash_ctx),
  322. .cra_module = THIS_MODULE,
  323. }
  324. }
  325. },
  326. .alg.hash.op = {
  327. .do_one_request = rk_hash_run,
  328. },
  329. };
  330. struct rk_crypto_tmp rk_ahash_sha256 = {
  331. .type = CRYPTO_ALG_TYPE_AHASH,
  332. .alg.hash.base = {
  333. .init = rk_ahash_init,
  334. .update = rk_ahash_update,
  335. .final = rk_ahash_final,
  336. .finup = rk_ahash_finup,
  337. .export = rk_ahash_export,
  338. .import = rk_ahash_import,
  339. .digest = rk_ahash_digest,
  340. .init_tfm = rk_hash_init_tfm,
  341. .exit_tfm = rk_hash_exit_tfm,
  342. .halg = {
  343. .digestsize = SHA256_DIGEST_SIZE,
  344. .statesize = sizeof(struct sha256_state),
  345. .base = {
  346. .cra_name = "sha256",
  347. .cra_driver_name = "rk-sha256",
  348. .cra_priority = 300,
  349. .cra_flags = CRYPTO_ALG_ASYNC |
  350. CRYPTO_ALG_NEED_FALLBACK,
  351. .cra_blocksize = SHA256_BLOCK_SIZE,
  352. .cra_ctxsize = sizeof(struct rk_ahash_ctx),
  353. .cra_module = THIS_MODULE,
  354. }
  355. }
  356. },
  357. .alg.hash.op = {
  358. .do_one_request = rk_hash_run,
  359. },
  360. };
  361. struct rk_crypto_tmp rk_ahash_md5 = {
  362. .type = CRYPTO_ALG_TYPE_AHASH,
  363. .alg.hash.base = {
  364. .init = rk_ahash_init,
  365. .update = rk_ahash_update,
  366. .final = rk_ahash_final,
  367. .finup = rk_ahash_finup,
  368. .export = rk_ahash_export,
  369. .import = rk_ahash_import,
  370. .digest = rk_ahash_digest,
  371. .init_tfm = rk_hash_init_tfm,
  372. .exit_tfm = rk_hash_exit_tfm,
  373. .halg = {
  374. .digestsize = MD5_DIGEST_SIZE,
  375. .statesize = sizeof(struct md5_state),
  376. .base = {
  377. .cra_name = "md5",
  378. .cra_driver_name = "rk-md5",
  379. .cra_priority = 300,
  380. .cra_flags = CRYPTO_ALG_ASYNC |
  381. CRYPTO_ALG_NEED_FALLBACK,
  382. .cra_blocksize = SHA1_BLOCK_SIZE,
  383. .cra_ctxsize = sizeof(struct rk_ahash_ctx),
  384. .cra_module = THIS_MODULE,
  385. }
  386. }
  387. },
  388. .alg.hash.op = {
  389. .do_one_request = rk_hash_run,
  390. },
  391. };