hte-tegra194-test.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2021-2022 NVIDIA Corporation
  4. *
  5. * Author: Dipen Patel <dipenp@nvidia.com>
  6. */
  7. #include <linux/err.h>
  8. #include <linux/gpio/consumer.h>
  9. #include <linux/hte.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/mod_devicetable.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/timer.h>
  15. #include <linux/workqueue.h>
  16. /*
  17. * This sample HTE test driver demonstrates HTE API usage by enabling
  18. * hardware timestamp on gpio_in and specified LIC IRQ lines.
  19. *
  20. * Note: gpio_out and gpio_in need to be shorted externally in order for this
  21. * test driver to work for the GPIO monitoring. The test driver has been
  22. * tested on Jetson AGX Xavier platform by shorting pin 32 and 16 on 40 pin
  23. * header.
  24. *
  25. * Device tree snippet to activate this driver:
  26. * tegra_hte_test {
  27. * compatible = "nvidia,tegra194-hte-test";
  28. * in-gpio = <&gpio_aon TEGRA194_AON_GPIO(BB, 1)>;
  29. * out-gpio = <&gpio_aon TEGRA194_AON_GPIO(BB, 0)>;
  30. * timestamps = <&tegra_hte_aon TEGRA194_AON_GPIO(BB, 1)>,
  31. * <&tegra_hte_lic 0x19>;
  32. * timestamp-names = "hte-gpio", "hte-i2c-irq";
  33. * status = "okay";
  34. * };
  35. *
  36. * How to run test driver:
  37. * - Load test driver.
  38. * - For the GPIO, at regular interval gpio_out pin toggles triggering
  39. * HTE for rising edge on gpio_in pin.
  40. *
  41. * - For the LIC IRQ line, it uses 0x19 interrupt which is i2c controller 1.
  42. * - Run i2cdetect -y 1 1>/dev/null, this command will generate i2c bus
  43. * transactions which creates timestamp data.
  44. * - It prints below message for both the lines.
  45. * HW timestamp(<line id>:<ts seq number>): <timestamp>, edge: <edge>.
  46. * - Unloading the driver disables and deallocate the HTE.
  47. */
  48. static struct tegra_hte_test {
  49. int gpio_in_irq;
  50. struct device *pdev;
  51. struct gpio_desc *gpio_in;
  52. struct gpio_desc *gpio_out;
  53. struct hte_ts_desc *desc;
  54. struct timer_list timer;
  55. struct kobject *kobj;
  56. } hte;
  57. static enum hte_return process_hw_ts(struct hte_ts_data *ts, void *p)
  58. {
  59. char *edge;
  60. struct hte_ts_desc *desc = p;
  61. if (!ts || !p)
  62. return HTE_CB_HANDLED;
  63. if (ts->raw_level < 0)
  64. edge = "Unknown";
  65. pr_info("HW timestamp(%u: %llu): %llu, edge: %s\n",
  66. desc->attr.line_id, ts->seq, ts->tsc,
  67. (ts->raw_level >= 0) ? ((ts->raw_level == 0) ?
  68. "falling" : "rising") : edge);
  69. return HTE_CB_HANDLED;
  70. }
  71. static void gpio_timer_cb(struct timer_list *t)
  72. {
  73. (void)t;
  74. gpiod_set_value(hte.gpio_out, !gpiod_get_value(hte.gpio_out));
  75. mod_timer(&hte.timer, jiffies + msecs_to_jiffies(8000));
  76. }
  77. static irqreturn_t tegra_hte_test_gpio_isr(int irq, void *data)
  78. {
  79. (void)irq;
  80. (void)data;
  81. return IRQ_HANDLED;
  82. }
  83. static const struct of_device_id tegra_hte_test_of_match[] = {
  84. { .compatible = "nvidia,tegra194-hte-test"},
  85. { }
  86. };
  87. MODULE_DEVICE_TABLE(of, tegra_hte_test_of_match);
  88. static int tegra_hte_test_probe(struct platform_device *pdev)
  89. {
  90. int ret = 0;
  91. int i, cnt;
  92. dev_set_drvdata(&pdev->dev, &hte);
  93. hte.pdev = &pdev->dev;
  94. hte.gpio_out = gpiod_get(&pdev->dev, "out", 0);
  95. if (IS_ERR(hte.gpio_out)) {
  96. dev_err(&pdev->dev, "failed to get gpio out\n");
  97. ret = -EINVAL;
  98. goto out;
  99. }
  100. hte.gpio_in = gpiod_get(&pdev->dev, "in", 0);
  101. if (IS_ERR(hte.gpio_in)) {
  102. dev_err(&pdev->dev, "failed to get gpio in\n");
  103. ret = -EINVAL;
  104. goto free_gpio_out;
  105. }
  106. ret = gpiod_direction_output(hte.gpio_out, 0);
  107. if (ret) {
  108. dev_err(&pdev->dev, "failed to set output\n");
  109. ret = -EINVAL;
  110. goto free_gpio_in;
  111. }
  112. ret = gpiod_direction_input(hte.gpio_in);
  113. if (ret) {
  114. dev_err(&pdev->dev, "failed to set input\n");
  115. ret = -EINVAL;
  116. goto free_gpio_in;
  117. }
  118. ret = gpiod_to_irq(hte.gpio_in);
  119. if (ret < 0) {
  120. dev_err(&pdev->dev, "failed to map GPIO to IRQ: %d\n", ret);
  121. ret = -ENXIO;
  122. goto free_gpio_in;
  123. }
  124. hte.gpio_in_irq = ret;
  125. ret = request_irq(ret, tegra_hte_test_gpio_isr,
  126. IRQF_TRIGGER_RISING,
  127. "tegra_hte_gpio_test_isr", &hte);
  128. if (ret) {
  129. dev_err(&pdev->dev, "failed to acquire IRQ\n");
  130. ret = -ENXIO;
  131. goto free_irq;
  132. }
  133. cnt = of_hte_req_count(hte.pdev);
  134. if (cnt < 0) {
  135. ret = cnt;
  136. goto free_irq;
  137. }
  138. dev_info(&pdev->dev, "Total requested lines:%d\n", cnt);
  139. hte.desc = devm_kzalloc(hte.pdev, sizeof(*hte.desc) * cnt, GFP_KERNEL);
  140. if (!hte.desc) {
  141. ret = -ENOMEM;
  142. goto free_irq;
  143. }
  144. for (i = 0; i < cnt; i++) {
  145. if (i == 0)
  146. /*
  147. * GPIO hte init, line_id and name will be parsed from
  148. * the device tree node. The edge_flag is implicitly
  149. * set by request_irq call. Only line_data is needed to be
  150. * set.
  151. */
  152. hte_init_line_attr(&hte.desc[i], 0, 0, NULL,
  153. hte.gpio_in);
  154. else
  155. /*
  156. * same comment as above except that IRQ does not need
  157. * line data.
  158. */
  159. hte_init_line_attr(&hte.desc[i], 0, 0, NULL, NULL);
  160. ret = hte_ts_get(hte.pdev, &hte.desc[i], i);
  161. if (ret)
  162. goto ts_put;
  163. ret = devm_hte_request_ts_ns(hte.pdev, &hte.desc[i],
  164. process_hw_ts, NULL,
  165. &hte.desc[i]);
  166. if (ret) /* no need to ts_put, request API takes care */
  167. goto free_irq;
  168. }
  169. timer_setup(&hte.timer, gpio_timer_cb, 0);
  170. mod_timer(&hte.timer, jiffies + msecs_to_jiffies(5000));
  171. return 0;
  172. ts_put:
  173. cnt = i;
  174. for (i = 0; i < cnt; i++)
  175. hte_ts_put(&hte.desc[i]);
  176. free_irq:
  177. free_irq(hte.gpio_in_irq, &hte);
  178. free_gpio_in:
  179. gpiod_put(hte.gpio_in);
  180. free_gpio_out:
  181. gpiod_put(hte.gpio_out);
  182. out:
  183. return ret;
  184. }
  185. static void tegra_hte_test_remove(struct platform_device *pdev)
  186. {
  187. (void)pdev;
  188. free_irq(hte.gpio_in_irq, &hte);
  189. gpiod_put(hte.gpio_in);
  190. gpiod_put(hte.gpio_out);
  191. del_timer_sync(&hte.timer);
  192. }
  193. static struct platform_driver tegra_hte_test_driver = {
  194. .probe = tegra_hte_test_probe,
  195. .remove_new = tegra_hte_test_remove,
  196. .driver = {
  197. .name = "tegra_hte_test",
  198. .of_match_table = tegra_hte_test_of_match,
  199. },
  200. };
  201. module_platform_driver(tegra_hte_test_driver);
  202. MODULE_AUTHOR("Dipen Patel <dipenp@nvidia.com>");
  203. MODULE_DESCRIPTION("NVIDIA Tegra HTE (Hardware Timestamping Engine) test driver");
  204. MODULE_LICENSE("GPL");