master.c 77 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 Cadence Design Systems Inc.
  4. *
  5. * Author: Boris Brezillon <boris.brezillon@bootlin.com>
  6. */
  7. #include <linux/atomic.h>
  8. #include <linux/bug.h>
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/export.h>
  12. #include <linux/kernel.h>
  13. #include <linux/list.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/slab.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/workqueue.h>
  19. #include "internals.h"
  20. static DEFINE_IDR(i3c_bus_idr);
  21. static DEFINE_MUTEX(i3c_core_lock);
  22. static int __i3c_first_dynamic_bus_num;
  23. static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
  24. /**
  25. * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
  26. * @bus: I3C bus to take the lock on
  27. *
  28. * This function takes the bus lock so that no other operations can occur on
  29. * the bus. This is needed for all kind of bus maintenance operation, like
  30. * - enabling/disabling slave events
  31. * - re-triggering DAA
  32. * - changing the dynamic address of a device
  33. * - relinquishing mastership
  34. * - ...
  35. *
  36. * The reason for this kind of locking is that we don't want drivers and core
  37. * logic to rely on I3C device information that could be changed behind their
  38. * back.
  39. */
  40. static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
  41. {
  42. down_write(&bus->lock);
  43. }
  44. /**
  45. * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
  46. * operation
  47. * @bus: I3C bus to release the lock on
  48. *
  49. * Should be called when the bus maintenance operation is done. See
  50. * i3c_bus_maintenance_lock() for more details on what these maintenance
  51. * operations are.
  52. */
  53. static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
  54. {
  55. up_write(&bus->lock);
  56. }
  57. /**
  58. * i3c_bus_normaluse_lock - Lock the bus for a normal operation
  59. * @bus: I3C bus to take the lock on
  60. *
  61. * This function takes the bus lock for any operation that is not a maintenance
  62. * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
  63. * maintenance operations). Basically all communications with I3C devices are
  64. * normal operations (HDR, SDR transfers or CCC commands that do not change bus
  65. * state or I3C dynamic address).
  66. *
  67. * Note that this lock is not guaranteeing serialization of normal operations.
  68. * In other words, transfer requests passed to the I3C master can be submitted
  69. * in parallel and I3C master drivers have to use their own locking to make
  70. * sure two different communications are not inter-mixed, or access to the
  71. * output/input queue is not done while the engine is busy.
  72. */
  73. void i3c_bus_normaluse_lock(struct i3c_bus *bus)
  74. {
  75. down_read(&bus->lock);
  76. }
  77. /**
  78. * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
  79. * @bus: I3C bus to release the lock on
  80. *
  81. * Should be called when a normal operation is done. See
  82. * i3c_bus_normaluse_lock() for more details on what these normal operations
  83. * are.
  84. */
  85. void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
  86. {
  87. up_read(&bus->lock);
  88. }
  89. static struct i3c_master_controller *
  90. i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
  91. {
  92. return container_of(i3cbus, struct i3c_master_controller, bus);
  93. }
  94. static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
  95. {
  96. return container_of(dev, struct i3c_master_controller, dev);
  97. }
  98. static const struct device_type i3c_device_type;
  99. static struct i3c_bus *dev_to_i3cbus(struct device *dev)
  100. {
  101. struct i3c_master_controller *master;
  102. if (dev->type == &i3c_device_type)
  103. return dev_to_i3cdev(dev)->bus;
  104. master = dev_to_i3cmaster(dev);
  105. return &master->bus;
  106. }
  107. static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
  108. {
  109. struct i3c_master_controller *master;
  110. if (dev->type == &i3c_device_type)
  111. return dev_to_i3cdev(dev)->desc;
  112. master = dev_to_i3cmaster(dev);
  113. return master->this;
  114. }
  115. static ssize_t bcr_show(struct device *dev,
  116. struct device_attribute *da,
  117. char *buf)
  118. {
  119. struct i3c_bus *bus = dev_to_i3cbus(dev);
  120. struct i3c_dev_desc *desc;
  121. ssize_t ret;
  122. i3c_bus_normaluse_lock(bus);
  123. desc = dev_to_i3cdesc(dev);
  124. ret = sprintf(buf, "%x\n", desc->info.bcr);
  125. i3c_bus_normaluse_unlock(bus);
  126. return ret;
  127. }
  128. static DEVICE_ATTR_RO(bcr);
  129. static ssize_t dcr_show(struct device *dev,
  130. struct device_attribute *da,
  131. char *buf)
  132. {
  133. struct i3c_bus *bus = dev_to_i3cbus(dev);
  134. struct i3c_dev_desc *desc;
  135. ssize_t ret;
  136. i3c_bus_normaluse_lock(bus);
  137. desc = dev_to_i3cdesc(dev);
  138. ret = sprintf(buf, "%x\n", desc->info.dcr);
  139. i3c_bus_normaluse_unlock(bus);
  140. return ret;
  141. }
  142. static DEVICE_ATTR_RO(dcr);
  143. static ssize_t pid_show(struct device *dev,
  144. struct device_attribute *da,
  145. char *buf)
  146. {
  147. struct i3c_bus *bus = dev_to_i3cbus(dev);
  148. struct i3c_dev_desc *desc;
  149. ssize_t ret;
  150. i3c_bus_normaluse_lock(bus);
  151. desc = dev_to_i3cdesc(dev);
  152. ret = sprintf(buf, "%llx\n", desc->info.pid);
  153. i3c_bus_normaluse_unlock(bus);
  154. return ret;
  155. }
  156. static DEVICE_ATTR_RO(pid);
  157. static ssize_t dynamic_address_show(struct device *dev,
  158. struct device_attribute *da,
  159. char *buf)
  160. {
  161. struct i3c_bus *bus = dev_to_i3cbus(dev);
  162. struct i3c_dev_desc *desc;
  163. ssize_t ret;
  164. i3c_bus_normaluse_lock(bus);
  165. desc = dev_to_i3cdesc(dev);
  166. ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
  167. i3c_bus_normaluse_unlock(bus);
  168. return ret;
  169. }
  170. static DEVICE_ATTR_RO(dynamic_address);
  171. static const char * const hdrcap_strings[] = {
  172. "hdr-ddr", "hdr-tsp", "hdr-tsl",
  173. };
  174. static ssize_t hdrcap_show(struct device *dev,
  175. struct device_attribute *da,
  176. char *buf)
  177. {
  178. struct i3c_bus *bus = dev_to_i3cbus(dev);
  179. struct i3c_dev_desc *desc;
  180. ssize_t offset = 0, ret;
  181. unsigned long caps;
  182. int mode;
  183. i3c_bus_normaluse_lock(bus);
  184. desc = dev_to_i3cdesc(dev);
  185. caps = desc->info.hdr_cap;
  186. for_each_set_bit(mode, &caps, 8) {
  187. if (mode >= ARRAY_SIZE(hdrcap_strings))
  188. break;
  189. if (!hdrcap_strings[mode])
  190. continue;
  191. ret = sprintf(buf + offset, offset ? " %s" : "%s",
  192. hdrcap_strings[mode]);
  193. if (ret < 0)
  194. goto out;
  195. offset += ret;
  196. }
  197. ret = sprintf(buf + offset, "\n");
  198. if (ret < 0)
  199. goto out;
  200. ret = offset + ret;
  201. out:
  202. i3c_bus_normaluse_unlock(bus);
  203. return ret;
  204. }
  205. static DEVICE_ATTR_RO(hdrcap);
  206. static ssize_t modalias_show(struct device *dev,
  207. struct device_attribute *da, char *buf)
  208. {
  209. struct i3c_device *i3c = dev_to_i3cdev(dev);
  210. struct i3c_device_info devinfo;
  211. u16 manuf, part, ext;
  212. i3c_device_get_info(i3c, &devinfo);
  213. manuf = I3C_PID_MANUF_ID(devinfo.pid);
  214. part = I3C_PID_PART_ID(devinfo.pid);
  215. ext = I3C_PID_EXTRA_INFO(devinfo.pid);
  216. if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
  217. return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
  218. manuf);
  219. return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
  220. devinfo.dcr, manuf, part, ext);
  221. }
  222. static DEVICE_ATTR_RO(modalias);
  223. static struct attribute *i3c_device_attrs[] = {
  224. &dev_attr_bcr.attr,
  225. &dev_attr_dcr.attr,
  226. &dev_attr_pid.attr,
  227. &dev_attr_dynamic_address.attr,
  228. &dev_attr_hdrcap.attr,
  229. &dev_attr_modalias.attr,
  230. NULL,
  231. };
  232. ATTRIBUTE_GROUPS(i3c_device);
  233. static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
  234. {
  235. const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  236. struct i3c_device_info devinfo;
  237. u16 manuf, part, ext;
  238. if (i3cdev->desc)
  239. devinfo = i3cdev->desc->info;
  240. manuf = I3C_PID_MANUF_ID(devinfo.pid);
  241. part = I3C_PID_PART_ID(devinfo.pid);
  242. ext = I3C_PID_EXTRA_INFO(devinfo.pid);
  243. if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
  244. return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
  245. devinfo.dcr, manuf);
  246. return add_uevent_var(env,
  247. "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
  248. devinfo.dcr, manuf, part, ext);
  249. }
  250. static const struct device_type i3c_device_type = {
  251. .groups = i3c_device_groups,
  252. .uevent = i3c_device_uevent,
  253. };
  254. static int i3c_device_match(struct device *dev, const struct device_driver *drv)
  255. {
  256. struct i3c_device *i3cdev;
  257. const struct i3c_driver *i3cdrv;
  258. if (dev->type != &i3c_device_type)
  259. return 0;
  260. i3cdev = dev_to_i3cdev(dev);
  261. i3cdrv = drv_to_i3cdrv(drv);
  262. if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
  263. return 1;
  264. return 0;
  265. }
  266. static int i3c_device_probe(struct device *dev)
  267. {
  268. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  269. struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
  270. return driver->probe(i3cdev);
  271. }
  272. static void i3c_device_remove(struct device *dev)
  273. {
  274. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  275. struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
  276. if (driver->remove)
  277. driver->remove(i3cdev);
  278. i3c_device_free_ibi(i3cdev);
  279. }
  280. const struct bus_type i3c_bus_type = {
  281. .name = "i3c",
  282. .match = i3c_device_match,
  283. .probe = i3c_device_probe,
  284. .remove = i3c_device_remove,
  285. };
  286. EXPORT_SYMBOL_GPL(i3c_bus_type);
  287. static enum i3c_addr_slot_status
  288. i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
  289. {
  290. unsigned long status;
  291. int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
  292. if (addr > I2C_MAX_ADDR)
  293. return I3C_ADDR_SLOT_RSVD;
  294. status = bus->addrslots[bitpos / BITS_PER_LONG];
  295. status >>= bitpos % BITS_PER_LONG;
  296. return status & mask;
  297. }
  298. static enum i3c_addr_slot_status
  299. i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
  300. {
  301. return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK);
  302. }
  303. static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
  304. enum i3c_addr_slot_status status, u32 mask)
  305. {
  306. int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
  307. unsigned long *ptr;
  308. if (addr > I2C_MAX_ADDR)
  309. return;
  310. ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
  311. *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
  312. *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
  313. }
  314. static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
  315. enum i3c_addr_slot_status status)
  316. {
  317. i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK);
  318. }
  319. static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
  320. {
  321. enum i3c_addr_slot_status status;
  322. status = i3c_bus_get_addr_slot_status(bus, addr);
  323. return status == I3C_ADDR_SLOT_FREE;
  324. }
  325. /*
  326. * ┌────┬─────────────┬───┬─────────┬───┐
  327. * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐
  328. * └────┴─────────────┴───┴─────────┴───┘ │
  329. * ┌─────────────────────────────────────────┘
  330. * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
  331. * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│
  332. * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘
  333. * Some master controllers (such as HCI) need to prepare the entire above transaction before
  334. * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
  335. * before knowing the target device's UID information.
  336. *
  337. * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
  338. * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
  339. * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is
  340. * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with
  341. * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
  342. * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
  343. * able to switch to its desired address.
  344. *
  345. * If the previous step fails, fallback returning one of the remaining unassigned address,
  346. * regardless of its state in the desired list.
  347. */
  348. static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
  349. {
  350. enum i3c_addr_slot_status status;
  351. u8 addr;
  352. for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
  353. status = i3c_bus_get_addr_slot_status_mask(bus, addr,
  354. I3C_ADDR_SLOT_EXT_STATUS_MASK);
  355. if (status == I3C_ADDR_SLOT_FREE)
  356. return addr;
  357. }
  358. for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
  359. status = i3c_bus_get_addr_slot_status_mask(bus, addr,
  360. I3C_ADDR_SLOT_STATUS_MASK);
  361. if (status == I3C_ADDR_SLOT_FREE)
  362. return addr;
  363. }
  364. return -ENOMEM;
  365. }
  366. static void i3c_bus_init_addrslots(struct i3c_bus *bus)
  367. {
  368. int i;
  369. /* Addresses 0 to 7 are reserved. */
  370. for (i = 0; i < 8; i++)
  371. i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
  372. /*
  373. * Reserve broadcast address and all addresses that might collide
  374. * with the broadcast address when facing a single bit error.
  375. */
  376. i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
  377. I3C_ADDR_SLOT_RSVD);
  378. for (i = 0; i < 7; i++)
  379. i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
  380. I3C_ADDR_SLOT_RSVD);
  381. }
  382. static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
  383. {
  384. mutex_lock(&i3c_core_lock);
  385. idr_remove(&i3c_bus_idr, i3cbus->id);
  386. mutex_unlock(&i3c_core_lock);
  387. }
  388. static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
  389. {
  390. int ret, start, end, id = -1;
  391. init_rwsem(&i3cbus->lock);
  392. INIT_LIST_HEAD(&i3cbus->devs.i2c);
  393. INIT_LIST_HEAD(&i3cbus->devs.i3c);
  394. i3c_bus_init_addrslots(i3cbus);
  395. i3cbus->mode = I3C_BUS_MODE_PURE;
  396. if (np)
  397. id = of_alias_get_id(np, "i3c");
  398. mutex_lock(&i3c_core_lock);
  399. if (id >= 0) {
  400. start = id;
  401. end = start + 1;
  402. } else {
  403. start = __i3c_first_dynamic_bus_num;
  404. end = 0;
  405. }
  406. ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
  407. mutex_unlock(&i3c_core_lock);
  408. if (ret < 0)
  409. return ret;
  410. i3cbus->id = ret;
  411. return 0;
  412. }
  413. void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
  414. void *data)
  415. {
  416. struct i3c_bus *bus;
  417. int id;
  418. mutex_lock(&i3c_core_lock);
  419. idr_for_each_entry(&i3c_bus_idr, bus, id)
  420. fn(bus, data);
  421. mutex_unlock(&i3c_core_lock);
  422. }
  423. EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
  424. int i3c_register_notifier(struct notifier_block *nb)
  425. {
  426. return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
  427. }
  428. EXPORT_SYMBOL_GPL(i3c_register_notifier);
  429. int i3c_unregister_notifier(struct notifier_block *nb)
  430. {
  431. return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
  432. }
  433. EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
  434. static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
  435. {
  436. blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
  437. }
  438. static const char * const i3c_bus_mode_strings[] = {
  439. [I3C_BUS_MODE_PURE] = "pure",
  440. [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
  441. [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
  442. [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
  443. };
  444. static ssize_t mode_show(struct device *dev,
  445. struct device_attribute *da,
  446. char *buf)
  447. {
  448. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  449. ssize_t ret;
  450. i3c_bus_normaluse_lock(i3cbus);
  451. if (i3cbus->mode < 0 ||
  452. i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
  453. !i3c_bus_mode_strings[i3cbus->mode])
  454. ret = sprintf(buf, "unknown\n");
  455. else
  456. ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
  457. i3c_bus_normaluse_unlock(i3cbus);
  458. return ret;
  459. }
  460. static DEVICE_ATTR_RO(mode);
  461. static ssize_t current_master_show(struct device *dev,
  462. struct device_attribute *da,
  463. char *buf)
  464. {
  465. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  466. ssize_t ret;
  467. i3c_bus_normaluse_lock(i3cbus);
  468. ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
  469. i3cbus->cur_master->info.pid);
  470. i3c_bus_normaluse_unlock(i3cbus);
  471. return ret;
  472. }
  473. static DEVICE_ATTR_RO(current_master);
  474. static ssize_t i3c_scl_frequency_show(struct device *dev,
  475. struct device_attribute *da,
  476. char *buf)
  477. {
  478. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  479. ssize_t ret;
  480. i3c_bus_normaluse_lock(i3cbus);
  481. ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
  482. i3c_bus_normaluse_unlock(i3cbus);
  483. return ret;
  484. }
  485. static DEVICE_ATTR_RO(i3c_scl_frequency);
  486. static ssize_t i2c_scl_frequency_show(struct device *dev,
  487. struct device_attribute *da,
  488. char *buf)
  489. {
  490. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  491. ssize_t ret;
  492. i3c_bus_normaluse_lock(i3cbus);
  493. ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
  494. i3c_bus_normaluse_unlock(i3cbus);
  495. return ret;
  496. }
  497. static DEVICE_ATTR_RO(i2c_scl_frequency);
  498. static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
  499. {
  500. int ret;
  501. if (!master || !master->ops)
  502. return -EINVAL;
  503. if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
  504. return -EINVAL;
  505. i3c_bus_normaluse_lock(&master->bus);
  506. if (enable)
  507. ret = master->ops->enable_hotjoin(master);
  508. else
  509. ret = master->ops->disable_hotjoin(master);
  510. master->hotjoin = enable;
  511. i3c_bus_normaluse_unlock(&master->bus);
  512. return ret;
  513. }
  514. static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
  515. const char *buf, size_t count)
  516. {
  517. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  518. int ret;
  519. bool res;
  520. if (!i3cbus->cur_master)
  521. return -EINVAL;
  522. if (kstrtobool(buf, &res))
  523. return -EINVAL;
  524. ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
  525. if (ret)
  526. return ret;
  527. return count;
  528. }
  529. /*
  530. * i3c_master_enable_hotjoin - Enable hotjoin
  531. * @master: I3C master object
  532. *
  533. * Return: a 0 in case of success, an negative error code otherwise.
  534. */
  535. int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
  536. {
  537. return i3c_set_hotjoin(master, true);
  538. }
  539. EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
  540. /*
  541. * i3c_master_disable_hotjoin - Disable hotjoin
  542. * @master: I3C master object
  543. *
  544. * Return: a 0 in case of success, an negative error code otherwise.
  545. */
  546. int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
  547. {
  548. return i3c_set_hotjoin(master, false);
  549. }
  550. EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
  551. static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
  552. {
  553. struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
  554. ssize_t ret;
  555. i3c_bus_normaluse_lock(i3cbus);
  556. ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
  557. i3c_bus_normaluse_unlock(i3cbus);
  558. return ret;
  559. }
  560. static DEVICE_ATTR_RW(hotjoin);
  561. static struct attribute *i3c_masterdev_attrs[] = {
  562. &dev_attr_mode.attr,
  563. &dev_attr_current_master.attr,
  564. &dev_attr_i3c_scl_frequency.attr,
  565. &dev_attr_i2c_scl_frequency.attr,
  566. &dev_attr_bcr.attr,
  567. &dev_attr_dcr.attr,
  568. &dev_attr_pid.attr,
  569. &dev_attr_dynamic_address.attr,
  570. &dev_attr_hdrcap.attr,
  571. &dev_attr_hotjoin.attr,
  572. NULL,
  573. };
  574. ATTRIBUTE_GROUPS(i3c_masterdev);
  575. static void i3c_masterdev_release(struct device *dev)
  576. {
  577. struct i3c_master_controller *master = dev_to_i3cmaster(dev);
  578. struct i3c_bus *bus = dev_to_i3cbus(dev);
  579. if (master->wq)
  580. destroy_workqueue(master->wq);
  581. WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
  582. i3c_bus_cleanup(bus);
  583. of_node_put(dev->of_node);
  584. }
  585. static const struct device_type i3c_masterdev_type = {
  586. .groups = i3c_masterdev_groups,
  587. };
  588. static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
  589. unsigned long max_i2c_scl_rate)
  590. {
  591. struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
  592. i3cbus->mode = mode;
  593. switch (i3cbus->mode) {
  594. case I3C_BUS_MODE_PURE:
  595. if (!i3cbus->scl_rate.i3c)
  596. i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
  597. break;
  598. case I3C_BUS_MODE_MIXED_FAST:
  599. case I3C_BUS_MODE_MIXED_LIMITED:
  600. if (!i3cbus->scl_rate.i3c)
  601. i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
  602. if (!i3cbus->scl_rate.i2c)
  603. i3cbus->scl_rate.i2c = max_i2c_scl_rate;
  604. break;
  605. case I3C_BUS_MODE_MIXED_SLOW:
  606. if (!i3cbus->scl_rate.i2c)
  607. i3cbus->scl_rate.i2c = max_i2c_scl_rate;
  608. if (!i3cbus->scl_rate.i3c ||
  609. i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
  610. i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
  611. break;
  612. default:
  613. return -EINVAL;
  614. }
  615. dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
  616. i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
  617. /*
  618. * I3C/I2C frequency may have been overridden, check that user-provided
  619. * values are not exceeding max possible frequency.
  620. */
  621. if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
  622. i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
  623. return -EINVAL;
  624. return 0;
  625. }
  626. static struct i3c_master_controller *
  627. i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
  628. {
  629. return container_of(adap, struct i3c_master_controller, i2c);
  630. }
  631. static struct i2c_adapter *
  632. i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
  633. {
  634. return &master->i2c;
  635. }
  636. static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
  637. {
  638. kfree(dev);
  639. }
  640. static struct i2c_dev_desc *
  641. i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
  642. u16 addr, u8 lvr)
  643. {
  644. struct i2c_dev_desc *dev;
  645. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  646. if (!dev)
  647. return ERR_PTR(-ENOMEM);
  648. dev->common.master = master;
  649. dev->addr = addr;
  650. dev->lvr = lvr;
  651. return dev;
  652. }
  653. static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
  654. u16 payloadlen)
  655. {
  656. dest->addr = addr;
  657. dest->payload.len = payloadlen;
  658. if (payloadlen)
  659. dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
  660. else
  661. dest->payload.data = NULL;
  662. return dest->payload.data;
  663. }
  664. static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
  665. {
  666. kfree(dest->payload.data);
  667. }
  668. static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
  669. struct i3c_ccc_cmd_dest *dests,
  670. unsigned int ndests)
  671. {
  672. cmd->rnw = rnw ? 1 : 0;
  673. cmd->id = id;
  674. cmd->dests = dests;
  675. cmd->ndests = ndests;
  676. cmd->err = I3C_ERROR_UNKNOWN;
  677. }
  678. static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
  679. struct i3c_ccc_cmd *cmd)
  680. {
  681. int ret;
  682. if (!cmd || !master)
  683. return -EINVAL;
  684. if (WARN_ON(master->init_done &&
  685. !rwsem_is_locked(&master->bus.lock)))
  686. return -EINVAL;
  687. if (!master->ops->send_ccc_cmd)
  688. return -ENOTSUPP;
  689. if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
  690. return -EINVAL;
  691. if (master->ops->supports_ccc_cmd &&
  692. !master->ops->supports_ccc_cmd(master, cmd))
  693. return -ENOTSUPP;
  694. ret = master->ops->send_ccc_cmd(master, cmd);
  695. if (ret) {
  696. if (cmd->err != I3C_ERROR_UNKNOWN)
  697. return cmd->err;
  698. return ret;
  699. }
  700. return 0;
  701. }
  702. static struct i2c_dev_desc *
  703. i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
  704. u16 addr)
  705. {
  706. struct i2c_dev_desc *dev;
  707. i3c_bus_for_each_i2cdev(&master->bus, dev) {
  708. if (dev->addr == addr)
  709. return dev;
  710. }
  711. return NULL;
  712. }
  713. /**
  714. * i3c_master_get_free_addr() - get a free address on the bus
  715. * @master: I3C master object
  716. * @start_addr: where to start searching
  717. *
  718. * This function must be called with the bus lock held in write mode.
  719. *
  720. * Return: the first free address starting at @start_addr (included) or -ENOMEM
  721. * if there's no more address available.
  722. */
  723. int i3c_master_get_free_addr(struct i3c_master_controller *master,
  724. u8 start_addr)
  725. {
  726. return i3c_bus_get_free_addr(&master->bus, start_addr);
  727. }
  728. EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
  729. static void i3c_device_release(struct device *dev)
  730. {
  731. struct i3c_device *i3cdev = dev_to_i3cdev(dev);
  732. WARN_ON(i3cdev->desc);
  733. of_node_put(i3cdev->dev.of_node);
  734. kfree(i3cdev);
  735. }
  736. static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
  737. {
  738. kfree(dev);
  739. }
  740. static struct i3c_dev_desc *
  741. i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
  742. const struct i3c_device_info *info)
  743. {
  744. struct i3c_dev_desc *dev;
  745. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  746. if (!dev)
  747. return ERR_PTR(-ENOMEM);
  748. dev->common.master = master;
  749. dev->info = *info;
  750. mutex_init(&dev->ibi_lock);
  751. return dev;
  752. }
  753. static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
  754. u8 addr)
  755. {
  756. enum i3c_addr_slot_status addrstat;
  757. struct i3c_ccc_cmd_dest dest;
  758. struct i3c_ccc_cmd cmd;
  759. int ret;
  760. if (!master)
  761. return -EINVAL;
  762. addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
  763. if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
  764. return -EINVAL;
  765. i3c_ccc_cmd_dest_init(&dest, addr, 0);
  766. i3c_ccc_cmd_init(&cmd, false,
  767. I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
  768. &dest, 1);
  769. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  770. i3c_ccc_cmd_dest_cleanup(&dest);
  771. return ret;
  772. }
  773. /**
  774. * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
  775. * procedure
  776. * @master: master used to send frames on the bus
  777. *
  778. * Send a ENTDAA CCC command to start a DAA procedure.
  779. *
  780. * Note that this function only sends the ENTDAA CCC command, all the logic
  781. * behind dynamic address assignment has to be handled in the I3C master
  782. * driver.
  783. *
  784. * This function must be called with the bus lock held in write mode.
  785. *
  786. * Return: 0 in case of success, a positive I3C error code if the error is
  787. * one of the official Mx error codes, and a negative error code otherwise.
  788. */
  789. int i3c_master_entdaa_locked(struct i3c_master_controller *master)
  790. {
  791. struct i3c_ccc_cmd_dest dest;
  792. struct i3c_ccc_cmd cmd;
  793. int ret;
  794. i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
  795. i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
  796. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  797. i3c_ccc_cmd_dest_cleanup(&dest);
  798. return ret;
  799. }
  800. EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
  801. static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
  802. u8 addr, bool enable, u8 evts)
  803. {
  804. struct i3c_ccc_events *events;
  805. struct i3c_ccc_cmd_dest dest;
  806. struct i3c_ccc_cmd cmd;
  807. int ret;
  808. events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
  809. if (!events)
  810. return -ENOMEM;
  811. events->events = evts;
  812. i3c_ccc_cmd_init(&cmd, false,
  813. enable ?
  814. I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
  815. I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
  816. &dest, 1);
  817. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  818. i3c_ccc_cmd_dest_cleanup(&dest);
  819. return ret;
  820. }
  821. /**
  822. * i3c_master_disec_locked() - send a DISEC CCC command
  823. * @master: master used to send frames on the bus
  824. * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
  825. * @evts: events to disable
  826. *
  827. * Send a DISEC CCC command to disable some or all events coming from a
  828. * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
  829. *
  830. * This function must be called with the bus lock held in write mode.
  831. *
  832. * Return: 0 in case of success, a positive I3C error code if the error is
  833. * one of the official Mx error codes, and a negative error code otherwise.
  834. */
  835. int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
  836. u8 evts)
  837. {
  838. return i3c_master_enec_disec_locked(master, addr, false, evts);
  839. }
  840. EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
  841. /**
  842. * i3c_master_enec_locked() - send an ENEC CCC command
  843. * @master: master used to send frames on the bus
  844. * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
  845. * @evts: events to disable
  846. *
  847. * Sends an ENEC CCC command to enable some or all events coming from a
  848. * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
  849. *
  850. * This function must be called with the bus lock held in write mode.
  851. *
  852. * Return: 0 in case of success, a positive I3C error code if the error is
  853. * one of the official Mx error codes, and a negative error code otherwise.
  854. */
  855. int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
  856. u8 evts)
  857. {
  858. return i3c_master_enec_disec_locked(master, addr, true, evts);
  859. }
  860. EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
  861. /**
  862. * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
  863. * @master: master used to send frames on the bus
  864. *
  865. * Send a DEFSLVS CCC command containing all the devices known to the @master.
  866. * This is useful when you have secondary masters on the bus to propagate
  867. * device information.
  868. *
  869. * This should be called after all I3C devices have been discovered (in other
  870. * words, after the DAA procedure has finished) and instantiated in
  871. * &i3c_master_controller_ops->bus_init().
  872. * It should also be called if a master ACKed an Hot-Join request and assigned
  873. * a dynamic address to the device joining the bus.
  874. *
  875. * This function must be called with the bus lock held in write mode.
  876. *
  877. * Return: 0 in case of success, a positive I3C error code if the error is
  878. * one of the official Mx error codes, and a negative error code otherwise.
  879. */
  880. int i3c_master_defslvs_locked(struct i3c_master_controller *master)
  881. {
  882. struct i3c_ccc_defslvs *defslvs;
  883. struct i3c_ccc_dev_desc *desc;
  884. struct i3c_ccc_cmd_dest dest;
  885. struct i3c_dev_desc *i3cdev;
  886. struct i2c_dev_desc *i2cdev;
  887. struct i3c_ccc_cmd cmd;
  888. struct i3c_bus *bus;
  889. bool send = false;
  890. int ndevs = 0, ret;
  891. if (!master)
  892. return -EINVAL;
  893. bus = i3c_master_get_bus(master);
  894. i3c_bus_for_each_i3cdev(bus, i3cdev) {
  895. ndevs++;
  896. if (i3cdev == master->this)
  897. continue;
  898. if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
  899. I3C_BCR_I3C_MASTER)
  900. send = true;
  901. }
  902. /* No other master on the bus, skip DEFSLVS. */
  903. if (!send)
  904. return 0;
  905. i3c_bus_for_each_i2cdev(bus, i2cdev)
  906. ndevs++;
  907. defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
  908. struct_size(defslvs, slaves,
  909. ndevs - 1));
  910. if (!defslvs)
  911. return -ENOMEM;
  912. defslvs->count = ndevs;
  913. defslvs->master.bcr = master->this->info.bcr;
  914. defslvs->master.dcr = master->this->info.dcr;
  915. defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
  916. defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
  917. desc = defslvs->slaves;
  918. i3c_bus_for_each_i2cdev(bus, i2cdev) {
  919. desc->lvr = i2cdev->lvr;
  920. desc->static_addr = i2cdev->addr << 1;
  921. desc++;
  922. }
  923. i3c_bus_for_each_i3cdev(bus, i3cdev) {
  924. /* Skip the I3C dev representing this master. */
  925. if (i3cdev == master->this)
  926. continue;
  927. desc->bcr = i3cdev->info.bcr;
  928. desc->dcr = i3cdev->info.dcr;
  929. desc->dyn_addr = i3cdev->info.dyn_addr << 1;
  930. desc->static_addr = i3cdev->info.static_addr << 1;
  931. desc++;
  932. }
  933. i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
  934. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  935. i3c_ccc_cmd_dest_cleanup(&dest);
  936. return ret;
  937. }
  938. EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
  939. static int i3c_master_setda_locked(struct i3c_master_controller *master,
  940. u8 oldaddr, u8 newaddr, bool setdasa)
  941. {
  942. struct i3c_ccc_cmd_dest dest;
  943. struct i3c_ccc_setda *setda;
  944. struct i3c_ccc_cmd cmd;
  945. int ret;
  946. if (!oldaddr || !newaddr)
  947. return -EINVAL;
  948. setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
  949. if (!setda)
  950. return -ENOMEM;
  951. setda->addr = newaddr << 1;
  952. i3c_ccc_cmd_init(&cmd, false,
  953. setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
  954. &dest, 1);
  955. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  956. i3c_ccc_cmd_dest_cleanup(&dest);
  957. return ret;
  958. }
  959. static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
  960. u8 static_addr, u8 dyn_addr)
  961. {
  962. return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
  963. }
  964. static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
  965. u8 oldaddr, u8 newaddr)
  966. {
  967. return i3c_master_setda_locked(master, oldaddr, newaddr, false);
  968. }
  969. static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
  970. struct i3c_device_info *info)
  971. {
  972. struct i3c_ccc_cmd_dest dest;
  973. struct i3c_ccc_mrl *mrl;
  974. struct i3c_ccc_cmd cmd;
  975. int ret;
  976. mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
  977. if (!mrl)
  978. return -ENOMEM;
  979. /*
  980. * When the device does not have IBI payload GETMRL only returns 2
  981. * bytes of data.
  982. */
  983. if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
  984. dest.payload.len -= 1;
  985. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
  986. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  987. if (ret)
  988. goto out;
  989. switch (dest.payload.len) {
  990. case 3:
  991. info->max_ibi_len = mrl->ibi_len;
  992. fallthrough;
  993. case 2:
  994. info->max_read_len = be16_to_cpu(mrl->read_len);
  995. break;
  996. default:
  997. ret = -EIO;
  998. goto out;
  999. }
  1000. out:
  1001. i3c_ccc_cmd_dest_cleanup(&dest);
  1002. return ret;
  1003. }
  1004. static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
  1005. struct i3c_device_info *info)
  1006. {
  1007. struct i3c_ccc_cmd_dest dest;
  1008. struct i3c_ccc_mwl *mwl;
  1009. struct i3c_ccc_cmd cmd;
  1010. int ret;
  1011. mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
  1012. if (!mwl)
  1013. return -ENOMEM;
  1014. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
  1015. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1016. if (ret)
  1017. goto out;
  1018. if (dest.payload.len != sizeof(*mwl)) {
  1019. ret = -EIO;
  1020. goto out;
  1021. }
  1022. info->max_write_len = be16_to_cpu(mwl->len);
  1023. out:
  1024. i3c_ccc_cmd_dest_cleanup(&dest);
  1025. return ret;
  1026. }
  1027. static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
  1028. struct i3c_device_info *info)
  1029. {
  1030. struct i3c_ccc_getmxds *getmaxds;
  1031. struct i3c_ccc_cmd_dest dest;
  1032. struct i3c_ccc_cmd cmd;
  1033. int ret;
  1034. getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
  1035. sizeof(*getmaxds));
  1036. if (!getmaxds)
  1037. return -ENOMEM;
  1038. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
  1039. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1040. if (ret) {
  1041. /*
  1042. * Retry when the device does not support max read turnaround
  1043. * while expecting shorter length from this CCC command.
  1044. */
  1045. dest.payload.len -= 3;
  1046. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1047. if (ret)
  1048. goto out;
  1049. }
  1050. if (dest.payload.len != 2 && dest.payload.len != 5) {
  1051. ret = -EIO;
  1052. goto out;
  1053. }
  1054. info->max_read_ds = getmaxds->maxrd;
  1055. info->max_write_ds = getmaxds->maxwr;
  1056. if (dest.payload.len == 5)
  1057. info->max_read_turnaround = getmaxds->maxrdturn[0] |
  1058. ((u32)getmaxds->maxrdturn[1] << 8) |
  1059. ((u32)getmaxds->maxrdturn[2] << 16);
  1060. out:
  1061. i3c_ccc_cmd_dest_cleanup(&dest);
  1062. return ret;
  1063. }
  1064. static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
  1065. struct i3c_device_info *info)
  1066. {
  1067. struct i3c_ccc_gethdrcap *gethdrcap;
  1068. struct i3c_ccc_cmd_dest dest;
  1069. struct i3c_ccc_cmd cmd;
  1070. int ret;
  1071. gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
  1072. sizeof(*gethdrcap));
  1073. if (!gethdrcap)
  1074. return -ENOMEM;
  1075. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
  1076. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1077. if (ret)
  1078. goto out;
  1079. if (dest.payload.len != 1) {
  1080. ret = -EIO;
  1081. goto out;
  1082. }
  1083. info->hdr_cap = gethdrcap->modes;
  1084. out:
  1085. i3c_ccc_cmd_dest_cleanup(&dest);
  1086. return ret;
  1087. }
  1088. static int i3c_master_getpid_locked(struct i3c_master_controller *master,
  1089. struct i3c_device_info *info)
  1090. {
  1091. struct i3c_ccc_getpid *getpid;
  1092. struct i3c_ccc_cmd_dest dest;
  1093. struct i3c_ccc_cmd cmd;
  1094. int ret, i;
  1095. getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
  1096. if (!getpid)
  1097. return -ENOMEM;
  1098. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
  1099. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1100. if (ret)
  1101. goto out;
  1102. info->pid = 0;
  1103. for (i = 0; i < sizeof(getpid->pid); i++) {
  1104. int sft = (sizeof(getpid->pid) - i - 1) * 8;
  1105. info->pid |= (u64)getpid->pid[i] << sft;
  1106. }
  1107. out:
  1108. i3c_ccc_cmd_dest_cleanup(&dest);
  1109. return ret;
  1110. }
  1111. static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
  1112. struct i3c_device_info *info)
  1113. {
  1114. struct i3c_ccc_getbcr *getbcr;
  1115. struct i3c_ccc_cmd_dest dest;
  1116. struct i3c_ccc_cmd cmd;
  1117. int ret;
  1118. getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
  1119. if (!getbcr)
  1120. return -ENOMEM;
  1121. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
  1122. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1123. if (ret)
  1124. goto out;
  1125. info->bcr = getbcr->bcr;
  1126. out:
  1127. i3c_ccc_cmd_dest_cleanup(&dest);
  1128. return ret;
  1129. }
  1130. static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
  1131. struct i3c_device_info *info)
  1132. {
  1133. struct i3c_ccc_getdcr *getdcr;
  1134. struct i3c_ccc_cmd_dest dest;
  1135. struct i3c_ccc_cmd cmd;
  1136. int ret;
  1137. getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
  1138. if (!getdcr)
  1139. return -ENOMEM;
  1140. i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
  1141. ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
  1142. if (ret)
  1143. goto out;
  1144. info->dcr = getdcr->dcr;
  1145. out:
  1146. i3c_ccc_cmd_dest_cleanup(&dest);
  1147. return ret;
  1148. }
  1149. static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
  1150. {
  1151. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1152. enum i3c_addr_slot_status slot_status;
  1153. int ret;
  1154. if (!dev->info.dyn_addr)
  1155. return -EINVAL;
  1156. slot_status = i3c_bus_get_addr_slot_status(&master->bus,
  1157. dev->info.dyn_addr);
  1158. if (slot_status == I3C_ADDR_SLOT_RSVD ||
  1159. slot_status == I3C_ADDR_SLOT_I2C_DEV)
  1160. return -EINVAL;
  1161. ret = i3c_master_getpid_locked(master, &dev->info);
  1162. if (ret)
  1163. return ret;
  1164. ret = i3c_master_getbcr_locked(master, &dev->info);
  1165. if (ret)
  1166. return ret;
  1167. ret = i3c_master_getdcr_locked(master, &dev->info);
  1168. if (ret)
  1169. return ret;
  1170. if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
  1171. ret = i3c_master_getmxds_locked(master, &dev->info);
  1172. if (ret)
  1173. return ret;
  1174. }
  1175. if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
  1176. dev->info.max_ibi_len = 1;
  1177. i3c_master_getmrl_locked(master, &dev->info);
  1178. i3c_master_getmwl_locked(master, &dev->info);
  1179. if (dev->info.bcr & I3C_BCR_HDR_CAP) {
  1180. ret = i3c_master_gethdrcap_locked(master, &dev->info);
  1181. if (ret)
  1182. return ret;
  1183. }
  1184. return 0;
  1185. }
  1186. static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
  1187. {
  1188. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1189. if (dev->info.static_addr)
  1190. i3c_bus_set_addr_slot_status(&master->bus,
  1191. dev->info.static_addr,
  1192. I3C_ADDR_SLOT_FREE);
  1193. if (dev->info.dyn_addr)
  1194. i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
  1195. I3C_ADDR_SLOT_FREE);
  1196. if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
  1197. i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr,
  1198. I3C_ADDR_SLOT_FREE);
  1199. }
  1200. static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
  1201. {
  1202. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1203. enum i3c_addr_slot_status status;
  1204. if (!dev->info.static_addr && !dev->info.dyn_addr)
  1205. return 0;
  1206. if (dev->info.static_addr) {
  1207. status = i3c_bus_get_addr_slot_status(&master->bus,
  1208. dev->info.static_addr);
  1209. /* Since static address and assigned dynamic address can be
  1210. * equal, allow this case to pass.
  1211. */
  1212. if (status != I3C_ADDR_SLOT_FREE &&
  1213. dev->info.static_addr != dev->boardinfo->init_dyn_addr)
  1214. return -EBUSY;
  1215. i3c_bus_set_addr_slot_status(&master->bus,
  1216. dev->info.static_addr,
  1217. I3C_ADDR_SLOT_I3C_DEV);
  1218. }
  1219. /*
  1220. * ->init_dyn_addr should have been reserved before that, so, if we're
  1221. * trying to apply a pre-reserved dynamic address, we should not try
  1222. * to reserve the address slot a second time.
  1223. */
  1224. if (dev->info.dyn_addr &&
  1225. (!dev->boardinfo ||
  1226. dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
  1227. status = i3c_bus_get_addr_slot_status(&master->bus,
  1228. dev->info.dyn_addr);
  1229. if (status != I3C_ADDR_SLOT_FREE)
  1230. goto err_release_static_addr;
  1231. i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
  1232. I3C_ADDR_SLOT_I3C_DEV);
  1233. }
  1234. return 0;
  1235. err_release_static_addr:
  1236. if (dev->info.static_addr)
  1237. i3c_bus_set_addr_slot_status(&master->bus,
  1238. dev->info.static_addr,
  1239. I3C_ADDR_SLOT_FREE);
  1240. return -EBUSY;
  1241. }
  1242. static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
  1243. struct i3c_dev_desc *dev)
  1244. {
  1245. int ret;
  1246. /*
  1247. * We don't attach devices to the controller until they are
  1248. * addressable on the bus.
  1249. */
  1250. if (!dev->info.static_addr && !dev->info.dyn_addr)
  1251. return 0;
  1252. ret = i3c_master_get_i3c_addrs(dev);
  1253. if (ret)
  1254. return ret;
  1255. /* Do not attach the master device itself. */
  1256. if (master->this != dev && master->ops->attach_i3c_dev) {
  1257. ret = master->ops->attach_i3c_dev(dev);
  1258. if (ret) {
  1259. i3c_master_put_i3c_addrs(dev);
  1260. return ret;
  1261. }
  1262. }
  1263. list_add_tail(&dev->common.node, &master->bus.devs.i3c);
  1264. return 0;
  1265. }
  1266. static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
  1267. u8 old_dyn_addr)
  1268. {
  1269. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1270. int ret;
  1271. if (dev->info.dyn_addr != old_dyn_addr) {
  1272. i3c_bus_set_addr_slot_status(&master->bus,
  1273. dev->info.dyn_addr,
  1274. I3C_ADDR_SLOT_I3C_DEV);
  1275. if (old_dyn_addr)
  1276. i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
  1277. I3C_ADDR_SLOT_FREE);
  1278. }
  1279. if (master->ops->reattach_i3c_dev) {
  1280. ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
  1281. if (ret) {
  1282. i3c_master_put_i3c_addrs(dev);
  1283. return ret;
  1284. }
  1285. }
  1286. return 0;
  1287. }
  1288. static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
  1289. {
  1290. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  1291. /* Do not detach the master device itself. */
  1292. if (master->this != dev && master->ops->detach_i3c_dev)
  1293. master->ops->detach_i3c_dev(dev);
  1294. i3c_master_put_i3c_addrs(dev);
  1295. list_del(&dev->common.node);
  1296. }
  1297. static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
  1298. struct i2c_dev_desc *dev)
  1299. {
  1300. int ret;
  1301. if (master->ops->attach_i2c_dev) {
  1302. ret = master->ops->attach_i2c_dev(dev);
  1303. if (ret)
  1304. return ret;
  1305. }
  1306. list_add_tail(&dev->common.node, &master->bus.devs.i2c);
  1307. return 0;
  1308. }
  1309. static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
  1310. {
  1311. struct i3c_master_controller *master = i2c_dev_get_master(dev);
  1312. list_del(&dev->common.node);
  1313. if (master->ops->detach_i2c_dev)
  1314. master->ops->detach_i2c_dev(dev);
  1315. }
  1316. static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
  1317. struct i3c_dev_boardinfo *boardinfo)
  1318. {
  1319. struct i3c_device_info info = {
  1320. .static_addr = boardinfo->static_addr,
  1321. .pid = boardinfo->pid,
  1322. };
  1323. struct i3c_dev_desc *i3cdev;
  1324. int ret;
  1325. i3cdev = i3c_master_alloc_i3c_dev(master, &info);
  1326. if (IS_ERR(i3cdev))
  1327. return -ENOMEM;
  1328. i3cdev->boardinfo = boardinfo;
  1329. ret = i3c_master_attach_i3c_dev(master, i3cdev);
  1330. if (ret)
  1331. goto err_free_dev;
  1332. ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
  1333. i3cdev->boardinfo->init_dyn_addr);
  1334. if (ret)
  1335. goto err_detach_dev;
  1336. i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
  1337. ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
  1338. if (ret)
  1339. goto err_rstdaa;
  1340. ret = i3c_master_retrieve_dev_info(i3cdev);
  1341. if (ret)
  1342. goto err_rstdaa;
  1343. return 0;
  1344. err_rstdaa:
  1345. i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
  1346. err_detach_dev:
  1347. i3c_master_detach_i3c_dev(i3cdev);
  1348. err_free_dev:
  1349. i3c_master_free_i3c_dev(i3cdev);
  1350. return ret;
  1351. }
  1352. static void
  1353. i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
  1354. {
  1355. struct i3c_dev_desc *desc;
  1356. int ret;
  1357. if (!master->init_done)
  1358. return;
  1359. i3c_bus_for_each_i3cdev(&master->bus, desc) {
  1360. if (desc->dev || !desc->info.dyn_addr || desc == master->this)
  1361. continue;
  1362. desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
  1363. if (!desc->dev)
  1364. continue;
  1365. desc->dev->bus = &master->bus;
  1366. desc->dev->desc = desc;
  1367. desc->dev->dev.parent = &master->dev;
  1368. desc->dev->dev.type = &i3c_device_type;
  1369. desc->dev->dev.bus = &i3c_bus_type;
  1370. desc->dev->dev.release = i3c_device_release;
  1371. dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
  1372. desc->info.pid);
  1373. if (desc->boardinfo)
  1374. desc->dev->dev.of_node = desc->boardinfo->of_node;
  1375. ret = device_register(&desc->dev->dev);
  1376. if (ret) {
  1377. dev_err(&master->dev,
  1378. "Failed to add I3C device (err = %d)\n", ret);
  1379. put_device(&desc->dev->dev);
  1380. }
  1381. }
  1382. }
  1383. /**
  1384. * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
  1385. * @master: master doing the DAA
  1386. *
  1387. * This function is instantiating an I3C device object and adding it to the
  1388. * I3C device list. All device information are automatically retrieved using
  1389. * standard CCC commands.
  1390. *
  1391. * The I3C device object is returned in case the master wants to attach
  1392. * private data to it using i3c_dev_set_master_data().
  1393. *
  1394. * This function must be called with the bus lock held in write mode.
  1395. *
  1396. * Return: a 0 in case of success, an negative error code otherwise.
  1397. */
  1398. int i3c_master_do_daa(struct i3c_master_controller *master)
  1399. {
  1400. int ret;
  1401. i3c_bus_maintenance_lock(&master->bus);
  1402. ret = master->ops->do_daa(master);
  1403. i3c_bus_maintenance_unlock(&master->bus);
  1404. if (ret)
  1405. return ret;
  1406. i3c_bus_normaluse_lock(&master->bus);
  1407. i3c_master_register_new_i3c_devs(master);
  1408. i3c_bus_normaluse_unlock(&master->bus);
  1409. return 0;
  1410. }
  1411. EXPORT_SYMBOL_GPL(i3c_master_do_daa);
  1412. /**
  1413. * i3c_master_set_info() - set master device information
  1414. * @master: master used to send frames on the bus
  1415. * @info: I3C device information
  1416. *
  1417. * Set master device info. This should be called from
  1418. * &i3c_master_controller_ops->bus_init().
  1419. *
  1420. * Not all &i3c_device_info fields are meaningful for a master device.
  1421. * Here is a list of fields that should be properly filled:
  1422. *
  1423. * - &i3c_device_info->dyn_addr
  1424. * - &i3c_device_info->bcr
  1425. * - &i3c_device_info->dcr
  1426. * - &i3c_device_info->pid
  1427. * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
  1428. * &i3c_device_info->bcr
  1429. *
  1430. * This function must be called with the bus lock held in maintenance mode.
  1431. *
  1432. * Return: 0 if @info contains valid information (not every piece of
  1433. * information can be checked, but we can at least make sure @info->dyn_addr
  1434. * and @info->bcr are correct), -EINVAL otherwise.
  1435. */
  1436. int i3c_master_set_info(struct i3c_master_controller *master,
  1437. const struct i3c_device_info *info)
  1438. {
  1439. struct i3c_dev_desc *i3cdev;
  1440. int ret;
  1441. if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
  1442. return -EINVAL;
  1443. if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
  1444. master->secondary)
  1445. return -EINVAL;
  1446. if (master->this)
  1447. return -EINVAL;
  1448. i3cdev = i3c_master_alloc_i3c_dev(master, info);
  1449. if (IS_ERR(i3cdev))
  1450. return PTR_ERR(i3cdev);
  1451. master->this = i3cdev;
  1452. master->bus.cur_master = master->this;
  1453. ret = i3c_master_attach_i3c_dev(master, i3cdev);
  1454. if (ret)
  1455. goto err_free_dev;
  1456. return 0;
  1457. err_free_dev:
  1458. i3c_master_free_i3c_dev(i3cdev);
  1459. return ret;
  1460. }
  1461. EXPORT_SYMBOL_GPL(i3c_master_set_info);
  1462. static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
  1463. {
  1464. struct i3c_dev_desc *i3cdev, *i3ctmp;
  1465. struct i2c_dev_desc *i2cdev, *i2ctmp;
  1466. list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
  1467. common.node) {
  1468. i3c_master_detach_i3c_dev(i3cdev);
  1469. if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
  1470. i3c_bus_set_addr_slot_status(&master->bus,
  1471. i3cdev->boardinfo->init_dyn_addr,
  1472. I3C_ADDR_SLOT_FREE);
  1473. i3c_master_free_i3c_dev(i3cdev);
  1474. }
  1475. list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
  1476. common.node) {
  1477. i3c_master_detach_i2c_dev(i2cdev);
  1478. i3c_bus_set_addr_slot_status(&master->bus,
  1479. i2cdev->addr,
  1480. I3C_ADDR_SLOT_FREE);
  1481. i3c_master_free_i2c_dev(i2cdev);
  1482. }
  1483. }
  1484. /**
  1485. * i3c_master_bus_init() - initialize an I3C bus
  1486. * @master: main master initializing the bus
  1487. *
  1488. * This function is following all initialisation steps described in the I3C
  1489. * specification:
  1490. *
  1491. * 1. Attach I2C devs to the master so that the master can fill its internal
  1492. * device table appropriately
  1493. *
  1494. * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
  1495. * the master controller. That's usually where the bus mode is selected
  1496. * (pure bus or mixed fast/slow bus)
  1497. *
  1498. * 3. Instruct all devices on the bus to drop their dynamic address. This is
  1499. * particularly important when the bus was previously configured by someone
  1500. * else (for example the bootloader)
  1501. *
  1502. * 4. Disable all slave events.
  1503. *
  1504. * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
  1505. * also have static_addr, try to pre-assign dynamic addresses requested by
  1506. * the FW with SETDASA and attach corresponding statically defined I3C
  1507. * devices to the master.
  1508. *
  1509. * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
  1510. * remaining I3C devices
  1511. *
  1512. * Once this is done, all I3C and I2C devices should be usable.
  1513. *
  1514. * Return: a 0 in case of success, an negative error code otherwise.
  1515. */
  1516. static int i3c_master_bus_init(struct i3c_master_controller *master)
  1517. {
  1518. enum i3c_addr_slot_status status;
  1519. struct i2c_dev_boardinfo *i2cboardinfo;
  1520. struct i3c_dev_boardinfo *i3cboardinfo;
  1521. struct i2c_dev_desc *i2cdev;
  1522. int ret;
  1523. /*
  1524. * First attach all devices with static definitions provided by the
  1525. * FW.
  1526. */
  1527. list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
  1528. status = i3c_bus_get_addr_slot_status(&master->bus,
  1529. i2cboardinfo->base.addr);
  1530. if (status != I3C_ADDR_SLOT_FREE) {
  1531. ret = -EBUSY;
  1532. goto err_detach_devs;
  1533. }
  1534. i3c_bus_set_addr_slot_status(&master->bus,
  1535. i2cboardinfo->base.addr,
  1536. I3C_ADDR_SLOT_I2C_DEV);
  1537. i2cdev = i3c_master_alloc_i2c_dev(master,
  1538. i2cboardinfo->base.addr,
  1539. i2cboardinfo->lvr);
  1540. if (IS_ERR(i2cdev)) {
  1541. ret = PTR_ERR(i2cdev);
  1542. goto err_detach_devs;
  1543. }
  1544. ret = i3c_master_attach_i2c_dev(master, i2cdev);
  1545. if (ret) {
  1546. i3c_master_free_i2c_dev(i2cdev);
  1547. goto err_detach_devs;
  1548. }
  1549. }
  1550. /*
  1551. * Now execute the controller specific ->bus_init() routine, which
  1552. * might configure its internal logic to match the bus limitations.
  1553. */
  1554. ret = master->ops->bus_init(master);
  1555. if (ret)
  1556. goto err_detach_devs;
  1557. /*
  1558. * The master device should have been instantiated in ->bus_init(),
  1559. * complain if this was not the case.
  1560. */
  1561. if (!master->this) {
  1562. dev_err(&master->dev,
  1563. "master_set_info() was not called in ->bus_init()\n");
  1564. ret = -EINVAL;
  1565. goto err_bus_cleanup;
  1566. }
  1567. if (master->ops->set_speed) {
  1568. ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
  1569. if (ret)
  1570. goto err_bus_cleanup;
  1571. }
  1572. /*
  1573. * Reset all dynamic address that may have been assigned before
  1574. * (assigned by the bootloader for example).
  1575. */
  1576. ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
  1577. if (ret && ret != I3C_ERROR_M2)
  1578. goto err_bus_cleanup;
  1579. if (master->ops->set_speed) {
  1580. ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
  1581. if (ret)
  1582. goto err_bus_cleanup;
  1583. }
  1584. /* Disable all slave events before starting DAA. */
  1585. ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
  1586. I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
  1587. I3C_CCC_EVENT_HJ);
  1588. if (ret && ret != I3C_ERROR_M2)
  1589. goto err_bus_cleanup;
  1590. /*
  1591. * Reserve init_dyn_addr first, and then try to pre-assign dynamic
  1592. * address and retrieve device information if needed.
  1593. * In case pre-assign dynamic address fails, setting dynamic address to
  1594. * the requested init_dyn_addr is retried after DAA is done in
  1595. * i3c_master_add_i3c_dev_locked().
  1596. */
  1597. list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
  1598. /*
  1599. * We don't reserve a dynamic address for devices that
  1600. * don't explicitly request one.
  1601. */
  1602. if (!i3cboardinfo->init_dyn_addr)
  1603. continue;
  1604. ret = i3c_bus_get_addr_slot_status(&master->bus,
  1605. i3cboardinfo->init_dyn_addr);
  1606. if (ret != I3C_ADDR_SLOT_FREE) {
  1607. ret = -EBUSY;
  1608. goto err_rstdaa;
  1609. }
  1610. /* Do not mark as occupied until real device exist in bus */
  1611. i3c_bus_set_addr_slot_status_mask(&master->bus,
  1612. i3cboardinfo->init_dyn_addr,
  1613. I3C_ADDR_SLOT_EXT_DESIRED,
  1614. I3C_ADDR_SLOT_EXT_STATUS_MASK);
  1615. /*
  1616. * Only try to create/attach devices that have a static
  1617. * address. Other devices will be created/attached when
  1618. * DAA happens, and the requested dynamic address will
  1619. * be set using SETNEWDA once those devices become
  1620. * addressable.
  1621. */
  1622. if (i3cboardinfo->static_addr)
  1623. i3c_master_early_i3c_dev_add(master, i3cboardinfo);
  1624. }
  1625. ret = i3c_master_do_daa(master);
  1626. if (ret)
  1627. goto err_rstdaa;
  1628. return 0;
  1629. err_rstdaa:
  1630. i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
  1631. err_bus_cleanup:
  1632. if (master->ops->bus_cleanup)
  1633. master->ops->bus_cleanup(master);
  1634. err_detach_devs:
  1635. i3c_master_detach_free_devs(master);
  1636. return ret;
  1637. }
  1638. static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
  1639. {
  1640. if (master->ops->bus_cleanup)
  1641. master->ops->bus_cleanup(master);
  1642. i3c_master_detach_free_devs(master);
  1643. }
  1644. static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
  1645. {
  1646. struct i3c_master_controller *master = i3cdev->common.master;
  1647. struct i3c_dev_boardinfo *i3cboardinfo;
  1648. list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
  1649. if (i3cdev->info.pid != i3cboardinfo->pid)
  1650. continue;
  1651. i3cdev->boardinfo = i3cboardinfo;
  1652. i3cdev->info.static_addr = i3cboardinfo->static_addr;
  1653. return;
  1654. }
  1655. }
  1656. static struct i3c_dev_desc *
  1657. i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
  1658. {
  1659. struct i3c_master_controller *master = i3c_dev_get_master(refdev);
  1660. struct i3c_dev_desc *i3cdev;
  1661. i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
  1662. if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
  1663. return i3cdev;
  1664. }
  1665. return NULL;
  1666. }
  1667. /**
  1668. * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
  1669. * @master: master used to send frames on the bus
  1670. * @addr: I3C slave dynamic address assigned to the device
  1671. *
  1672. * This function is instantiating an I3C device object and adding it to the
  1673. * I3C device list. All device information are automatically retrieved using
  1674. * standard CCC commands.
  1675. *
  1676. * The I3C device object is returned in case the master wants to attach
  1677. * private data to it using i3c_dev_set_master_data().
  1678. *
  1679. * This function must be called with the bus lock held in write mode.
  1680. *
  1681. * Return: a 0 in case of success, an negative error code otherwise.
  1682. */
  1683. int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
  1684. u8 addr)
  1685. {
  1686. struct i3c_device_info info = { .dyn_addr = addr };
  1687. struct i3c_dev_desc *newdev, *olddev;
  1688. u8 old_dyn_addr = addr, expected_dyn_addr;
  1689. struct i3c_ibi_setup ibireq = { };
  1690. bool enable_ibi = false;
  1691. int ret;
  1692. if (!master)
  1693. return -EINVAL;
  1694. newdev = i3c_master_alloc_i3c_dev(master, &info);
  1695. if (IS_ERR(newdev))
  1696. return PTR_ERR(newdev);
  1697. ret = i3c_master_attach_i3c_dev(master, newdev);
  1698. if (ret)
  1699. goto err_free_dev;
  1700. ret = i3c_master_retrieve_dev_info(newdev);
  1701. if (ret)
  1702. goto err_detach_dev;
  1703. i3c_master_attach_boardinfo(newdev);
  1704. olddev = i3c_master_search_i3c_dev_duplicate(newdev);
  1705. if (olddev) {
  1706. newdev->dev = olddev->dev;
  1707. if (newdev->dev)
  1708. newdev->dev->desc = newdev;
  1709. /*
  1710. * We need to restore the IBI state too, so let's save the
  1711. * IBI information and try to restore them after olddev has
  1712. * been detached+released and its IBI has been stopped and
  1713. * the associated resources have been freed.
  1714. */
  1715. mutex_lock(&olddev->ibi_lock);
  1716. if (olddev->ibi) {
  1717. ibireq.handler = olddev->ibi->handler;
  1718. ibireq.max_payload_len = olddev->ibi->max_payload_len;
  1719. ibireq.num_slots = olddev->ibi->num_slots;
  1720. if (olddev->ibi->enabled)
  1721. enable_ibi = true;
  1722. /*
  1723. * The olddev should not receive any commands on the
  1724. * i3c bus as it does not exist and has been assigned
  1725. * a new address. This will result in NACK or timeout.
  1726. * So, update the olddev->ibi->enabled flag to false
  1727. * to avoid DISEC with OldAddr.
  1728. */
  1729. olddev->ibi->enabled = false;
  1730. i3c_dev_free_ibi_locked(olddev);
  1731. }
  1732. mutex_unlock(&olddev->ibi_lock);
  1733. old_dyn_addr = olddev->info.dyn_addr;
  1734. i3c_master_detach_i3c_dev(olddev);
  1735. i3c_master_free_i3c_dev(olddev);
  1736. }
  1737. /*
  1738. * Depending on our previous state, the expected dynamic address might
  1739. * differ:
  1740. * - if the device already had a dynamic address assigned, let's try to
  1741. * re-apply this one
  1742. * - if the device did not have a dynamic address and the firmware
  1743. * requested a specific address, pick this one
  1744. * - in any other case, keep the address automatically assigned by the
  1745. * master
  1746. */
  1747. if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
  1748. expected_dyn_addr = old_dyn_addr;
  1749. else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
  1750. expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
  1751. else
  1752. expected_dyn_addr = newdev->info.dyn_addr;
  1753. if (newdev->info.dyn_addr != expected_dyn_addr &&
  1754. i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
  1755. /*
  1756. * Try to apply the expected dynamic address. If it fails, keep
  1757. * the address assigned by the master.
  1758. */
  1759. ret = i3c_master_setnewda_locked(master,
  1760. newdev->info.dyn_addr,
  1761. expected_dyn_addr);
  1762. if (!ret) {
  1763. old_dyn_addr = newdev->info.dyn_addr;
  1764. newdev->info.dyn_addr = expected_dyn_addr;
  1765. i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
  1766. } else {
  1767. dev_err(&master->dev,
  1768. "Failed to assign reserved/old address to device %d%llx",
  1769. master->bus.id, newdev->info.pid);
  1770. }
  1771. }
  1772. /*
  1773. * Now is time to try to restore the IBI setup. If we're lucky,
  1774. * everything works as before, otherwise, all we can do is complain.
  1775. * FIXME: maybe we should add callback to inform the driver that it
  1776. * should request the IBI again instead of trying to hide that from
  1777. * him.
  1778. */
  1779. if (ibireq.handler) {
  1780. mutex_lock(&newdev->ibi_lock);
  1781. ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
  1782. if (ret) {
  1783. dev_err(&master->dev,
  1784. "Failed to request IBI on device %d-%llx",
  1785. master->bus.id, newdev->info.pid);
  1786. } else if (enable_ibi) {
  1787. ret = i3c_dev_enable_ibi_locked(newdev);
  1788. if (ret)
  1789. dev_err(&master->dev,
  1790. "Failed to re-enable IBI on device %d-%llx",
  1791. master->bus.id, newdev->info.pid);
  1792. }
  1793. mutex_unlock(&newdev->ibi_lock);
  1794. }
  1795. return 0;
  1796. err_detach_dev:
  1797. if (newdev->dev && newdev->dev->desc)
  1798. newdev->dev->desc = NULL;
  1799. i3c_master_detach_i3c_dev(newdev);
  1800. err_free_dev:
  1801. i3c_master_free_i3c_dev(newdev);
  1802. return ret;
  1803. }
  1804. EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
  1805. #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
  1806. static int
  1807. of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
  1808. struct device_node *node, u32 *reg)
  1809. {
  1810. struct i2c_dev_boardinfo *boardinfo;
  1811. struct device *dev = &master->dev;
  1812. int ret;
  1813. boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
  1814. if (!boardinfo)
  1815. return -ENOMEM;
  1816. ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
  1817. if (ret)
  1818. return ret;
  1819. /*
  1820. * The I3C Specification does not clearly say I2C devices with 10-bit
  1821. * address are supported. These devices can't be passed properly through
  1822. * DEFSLVS command.
  1823. */
  1824. if (boardinfo->base.flags & I2C_CLIENT_TEN) {
  1825. dev_err(dev, "I2C device with 10 bit address not supported.");
  1826. return -ENOTSUPP;
  1827. }
  1828. /* LVR is encoded in reg[2]. */
  1829. boardinfo->lvr = reg[2];
  1830. list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
  1831. of_node_get(node);
  1832. return 0;
  1833. }
  1834. static int
  1835. of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
  1836. struct device_node *node, u32 *reg)
  1837. {
  1838. struct i3c_dev_boardinfo *boardinfo;
  1839. struct device *dev = &master->dev;
  1840. enum i3c_addr_slot_status addrstatus;
  1841. u32 init_dyn_addr = 0;
  1842. boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
  1843. if (!boardinfo)
  1844. return -ENOMEM;
  1845. if (reg[0]) {
  1846. if (reg[0] > I3C_MAX_ADDR)
  1847. return -EINVAL;
  1848. addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
  1849. reg[0]);
  1850. if (addrstatus != I3C_ADDR_SLOT_FREE)
  1851. return -EINVAL;
  1852. }
  1853. boardinfo->static_addr = reg[0];
  1854. if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
  1855. if (init_dyn_addr > I3C_MAX_ADDR)
  1856. return -EINVAL;
  1857. addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
  1858. init_dyn_addr);
  1859. if (addrstatus != I3C_ADDR_SLOT_FREE)
  1860. return -EINVAL;
  1861. }
  1862. boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
  1863. if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
  1864. I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
  1865. return -EINVAL;
  1866. boardinfo->init_dyn_addr = init_dyn_addr;
  1867. boardinfo->of_node = of_node_get(node);
  1868. list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
  1869. return 0;
  1870. }
  1871. static int of_i3c_master_add_dev(struct i3c_master_controller *master,
  1872. struct device_node *node)
  1873. {
  1874. u32 reg[3];
  1875. int ret;
  1876. if (!master || !node)
  1877. return -EINVAL;
  1878. ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
  1879. if (ret)
  1880. return ret;
  1881. /*
  1882. * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
  1883. * dealing with an I2C device.
  1884. */
  1885. if (!reg[1])
  1886. ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
  1887. else
  1888. ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
  1889. return ret;
  1890. }
  1891. static int of_populate_i3c_bus(struct i3c_master_controller *master)
  1892. {
  1893. struct device *dev = &master->dev;
  1894. struct device_node *i3cbus_np = dev->of_node;
  1895. struct device_node *node;
  1896. int ret;
  1897. u32 val;
  1898. if (!i3cbus_np)
  1899. return 0;
  1900. for_each_available_child_of_node(i3cbus_np, node) {
  1901. ret = of_i3c_master_add_dev(master, node);
  1902. if (ret) {
  1903. of_node_put(node);
  1904. return ret;
  1905. }
  1906. }
  1907. /*
  1908. * The user might want to limit I2C and I3C speed in case some devices
  1909. * on the bus are not supporting typical rates, or if the bus topology
  1910. * prevents it from using max possible rate.
  1911. */
  1912. if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
  1913. master->bus.scl_rate.i2c = val;
  1914. if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
  1915. master->bus.scl_rate.i3c = val;
  1916. return 0;
  1917. }
  1918. static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
  1919. struct i2c_msg *xfers, int nxfers)
  1920. {
  1921. struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
  1922. struct i2c_dev_desc *dev;
  1923. int i, ret;
  1924. u16 addr;
  1925. if (!xfers || !master || nxfers <= 0)
  1926. return -EINVAL;
  1927. if (!master->ops->i2c_xfers)
  1928. return -ENOTSUPP;
  1929. /* Doing transfers to different devices is not supported. */
  1930. addr = xfers[0].addr;
  1931. for (i = 1; i < nxfers; i++) {
  1932. if (addr != xfers[i].addr)
  1933. return -ENOTSUPP;
  1934. }
  1935. i3c_bus_normaluse_lock(&master->bus);
  1936. dev = i3c_master_find_i2c_dev_by_addr(master, addr);
  1937. if (!dev)
  1938. ret = -ENOENT;
  1939. else
  1940. ret = master->ops->i2c_xfers(dev, xfers, nxfers);
  1941. i3c_bus_normaluse_unlock(&master->bus);
  1942. return ret ? ret : nxfers;
  1943. }
  1944. static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
  1945. {
  1946. return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
  1947. }
  1948. static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
  1949. {
  1950. /* Fall back to no spike filters and FM bus mode. */
  1951. u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
  1952. if (client->dev.of_node) {
  1953. u32 reg[3];
  1954. if (!of_property_read_u32_array(client->dev.of_node, "reg",
  1955. reg, ARRAY_SIZE(reg)))
  1956. lvr = reg[2];
  1957. }
  1958. return lvr;
  1959. }
  1960. static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
  1961. {
  1962. struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
  1963. enum i3c_addr_slot_status status;
  1964. struct i2c_dev_desc *i2cdev;
  1965. int ret;
  1966. /* Already added by board info? */
  1967. if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
  1968. return 0;
  1969. status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
  1970. if (status != I3C_ADDR_SLOT_FREE)
  1971. return -EBUSY;
  1972. i3c_bus_set_addr_slot_status(&master->bus, client->addr,
  1973. I3C_ADDR_SLOT_I2C_DEV);
  1974. i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
  1975. i3c_master_i2c_get_lvr(client));
  1976. if (IS_ERR(i2cdev)) {
  1977. ret = PTR_ERR(i2cdev);
  1978. goto out_clear_status;
  1979. }
  1980. ret = i3c_master_attach_i2c_dev(master, i2cdev);
  1981. if (ret)
  1982. goto out_free_dev;
  1983. return 0;
  1984. out_free_dev:
  1985. i3c_master_free_i2c_dev(i2cdev);
  1986. out_clear_status:
  1987. i3c_bus_set_addr_slot_status(&master->bus, client->addr,
  1988. I3C_ADDR_SLOT_FREE);
  1989. return ret;
  1990. }
  1991. static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
  1992. {
  1993. struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
  1994. struct i2c_dev_desc *dev;
  1995. dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
  1996. if (!dev)
  1997. return -ENODEV;
  1998. i3c_master_detach_i2c_dev(dev);
  1999. i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
  2000. I3C_ADDR_SLOT_FREE);
  2001. i3c_master_free_i2c_dev(dev);
  2002. return 0;
  2003. }
  2004. static const struct i2c_algorithm i3c_master_i2c_algo = {
  2005. .master_xfer = i3c_master_i2c_adapter_xfer,
  2006. .functionality = i3c_master_i2c_funcs,
  2007. };
  2008. static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
  2009. void *data)
  2010. {
  2011. struct i2c_adapter *adap;
  2012. struct i2c_client *client;
  2013. struct device *dev = data;
  2014. struct i3c_master_controller *master;
  2015. int ret;
  2016. if (dev->type != &i2c_client_type)
  2017. return 0;
  2018. client = to_i2c_client(dev);
  2019. adap = client->adapter;
  2020. if (adap->algo != &i3c_master_i2c_algo)
  2021. return 0;
  2022. master = i2c_adapter_to_i3c_master(adap);
  2023. i3c_bus_maintenance_lock(&master->bus);
  2024. switch (action) {
  2025. case BUS_NOTIFY_ADD_DEVICE:
  2026. ret = i3c_master_i2c_attach(adap, client);
  2027. break;
  2028. case BUS_NOTIFY_DEL_DEVICE:
  2029. ret = i3c_master_i2c_detach(adap, client);
  2030. break;
  2031. }
  2032. i3c_bus_maintenance_unlock(&master->bus);
  2033. return ret;
  2034. }
  2035. static struct notifier_block i2cdev_notifier = {
  2036. .notifier_call = i3c_i2c_notifier_call,
  2037. };
  2038. static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
  2039. {
  2040. struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
  2041. struct i2c_dev_desc *i2cdev;
  2042. struct i2c_dev_boardinfo *i2cboardinfo;
  2043. int ret;
  2044. adap->dev.parent = master->dev.parent;
  2045. adap->owner = master->dev.parent->driver->owner;
  2046. adap->algo = &i3c_master_i2c_algo;
  2047. strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
  2048. /* FIXME: Should we allow i3c masters to override these values? */
  2049. adap->timeout = 1000;
  2050. adap->retries = 3;
  2051. ret = i2c_add_adapter(adap);
  2052. if (ret)
  2053. return ret;
  2054. /*
  2055. * We silently ignore failures here. The bus should keep working
  2056. * correctly even if one or more i2c devices are not registered.
  2057. */
  2058. list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
  2059. i2cdev = i3c_master_find_i2c_dev_by_addr(master,
  2060. i2cboardinfo->base.addr);
  2061. if (WARN_ON(!i2cdev))
  2062. continue;
  2063. i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
  2064. }
  2065. return 0;
  2066. }
  2067. static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
  2068. {
  2069. struct i2c_dev_desc *i2cdev;
  2070. i2c_del_adapter(&master->i2c);
  2071. i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
  2072. i2cdev->dev = NULL;
  2073. }
  2074. static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
  2075. {
  2076. struct i3c_dev_desc *i3cdev;
  2077. i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
  2078. if (!i3cdev->dev)
  2079. continue;
  2080. i3cdev->dev->desc = NULL;
  2081. if (device_is_registered(&i3cdev->dev->dev))
  2082. device_unregister(&i3cdev->dev->dev);
  2083. else
  2084. put_device(&i3cdev->dev->dev);
  2085. i3cdev->dev = NULL;
  2086. }
  2087. }
  2088. /**
  2089. * i3c_master_queue_ibi() - Queue an IBI
  2090. * @dev: the device this IBI is coming from
  2091. * @slot: the IBI slot used to store the payload
  2092. *
  2093. * Queue an IBI to the controller workqueue. The IBI handler attached to
  2094. * the dev will be called from a workqueue context.
  2095. */
  2096. void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
  2097. {
  2098. atomic_inc(&dev->ibi->pending_ibis);
  2099. queue_work(dev->ibi->wq, &slot->work);
  2100. }
  2101. EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
  2102. static void i3c_master_handle_ibi(struct work_struct *work)
  2103. {
  2104. struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
  2105. work);
  2106. struct i3c_dev_desc *dev = slot->dev;
  2107. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2108. struct i3c_ibi_payload payload;
  2109. payload.data = slot->data;
  2110. payload.len = slot->len;
  2111. if (dev->dev)
  2112. dev->ibi->handler(dev->dev, &payload);
  2113. master->ops->recycle_ibi_slot(dev, slot);
  2114. if (atomic_dec_and_test(&dev->ibi->pending_ibis))
  2115. complete(&dev->ibi->all_ibis_handled);
  2116. }
  2117. static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
  2118. struct i3c_ibi_slot *slot)
  2119. {
  2120. slot->dev = dev;
  2121. INIT_WORK(&slot->work, i3c_master_handle_ibi);
  2122. }
  2123. struct i3c_generic_ibi_slot {
  2124. struct list_head node;
  2125. struct i3c_ibi_slot base;
  2126. };
  2127. struct i3c_generic_ibi_pool {
  2128. spinlock_t lock;
  2129. unsigned int num_slots;
  2130. struct i3c_generic_ibi_slot *slots;
  2131. void *payload_buf;
  2132. struct list_head free_slots;
  2133. struct list_head pending;
  2134. };
  2135. /**
  2136. * i3c_generic_ibi_free_pool() - Free a generic IBI pool
  2137. * @pool: the IBI pool to free
  2138. *
  2139. * Free all IBI slots allated by a generic IBI pool.
  2140. */
  2141. void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
  2142. {
  2143. struct i3c_generic_ibi_slot *slot;
  2144. unsigned int nslots = 0;
  2145. while (!list_empty(&pool->free_slots)) {
  2146. slot = list_first_entry(&pool->free_slots,
  2147. struct i3c_generic_ibi_slot, node);
  2148. list_del(&slot->node);
  2149. nslots++;
  2150. }
  2151. /*
  2152. * If the number of freed slots is not equal to the number of allocated
  2153. * slots we have a leak somewhere.
  2154. */
  2155. WARN_ON(nslots != pool->num_slots);
  2156. kfree(pool->payload_buf);
  2157. kfree(pool->slots);
  2158. kfree(pool);
  2159. }
  2160. EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
  2161. /**
  2162. * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
  2163. * @dev: the device this pool will be used for
  2164. * @req: IBI setup request describing what the device driver expects
  2165. *
  2166. * Create a generic IBI pool based on the information provided in @req.
  2167. *
  2168. * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
  2169. */
  2170. struct i3c_generic_ibi_pool *
  2171. i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
  2172. const struct i3c_ibi_setup *req)
  2173. {
  2174. struct i3c_generic_ibi_pool *pool;
  2175. struct i3c_generic_ibi_slot *slot;
  2176. unsigned int i;
  2177. int ret;
  2178. pool = kzalloc(sizeof(*pool), GFP_KERNEL);
  2179. if (!pool)
  2180. return ERR_PTR(-ENOMEM);
  2181. spin_lock_init(&pool->lock);
  2182. INIT_LIST_HEAD(&pool->free_slots);
  2183. INIT_LIST_HEAD(&pool->pending);
  2184. pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
  2185. if (!pool->slots) {
  2186. ret = -ENOMEM;
  2187. goto err_free_pool;
  2188. }
  2189. if (req->max_payload_len) {
  2190. pool->payload_buf = kcalloc(req->num_slots,
  2191. req->max_payload_len, GFP_KERNEL);
  2192. if (!pool->payload_buf) {
  2193. ret = -ENOMEM;
  2194. goto err_free_pool;
  2195. }
  2196. }
  2197. for (i = 0; i < req->num_slots; i++) {
  2198. slot = &pool->slots[i];
  2199. i3c_master_init_ibi_slot(dev, &slot->base);
  2200. if (req->max_payload_len)
  2201. slot->base.data = pool->payload_buf +
  2202. (i * req->max_payload_len);
  2203. list_add_tail(&slot->node, &pool->free_slots);
  2204. pool->num_slots++;
  2205. }
  2206. return pool;
  2207. err_free_pool:
  2208. i3c_generic_ibi_free_pool(pool);
  2209. return ERR_PTR(ret);
  2210. }
  2211. EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
  2212. /**
  2213. * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
  2214. * @pool: the pool to query an IBI slot on
  2215. *
  2216. * Search for a free slot in a generic IBI pool.
  2217. * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
  2218. * when it's no longer needed.
  2219. *
  2220. * Return: a pointer to a free slot, or NULL if there's no free slot available.
  2221. */
  2222. struct i3c_ibi_slot *
  2223. i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
  2224. {
  2225. struct i3c_generic_ibi_slot *slot;
  2226. unsigned long flags;
  2227. spin_lock_irqsave(&pool->lock, flags);
  2228. slot = list_first_entry_or_null(&pool->free_slots,
  2229. struct i3c_generic_ibi_slot, node);
  2230. if (slot)
  2231. list_del(&slot->node);
  2232. spin_unlock_irqrestore(&pool->lock, flags);
  2233. return slot ? &slot->base : NULL;
  2234. }
  2235. EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
  2236. /**
  2237. * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
  2238. * @pool: the pool to return the IBI slot to
  2239. * @s: IBI slot to recycle
  2240. *
  2241. * Add an IBI slot back to its generic IBI pool. Should be called from the
  2242. * master driver struct_master_controller_ops->recycle_ibi() method.
  2243. */
  2244. void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
  2245. struct i3c_ibi_slot *s)
  2246. {
  2247. struct i3c_generic_ibi_slot *slot;
  2248. unsigned long flags;
  2249. if (!s)
  2250. return;
  2251. slot = container_of(s, struct i3c_generic_ibi_slot, base);
  2252. spin_lock_irqsave(&pool->lock, flags);
  2253. list_add_tail(&slot->node, &pool->free_slots);
  2254. spin_unlock_irqrestore(&pool->lock, flags);
  2255. }
  2256. EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
  2257. static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
  2258. {
  2259. if (!ops || !ops->bus_init || !ops->priv_xfers ||
  2260. !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
  2261. return -EINVAL;
  2262. if (ops->request_ibi &&
  2263. (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
  2264. !ops->recycle_ibi_slot))
  2265. return -EINVAL;
  2266. return 0;
  2267. }
  2268. /**
  2269. * i3c_master_register() - register an I3C master
  2270. * @master: master used to send frames on the bus
  2271. * @parent: the parent device (the one that provides this I3C master
  2272. * controller)
  2273. * @ops: the master controller operations
  2274. * @secondary: true if you are registering a secondary master. Will return
  2275. * -ENOTSUPP if set to true since secondary masters are not yet
  2276. * supported
  2277. *
  2278. * This function takes care of everything for you:
  2279. *
  2280. * - creates and initializes the I3C bus
  2281. * - populates the bus with static I2C devs if @parent->of_node is not
  2282. * NULL
  2283. * - registers all I3C devices added by the controller during bus
  2284. * initialization
  2285. * - registers the I2C adapter and all I2C devices
  2286. *
  2287. * Return: 0 in case of success, a negative error code otherwise.
  2288. */
  2289. int i3c_master_register(struct i3c_master_controller *master,
  2290. struct device *parent,
  2291. const struct i3c_master_controller_ops *ops,
  2292. bool secondary)
  2293. {
  2294. unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
  2295. struct i3c_bus *i3cbus = i3c_master_get_bus(master);
  2296. enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
  2297. struct i2c_dev_boardinfo *i2cbi;
  2298. int ret;
  2299. /* We do not support secondary masters yet. */
  2300. if (secondary)
  2301. return -ENOTSUPP;
  2302. ret = i3c_master_check_ops(ops);
  2303. if (ret)
  2304. return ret;
  2305. master->dev.parent = parent;
  2306. master->dev.of_node = of_node_get(parent->of_node);
  2307. master->dev.bus = &i3c_bus_type;
  2308. master->dev.type = &i3c_masterdev_type;
  2309. master->dev.release = i3c_masterdev_release;
  2310. master->ops = ops;
  2311. master->secondary = secondary;
  2312. INIT_LIST_HEAD(&master->boardinfo.i2c);
  2313. INIT_LIST_HEAD(&master->boardinfo.i3c);
  2314. ret = i3c_bus_init(i3cbus, master->dev.of_node);
  2315. if (ret)
  2316. return ret;
  2317. device_initialize(&master->dev);
  2318. dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
  2319. master->dev.dma_mask = parent->dma_mask;
  2320. master->dev.coherent_dma_mask = parent->coherent_dma_mask;
  2321. master->dev.dma_parms = parent->dma_parms;
  2322. ret = of_populate_i3c_bus(master);
  2323. if (ret)
  2324. goto err_put_dev;
  2325. list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
  2326. switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
  2327. case I3C_LVR_I2C_INDEX(0):
  2328. if (mode < I3C_BUS_MODE_MIXED_FAST)
  2329. mode = I3C_BUS_MODE_MIXED_FAST;
  2330. break;
  2331. case I3C_LVR_I2C_INDEX(1):
  2332. if (mode < I3C_BUS_MODE_MIXED_LIMITED)
  2333. mode = I3C_BUS_MODE_MIXED_LIMITED;
  2334. break;
  2335. case I3C_LVR_I2C_INDEX(2):
  2336. if (mode < I3C_BUS_MODE_MIXED_SLOW)
  2337. mode = I3C_BUS_MODE_MIXED_SLOW;
  2338. break;
  2339. default:
  2340. ret = -EINVAL;
  2341. goto err_put_dev;
  2342. }
  2343. if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
  2344. i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
  2345. }
  2346. ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
  2347. if (ret)
  2348. goto err_put_dev;
  2349. master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
  2350. if (!master->wq) {
  2351. ret = -ENOMEM;
  2352. goto err_put_dev;
  2353. }
  2354. ret = i3c_master_bus_init(master);
  2355. if (ret)
  2356. goto err_put_dev;
  2357. ret = device_add(&master->dev);
  2358. if (ret)
  2359. goto err_cleanup_bus;
  2360. /*
  2361. * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
  2362. * through the I2C subsystem.
  2363. */
  2364. ret = i3c_master_i2c_adapter_init(master);
  2365. if (ret)
  2366. goto err_del_dev;
  2367. i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
  2368. pm_runtime_no_callbacks(&master->dev);
  2369. pm_suspend_ignore_children(&master->dev, true);
  2370. pm_runtime_enable(&master->dev);
  2371. /*
  2372. * We're done initializing the bus and the controller, we can now
  2373. * register I3C devices discovered during the initial DAA.
  2374. */
  2375. master->init_done = true;
  2376. i3c_bus_normaluse_lock(&master->bus);
  2377. i3c_master_register_new_i3c_devs(master);
  2378. i3c_bus_normaluse_unlock(&master->bus);
  2379. return 0;
  2380. err_del_dev:
  2381. device_del(&master->dev);
  2382. err_cleanup_bus:
  2383. i3c_master_bus_cleanup(master);
  2384. err_put_dev:
  2385. put_device(&master->dev);
  2386. return ret;
  2387. }
  2388. EXPORT_SYMBOL_GPL(i3c_master_register);
  2389. /**
  2390. * i3c_master_unregister() - unregister an I3C master
  2391. * @master: master used to send frames on the bus
  2392. *
  2393. * Basically undo everything done in i3c_master_register().
  2394. */
  2395. void i3c_master_unregister(struct i3c_master_controller *master)
  2396. {
  2397. i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
  2398. i3c_master_i2c_adapter_cleanup(master);
  2399. i3c_master_unregister_i3c_devs(master);
  2400. i3c_master_bus_cleanup(master);
  2401. pm_runtime_disable(&master->dev);
  2402. device_unregister(&master->dev);
  2403. }
  2404. EXPORT_SYMBOL_GPL(i3c_master_unregister);
  2405. int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
  2406. {
  2407. struct i3c_master_controller *master;
  2408. if (!dev)
  2409. return -ENOENT;
  2410. master = i3c_dev_get_master(dev);
  2411. if (!master)
  2412. return -EINVAL;
  2413. if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
  2414. !dev->boardinfo->static_addr)
  2415. return -EINVAL;
  2416. return i3c_master_setdasa_locked(master, dev->info.static_addr,
  2417. dev->boardinfo->init_dyn_addr);
  2418. }
  2419. int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
  2420. struct i3c_priv_xfer *xfers,
  2421. int nxfers)
  2422. {
  2423. struct i3c_master_controller *master;
  2424. if (!dev)
  2425. return -ENOENT;
  2426. master = i3c_dev_get_master(dev);
  2427. if (!master || !xfers)
  2428. return -EINVAL;
  2429. if (!master->ops->priv_xfers)
  2430. return -ENOTSUPP;
  2431. return master->ops->priv_xfers(dev, xfers, nxfers);
  2432. }
  2433. int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
  2434. {
  2435. struct i3c_master_controller *master;
  2436. int ret;
  2437. if (!dev->ibi)
  2438. return -EINVAL;
  2439. master = i3c_dev_get_master(dev);
  2440. ret = master->ops->disable_ibi(dev);
  2441. if (ret)
  2442. return ret;
  2443. reinit_completion(&dev->ibi->all_ibis_handled);
  2444. if (atomic_read(&dev->ibi->pending_ibis))
  2445. wait_for_completion(&dev->ibi->all_ibis_handled);
  2446. dev->ibi->enabled = false;
  2447. return 0;
  2448. }
  2449. int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
  2450. {
  2451. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2452. int ret;
  2453. if (!dev->ibi)
  2454. return -EINVAL;
  2455. ret = master->ops->enable_ibi(dev);
  2456. if (!ret)
  2457. dev->ibi->enabled = true;
  2458. return ret;
  2459. }
  2460. int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
  2461. const struct i3c_ibi_setup *req)
  2462. {
  2463. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2464. struct i3c_device_ibi_info *ibi;
  2465. int ret;
  2466. if (!master->ops->request_ibi)
  2467. return -ENOTSUPP;
  2468. if (dev->ibi)
  2469. return -EBUSY;
  2470. ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
  2471. if (!ibi)
  2472. return -ENOMEM;
  2473. ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
  2474. if (!ibi->wq) {
  2475. kfree(ibi);
  2476. return -ENOMEM;
  2477. }
  2478. atomic_set(&ibi->pending_ibis, 0);
  2479. init_completion(&ibi->all_ibis_handled);
  2480. ibi->handler = req->handler;
  2481. ibi->max_payload_len = req->max_payload_len;
  2482. ibi->num_slots = req->num_slots;
  2483. dev->ibi = ibi;
  2484. ret = master->ops->request_ibi(dev, req);
  2485. if (ret) {
  2486. kfree(ibi);
  2487. dev->ibi = NULL;
  2488. }
  2489. return ret;
  2490. }
  2491. void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
  2492. {
  2493. struct i3c_master_controller *master = i3c_dev_get_master(dev);
  2494. if (!dev->ibi)
  2495. return;
  2496. if (WARN_ON(dev->ibi->enabled))
  2497. WARN_ON(i3c_dev_disable_ibi_locked(dev));
  2498. master->ops->free_ibi(dev);
  2499. if (dev->ibi->wq) {
  2500. destroy_workqueue(dev->ibi->wq);
  2501. dev->ibi->wq = NULL;
  2502. }
  2503. kfree(dev->ibi);
  2504. dev->ibi = NULL;
  2505. }
  2506. static int __init i3c_init(void)
  2507. {
  2508. int res;
  2509. res = of_alias_get_highest_id("i3c");
  2510. if (res >= 0) {
  2511. mutex_lock(&i3c_core_lock);
  2512. __i3c_first_dynamic_bus_num = res + 1;
  2513. mutex_unlock(&i3c_core_lock);
  2514. }
  2515. res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
  2516. if (res)
  2517. return res;
  2518. res = bus_register(&i3c_bus_type);
  2519. if (res)
  2520. goto out_unreg_notifier;
  2521. return 0;
  2522. out_unreg_notifier:
  2523. bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
  2524. return res;
  2525. }
  2526. subsys_initcall(i3c_init);
  2527. static void __exit i3c_exit(void)
  2528. {
  2529. bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
  2530. idr_destroy(&i3c_bus_idr);
  2531. bus_unregister(&i3c_bus_type);
  2532. }
  2533. module_exit(i3c_exit);
  2534. MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
  2535. MODULE_DESCRIPTION("I3C core");
  2536. MODULE_LICENSE("GPL v2");