bma400_core.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Core IIO driver for Bosch BMA400 triaxial acceleration sensor.
  4. *
  5. * Copyright 2019 Dan Robertson <dan@dlrobertson.com>
  6. *
  7. * TODO:
  8. * - Support for power management
  9. * - Support events and interrupts
  10. * - Create channel for step count
  11. * - Create channel for sensor time
  12. */
  13. #include <linux/bitfield.h>
  14. #include <linux/bitops.h>
  15. #include <linux/cleanup.h>
  16. #include <linux/device.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/mutex.h>
  20. #include <linux/regmap.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/slab.h>
  23. #include <linux/unaligned.h>
  24. #include <linux/iio/iio.h>
  25. #include <linux/iio/buffer.h>
  26. #include <linux/iio/events.h>
  27. #include <linux/iio/sysfs.h>
  28. #include <linux/iio/trigger.h>
  29. #include <linux/iio/trigger_consumer.h>
  30. #include <linux/iio/triggered_buffer.h>
  31. #include "bma400.h"
  32. /*
  33. * The G-range selection may be one of 2g, 4g, 8, or 16g. The scale may
  34. * be selected with the acc_range bits of the ACC_CONFIG1 register.
  35. * NB: This buffer is populated in the device init.
  36. */
  37. static int bma400_scales[8];
  38. /*
  39. * See the ACC_CONFIG1 section of the datasheet.
  40. * NB: This buffer is populated in the device init.
  41. */
  42. static int bma400_sample_freqs[14];
  43. static const int bma400_osr_range[] = { 0, 1, 3 };
  44. static int tap_reset_timeout[BMA400_TAP_TIM_LIST_LEN] = {
  45. 300000,
  46. 400000,
  47. 500000,
  48. 600000
  49. };
  50. static int tap_max2min_time[BMA400_TAP_TIM_LIST_LEN] = {
  51. 30000,
  52. 45000,
  53. 60000,
  54. 90000
  55. };
  56. static int double_tap2_min_delay[BMA400_TAP_TIM_LIST_LEN] = {
  57. 20000,
  58. 40000,
  59. 60000,
  60. 80000
  61. };
  62. /* See the ACC_CONFIG0 section of the datasheet */
  63. enum bma400_power_mode {
  64. POWER_MODE_SLEEP = 0x00,
  65. POWER_MODE_LOW = 0x01,
  66. POWER_MODE_NORMAL = 0x02,
  67. POWER_MODE_INVALID = 0x03,
  68. };
  69. enum bma400_scan {
  70. BMA400_ACCL_X,
  71. BMA400_ACCL_Y,
  72. BMA400_ACCL_Z,
  73. BMA400_TEMP,
  74. };
  75. struct bma400_sample_freq {
  76. int hz;
  77. int uhz;
  78. };
  79. enum bma400_activity {
  80. BMA400_STILL,
  81. BMA400_WALKING,
  82. BMA400_RUNNING,
  83. };
  84. struct bma400_data {
  85. struct device *dev;
  86. struct regmap *regmap;
  87. struct mutex mutex; /* data register lock */
  88. struct iio_mount_matrix orientation;
  89. enum bma400_power_mode power_mode;
  90. struct bma400_sample_freq sample_freq;
  91. int oversampling_ratio;
  92. int scale;
  93. struct iio_trigger *trig;
  94. int steps_enabled;
  95. bool step_event_en;
  96. bool activity_event_en;
  97. unsigned int generic_event_en;
  98. unsigned int tap_event_en_bitmask;
  99. /* Correct time stamp alignment */
  100. struct {
  101. __le16 buff[3];
  102. u8 temperature;
  103. s64 ts __aligned(8);
  104. } buffer __aligned(IIO_DMA_MINALIGN);
  105. __le16 status;
  106. __be16 duration;
  107. };
  108. static bool bma400_is_writable_reg(struct device *dev, unsigned int reg)
  109. {
  110. switch (reg) {
  111. case BMA400_CHIP_ID_REG:
  112. case BMA400_ERR_REG:
  113. case BMA400_STATUS_REG:
  114. case BMA400_X_AXIS_LSB_REG:
  115. case BMA400_X_AXIS_MSB_REG:
  116. case BMA400_Y_AXIS_LSB_REG:
  117. case BMA400_Y_AXIS_MSB_REG:
  118. case BMA400_Z_AXIS_LSB_REG:
  119. case BMA400_Z_AXIS_MSB_REG:
  120. case BMA400_SENSOR_TIME0:
  121. case BMA400_SENSOR_TIME1:
  122. case BMA400_SENSOR_TIME2:
  123. case BMA400_EVENT_REG:
  124. case BMA400_INT_STAT0_REG:
  125. case BMA400_INT_STAT1_REG:
  126. case BMA400_INT_STAT2_REG:
  127. case BMA400_TEMP_DATA_REG:
  128. case BMA400_FIFO_LENGTH0_REG:
  129. case BMA400_FIFO_LENGTH1_REG:
  130. case BMA400_FIFO_DATA_REG:
  131. case BMA400_STEP_CNT0_REG:
  132. case BMA400_STEP_CNT1_REG:
  133. case BMA400_STEP_CNT3_REG:
  134. case BMA400_STEP_STAT_REG:
  135. return false;
  136. default:
  137. return true;
  138. }
  139. }
  140. static bool bma400_is_volatile_reg(struct device *dev, unsigned int reg)
  141. {
  142. switch (reg) {
  143. case BMA400_ERR_REG:
  144. case BMA400_STATUS_REG:
  145. case BMA400_X_AXIS_LSB_REG:
  146. case BMA400_X_AXIS_MSB_REG:
  147. case BMA400_Y_AXIS_LSB_REG:
  148. case BMA400_Y_AXIS_MSB_REG:
  149. case BMA400_Z_AXIS_LSB_REG:
  150. case BMA400_Z_AXIS_MSB_REG:
  151. case BMA400_SENSOR_TIME0:
  152. case BMA400_SENSOR_TIME1:
  153. case BMA400_SENSOR_TIME2:
  154. case BMA400_EVENT_REG:
  155. case BMA400_INT_STAT0_REG:
  156. case BMA400_INT_STAT1_REG:
  157. case BMA400_INT_STAT2_REG:
  158. case BMA400_TEMP_DATA_REG:
  159. case BMA400_FIFO_LENGTH0_REG:
  160. case BMA400_FIFO_LENGTH1_REG:
  161. case BMA400_FIFO_DATA_REG:
  162. case BMA400_STEP_CNT0_REG:
  163. case BMA400_STEP_CNT1_REG:
  164. case BMA400_STEP_CNT3_REG:
  165. case BMA400_STEP_STAT_REG:
  166. return true;
  167. default:
  168. return false;
  169. }
  170. }
  171. const struct regmap_config bma400_regmap_config = {
  172. .reg_bits = 8,
  173. .val_bits = 8,
  174. .max_register = BMA400_CMD_REG,
  175. .cache_type = REGCACHE_RBTREE,
  176. .writeable_reg = bma400_is_writable_reg,
  177. .volatile_reg = bma400_is_volatile_reg,
  178. };
  179. EXPORT_SYMBOL_NS(bma400_regmap_config, IIO_BMA400);
  180. static const struct iio_mount_matrix *
  181. bma400_accel_get_mount_matrix(const struct iio_dev *indio_dev,
  182. const struct iio_chan_spec *chan)
  183. {
  184. struct bma400_data *data = iio_priv(indio_dev);
  185. return &data->orientation;
  186. }
  187. static const struct iio_chan_spec_ext_info bma400_ext_info[] = {
  188. IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma400_accel_get_mount_matrix),
  189. { }
  190. };
  191. static const struct iio_event_spec bma400_step_detect_event = {
  192. .type = IIO_EV_TYPE_CHANGE,
  193. .dir = IIO_EV_DIR_NONE,
  194. .mask_separate = BIT(IIO_EV_INFO_ENABLE),
  195. };
  196. static const struct iio_event_spec bma400_activity_event = {
  197. .type = IIO_EV_TYPE_CHANGE,
  198. .dir = IIO_EV_DIR_NONE,
  199. .mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE),
  200. };
  201. static const struct iio_event_spec bma400_accel_event[] = {
  202. {
  203. .type = IIO_EV_TYPE_MAG,
  204. .dir = IIO_EV_DIR_FALLING,
  205. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  206. BIT(IIO_EV_INFO_PERIOD) |
  207. BIT(IIO_EV_INFO_HYSTERESIS) |
  208. BIT(IIO_EV_INFO_ENABLE),
  209. },
  210. {
  211. .type = IIO_EV_TYPE_MAG,
  212. .dir = IIO_EV_DIR_RISING,
  213. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  214. BIT(IIO_EV_INFO_PERIOD) |
  215. BIT(IIO_EV_INFO_HYSTERESIS) |
  216. BIT(IIO_EV_INFO_ENABLE),
  217. },
  218. {
  219. .type = IIO_EV_TYPE_GESTURE,
  220. .dir = IIO_EV_DIR_SINGLETAP,
  221. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  222. BIT(IIO_EV_INFO_ENABLE) |
  223. BIT(IIO_EV_INFO_RESET_TIMEOUT),
  224. },
  225. {
  226. .type = IIO_EV_TYPE_GESTURE,
  227. .dir = IIO_EV_DIR_DOUBLETAP,
  228. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  229. BIT(IIO_EV_INFO_ENABLE) |
  230. BIT(IIO_EV_INFO_RESET_TIMEOUT) |
  231. BIT(IIO_EV_INFO_TAP2_MIN_DELAY),
  232. },
  233. };
  234. static int usec_to_tapreg_raw(int usec, const int *time_list)
  235. {
  236. int index;
  237. for (index = 0; index < BMA400_TAP_TIM_LIST_LEN; index++) {
  238. if (usec == time_list[index])
  239. return index;
  240. }
  241. return -EINVAL;
  242. }
  243. static ssize_t in_accel_gesture_tap_maxtomin_time_show(struct device *dev,
  244. struct device_attribute *attr,
  245. char *buf)
  246. {
  247. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  248. struct bma400_data *data = iio_priv(indio_dev);
  249. int ret, reg_val, raw, vals[2];
  250. ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1, &reg_val);
  251. if (ret)
  252. return ret;
  253. raw = FIELD_GET(BMA400_TAP_TICSTH_MSK, reg_val);
  254. vals[0] = 0;
  255. vals[1] = tap_max2min_time[raw];
  256. return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
  257. }
  258. static ssize_t in_accel_gesture_tap_maxtomin_time_store(struct device *dev,
  259. struct device_attribute *attr,
  260. const char *buf, size_t len)
  261. {
  262. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  263. struct bma400_data *data = iio_priv(indio_dev);
  264. int ret, val_int, val_fract, raw;
  265. ret = iio_str_to_fixpoint(buf, 100000, &val_int, &val_fract);
  266. if (ret)
  267. return ret;
  268. raw = usec_to_tapreg_raw(val_fract, tap_max2min_time);
  269. if (raw < 0)
  270. return -EINVAL;
  271. ret = regmap_update_bits(data->regmap, BMA400_TAP_CONFIG1,
  272. BMA400_TAP_TICSTH_MSK,
  273. FIELD_PREP(BMA400_TAP_TICSTH_MSK, raw));
  274. if (ret)
  275. return ret;
  276. return len;
  277. }
  278. static IIO_DEVICE_ATTR_RW(in_accel_gesture_tap_maxtomin_time, 0);
  279. /*
  280. * Tap interrupts works with 200 Hz input data rate and the time based tap
  281. * controls are in the terms of data samples so the below calculation is
  282. * used to convert the configuration values into seconds.
  283. * e.g.:
  284. * 60 data samples * 0.005 ms = 0.3 seconds.
  285. * 80 data samples * 0.005 ms = 0.4 seconds.
  286. */
  287. /* quiet configuration values in seconds */
  288. static IIO_CONST_ATTR(in_accel_gesture_tap_reset_timeout_available,
  289. "0.3 0.4 0.5 0.6");
  290. /* tics_th configuration values in seconds */
  291. static IIO_CONST_ATTR(in_accel_gesture_tap_maxtomin_time_available,
  292. "0.03 0.045 0.06 0.09");
  293. /* quiet_dt configuration values in seconds */
  294. static IIO_CONST_ATTR(in_accel_gesture_doubletap_tap2_min_delay_available,
  295. "0.02 0.04 0.06 0.08");
  296. /* List of sensitivity values available to configure tap interrupts */
  297. static IIO_CONST_ATTR(in_accel_gesture_tap_value_available, "0 1 2 3 4 5 6 7");
  298. static struct attribute *bma400_event_attributes[] = {
  299. &iio_const_attr_in_accel_gesture_tap_value_available.dev_attr.attr,
  300. &iio_const_attr_in_accel_gesture_tap_reset_timeout_available.dev_attr.attr,
  301. &iio_const_attr_in_accel_gesture_tap_maxtomin_time_available.dev_attr.attr,
  302. &iio_const_attr_in_accel_gesture_doubletap_tap2_min_delay_available.dev_attr.attr,
  303. &iio_dev_attr_in_accel_gesture_tap_maxtomin_time.dev_attr.attr,
  304. NULL
  305. };
  306. static const struct attribute_group bma400_event_attribute_group = {
  307. .attrs = bma400_event_attributes,
  308. };
  309. #define BMA400_ACC_CHANNEL(_index, _axis) { \
  310. .type = IIO_ACCEL, \
  311. .modified = 1, \
  312. .channel2 = IIO_MOD_##_axis, \
  313. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  314. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
  315. BIT(IIO_CHAN_INFO_SCALE) | \
  316. BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
  317. .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
  318. BIT(IIO_CHAN_INFO_SCALE) | \
  319. BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
  320. .ext_info = bma400_ext_info, \
  321. .scan_index = _index, \
  322. .scan_type = { \
  323. .sign = 's', \
  324. .realbits = 12, \
  325. .storagebits = 16, \
  326. .endianness = IIO_LE, \
  327. }, \
  328. .event_spec = bma400_accel_event, \
  329. .num_event_specs = ARRAY_SIZE(bma400_accel_event) \
  330. }
  331. #define BMA400_ACTIVITY_CHANNEL(_chan2) { \
  332. .type = IIO_ACTIVITY, \
  333. .modified = 1, \
  334. .channel2 = _chan2, \
  335. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
  336. .scan_index = -1, /* No buffer support */ \
  337. .event_spec = &bma400_activity_event, \
  338. .num_event_specs = 1, \
  339. }
  340. static const struct iio_chan_spec bma400_channels[] = {
  341. BMA400_ACC_CHANNEL(0, X),
  342. BMA400_ACC_CHANNEL(1, Y),
  343. BMA400_ACC_CHANNEL(2, Z),
  344. {
  345. .type = IIO_TEMP,
  346. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
  347. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ),
  348. .scan_index = 3,
  349. .scan_type = {
  350. .sign = 's',
  351. .realbits = 8,
  352. .storagebits = 8,
  353. .endianness = IIO_LE,
  354. },
  355. },
  356. {
  357. .type = IIO_STEPS,
  358. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
  359. BIT(IIO_CHAN_INFO_ENABLE),
  360. .scan_index = -1, /* No buffer support */
  361. .event_spec = &bma400_step_detect_event,
  362. .num_event_specs = 1,
  363. },
  364. BMA400_ACTIVITY_CHANNEL(IIO_MOD_STILL),
  365. BMA400_ACTIVITY_CHANNEL(IIO_MOD_WALKING),
  366. BMA400_ACTIVITY_CHANNEL(IIO_MOD_RUNNING),
  367. IIO_CHAN_SOFT_TIMESTAMP(4),
  368. };
  369. static int bma400_get_temp_reg(struct bma400_data *data, int *val, int *val2)
  370. {
  371. unsigned int raw_temp;
  372. int host_temp;
  373. int ret;
  374. if (data->power_mode == POWER_MODE_SLEEP)
  375. return -EBUSY;
  376. ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &raw_temp);
  377. if (ret)
  378. return ret;
  379. host_temp = sign_extend32(raw_temp, 7);
  380. /*
  381. * The formula for the TEMP_DATA register in the datasheet
  382. * is: x * 0.5 + 23
  383. */
  384. *val = (host_temp >> 1) + 23;
  385. *val2 = (host_temp & 0x1) * 500000;
  386. return IIO_VAL_INT_PLUS_MICRO;
  387. }
  388. static int bma400_get_accel_reg(struct bma400_data *data,
  389. const struct iio_chan_spec *chan,
  390. int *val)
  391. {
  392. __le16 raw_accel;
  393. int lsb_reg;
  394. int ret;
  395. if (data->power_mode == POWER_MODE_SLEEP)
  396. return -EBUSY;
  397. switch (chan->channel2) {
  398. case IIO_MOD_X:
  399. lsb_reg = BMA400_X_AXIS_LSB_REG;
  400. break;
  401. case IIO_MOD_Y:
  402. lsb_reg = BMA400_Y_AXIS_LSB_REG;
  403. break;
  404. case IIO_MOD_Z:
  405. lsb_reg = BMA400_Z_AXIS_LSB_REG;
  406. break;
  407. default:
  408. dev_err(data->dev, "invalid axis channel modifier\n");
  409. return -EINVAL;
  410. }
  411. /* bulk read two registers, with the base being the LSB register */
  412. ret = regmap_bulk_read(data->regmap, lsb_reg, &raw_accel,
  413. sizeof(raw_accel));
  414. if (ret)
  415. return ret;
  416. *val = sign_extend32(le16_to_cpu(raw_accel), 11);
  417. return IIO_VAL_INT;
  418. }
  419. static void bma400_output_data_rate_from_raw(int raw, unsigned int *val,
  420. unsigned int *val2)
  421. {
  422. *val = BMA400_ACC_ODR_MAX_HZ >> (BMA400_ACC_ODR_MAX_RAW - raw);
  423. if (raw > BMA400_ACC_ODR_MIN_RAW)
  424. *val2 = 0;
  425. else
  426. *val2 = 500000;
  427. }
  428. static int bma400_get_accel_output_data_rate(struct bma400_data *data)
  429. {
  430. unsigned int val;
  431. unsigned int odr;
  432. int ret;
  433. switch (data->power_mode) {
  434. case POWER_MODE_LOW:
  435. /*
  436. * Runs at a fixed rate in low-power mode. See section 4.3
  437. * in the datasheet.
  438. */
  439. bma400_output_data_rate_from_raw(BMA400_ACC_ODR_LP_RAW,
  440. &data->sample_freq.hz,
  441. &data->sample_freq.uhz);
  442. return 0;
  443. case POWER_MODE_NORMAL:
  444. /*
  445. * In normal mode the ODR can be found in the ACC_CONFIG1
  446. * register.
  447. */
  448. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
  449. if (ret)
  450. goto error;
  451. odr = val & BMA400_ACC_ODR_MASK;
  452. if (odr < BMA400_ACC_ODR_MIN_RAW ||
  453. odr > BMA400_ACC_ODR_MAX_RAW) {
  454. ret = -EINVAL;
  455. goto error;
  456. }
  457. bma400_output_data_rate_from_raw(odr, &data->sample_freq.hz,
  458. &data->sample_freq.uhz);
  459. return 0;
  460. case POWER_MODE_SLEEP:
  461. data->sample_freq.hz = 0;
  462. data->sample_freq.uhz = 0;
  463. return 0;
  464. default:
  465. ret = 0;
  466. goto error;
  467. }
  468. error:
  469. data->sample_freq.hz = -1;
  470. data->sample_freq.uhz = -1;
  471. return ret;
  472. }
  473. static int bma400_set_accel_output_data_rate(struct bma400_data *data,
  474. int hz, int uhz)
  475. {
  476. unsigned int idx;
  477. unsigned int odr;
  478. unsigned int val;
  479. int ret;
  480. if (hz >= BMA400_ACC_ODR_MIN_WHOLE_HZ) {
  481. if (uhz || hz > BMA400_ACC_ODR_MAX_HZ)
  482. return -EINVAL;
  483. /* Note this works because MIN_WHOLE_HZ is odd */
  484. idx = __ffs(hz);
  485. if (hz >> idx != BMA400_ACC_ODR_MIN_WHOLE_HZ)
  486. return -EINVAL;
  487. idx += BMA400_ACC_ODR_MIN_RAW + 1;
  488. } else if (hz == BMA400_ACC_ODR_MIN_HZ && uhz == 500000) {
  489. idx = BMA400_ACC_ODR_MIN_RAW;
  490. } else {
  491. return -EINVAL;
  492. }
  493. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
  494. if (ret)
  495. return ret;
  496. /* preserve the range and normal mode osr */
  497. odr = (~BMA400_ACC_ODR_MASK & val) | idx;
  498. ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG, odr);
  499. if (ret)
  500. return ret;
  501. bma400_output_data_rate_from_raw(idx, &data->sample_freq.hz,
  502. &data->sample_freq.uhz);
  503. return 0;
  504. }
  505. static int bma400_get_accel_oversampling_ratio(struct bma400_data *data)
  506. {
  507. unsigned int val;
  508. unsigned int osr;
  509. int ret;
  510. /*
  511. * The oversampling ratio is stored in a different register
  512. * based on the power-mode. In normal mode the OSR is stored
  513. * in ACC_CONFIG1. In low-power mode it is stored in
  514. * ACC_CONFIG0.
  515. */
  516. switch (data->power_mode) {
  517. case POWER_MODE_LOW:
  518. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val);
  519. if (ret) {
  520. data->oversampling_ratio = -1;
  521. return ret;
  522. }
  523. osr = (val & BMA400_LP_OSR_MASK) >> BMA400_LP_OSR_SHIFT;
  524. data->oversampling_ratio = osr;
  525. return 0;
  526. case POWER_MODE_NORMAL:
  527. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
  528. if (ret) {
  529. data->oversampling_ratio = -1;
  530. return ret;
  531. }
  532. osr = (val & BMA400_NP_OSR_MASK) >> BMA400_NP_OSR_SHIFT;
  533. data->oversampling_ratio = osr;
  534. return 0;
  535. case POWER_MODE_SLEEP:
  536. data->oversampling_ratio = 0;
  537. return 0;
  538. default:
  539. data->oversampling_ratio = -1;
  540. return -EINVAL;
  541. }
  542. }
  543. static int bma400_set_accel_oversampling_ratio(struct bma400_data *data,
  544. int val)
  545. {
  546. unsigned int acc_config;
  547. int ret;
  548. if (val & ~BMA400_TWO_BITS_MASK)
  549. return -EINVAL;
  550. /*
  551. * The oversampling ratio is stored in a different register
  552. * based on the power-mode.
  553. */
  554. switch (data->power_mode) {
  555. case POWER_MODE_LOW:
  556. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG,
  557. &acc_config);
  558. if (ret)
  559. return ret;
  560. ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
  561. (acc_config & ~BMA400_LP_OSR_MASK) |
  562. (val << BMA400_LP_OSR_SHIFT));
  563. if (ret) {
  564. dev_err(data->dev, "Failed to write out OSR\n");
  565. return ret;
  566. }
  567. data->oversampling_ratio = val;
  568. return 0;
  569. case POWER_MODE_NORMAL:
  570. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG,
  571. &acc_config);
  572. if (ret)
  573. return ret;
  574. ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
  575. (acc_config & ~BMA400_NP_OSR_MASK) |
  576. (val << BMA400_NP_OSR_SHIFT));
  577. if (ret) {
  578. dev_err(data->dev, "Failed to write out OSR\n");
  579. return ret;
  580. }
  581. data->oversampling_ratio = val;
  582. return 0;
  583. default:
  584. return -EINVAL;
  585. }
  586. return ret;
  587. }
  588. static int bma400_accel_scale_to_raw(struct bma400_data *data,
  589. unsigned int val)
  590. {
  591. int raw;
  592. if (val == 0)
  593. return -EINVAL;
  594. /* Note this works because BMA400_SCALE_MIN is odd */
  595. raw = __ffs(val);
  596. if (val >> raw != BMA400_SCALE_MIN)
  597. return -EINVAL;
  598. return raw;
  599. }
  600. static int bma400_get_accel_scale(struct bma400_data *data)
  601. {
  602. unsigned int raw_scale;
  603. unsigned int val;
  604. int ret;
  605. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val);
  606. if (ret)
  607. return ret;
  608. raw_scale = (val & BMA400_ACC_SCALE_MASK) >> BMA400_SCALE_SHIFT;
  609. if (raw_scale > BMA400_TWO_BITS_MASK)
  610. return -EINVAL;
  611. data->scale = BMA400_SCALE_MIN << raw_scale;
  612. return 0;
  613. }
  614. static int bma400_set_accel_scale(struct bma400_data *data, unsigned int val)
  615. {
  616. unsigned int acc_config;
  617. int raw;
  618. int ret;
  619. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &acc_config);
  620. if (ret)
  621. return ret;
  622. raw = bma400_accel_scale_to_raw(data, val);
  623. if (raw < 0)
  624. return raw;
  625. ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
  626. (acc_config & ~BMA400_ACC_SCALE_MASK) |
  627. (raw << BMA400_SCALE_SHIFT));
  628. if (ret)
  629. return ret;
  630. data->scale = val;
  631. return 0;
  632. }
  633. static int bma400_get_power_mode(struct bma400_data *data)
  634. {
  635. unsigned int val;
  636. int ret;
  637. ret = regmap_read(data->regmap, BMA400_STATUS_REG, &val);
  638. if (ret) {
  639. dev_err(data->dev, "Failed to read status register\n");
  640. return ret;
  641. }
  642. data->power_mode = (val >> 1) & BMA400_TWO_BITS_MASK;
  643. return 0;
  644. }
  645. static int bma400_set_power_mode(struct bma400_data *data,
  646. enum bma400_power_mode mode)
  647. {
  648. unsigned int val;
  649. int ret;
  650. ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val);
  651. if (ret)
  652. return ret;
  653. if (data->power_mode == mode)
  654. return 0;
  655. if (mode == POWER_MODE_INVALID)
  656. return -EINVAL;
  657. /* Preserve the low-power oversample ratio etc */
  658. ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
  659. mode | (val & ~BMA400_TWO_BITS_MASK));
  660. if (ret) {
  661. dev_err(data->dev, "Failed to write to power-mode\n");
  662. return ret;
  663. }
  664. data->power_mode = mode;
  665. /*
  666. * Update our cached osr and odr based on the new
  667. * power-mode.
  668. */
  669. bma400_get_accel_output_data_rate(data);
  670. bma400_get_accel_oversampling_ratio(data);
  671. return 0;
  672. }
  673. static int bma400_enable_steps(struct bma400_data *data, int val)
  674. {
  675. int ret;
  676. if (data->steps_enabled == val)
  677. return 0;
  678. ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG1_REG,
  679. BMA400_STEP_INT_MSK,
  680. FIELD_PREP(BMA400_STEP_INT_MSK, val ? 1 : 0));
  681. if (ret)
  682. return ret;
  683. data->steps_enabled = val;
  684. return ret;
  685. }
  686. static int bma400_get_steps_reg(struct bma400_data *data, int *val)
  687. {
  688. int ret;
  689. u8 *steps_raw __free(kfree) = kmalloc(BMA400_STEP_RAW_LEN, GFP_KERNEL);
  690. if (!steps_raw)
  691. return -ENOMEM;
  692. ret = regmap_bulk_read(data->regmap, BMA400_STEP_CNT0_REG,
  693. steps_raw, BMA400_STEP_RAW_LEN);
  694. if (ret)
  695. return ret;
  696. *val = get_unaligned_le24(steps_raw);
  697. return IIO_VAL_INT;
  698. }
  699. static void bma400_init_tables(void)
  700. {
  701. int raw;
  702. int i;
  703. for (i = 0; i + 1 < ARRAY_SIZE(bma400_sample_freqs); i += 2) {
  704. raw = (i / 2) + 5;
  705. bma400_output_data_rate_from_raw(raw, &bma400_sample_freqs[i],
  706. &bma400_sample_freqs[i + 1]);
  707. }
  708. for (i = 0; i + 1 < ARRAY_SIZE(bma400_scales); i += 2) {
  709. raw = i / 2;
  710. bma400_scales[i] = 0;
  711. bma400_scales[i + 1] = BMA400_SCALE_MIN << raw;
  712. }
  713. }
  714. static void bma400_power_disable(void *data_ptr)
  715. {
  716. struct bma400_data *data = data_ptr;
  717. int ret;
  718. mutex_lock(&data->mutex);
  719. ret = bma400_set_power_mode(data, POWER_MODE_SLEEP);
  720. mutex_unlock(&data->mutex);
  721. if (ret)
  722. dev_warn(data->dev, "Failed to put device into sleep mode (%pe)\n",
  723. ERR_PTR(ret));
  724. }
  725. static enum iio_modifier bma400_act_to_mod(enum bma400_activity activity)
  726. {
  727. switch (activity) {
  728. case BMA400_STILL:
  729. return IIO_MOD_STILL;
  730. case BMA400_WALKING:
  731. return IIO_MOD_WALKING;
  732. case BMA400_RUNNING:
  733. return IIO_MOD_RUNNING;
  734. default:
  735. return IIO_NO_MOD;
  736. }
  737. }
  738. static int bma400_init(struct bma400_data *data)
  739. {
  740. static const char * const regulator_names[] = { "vdd", "vddio" };
  741. unsigned int val;
  742. int ret;
  743. ret = devm_regulator_bulk_get_enable(data->dev,
  744. ARRAY_SIZE(regulator_names),
  745. regulator_names);
  746. if (ret)
  747. return dev_err_probe(data->dev, ret, "Failed to get regulators\n");
  748. /* Try to read chip_id register. It must return 0x90. */
  749. ret = regmap_read(data->regmap, BMA400_CHIP_ID_REG, &val);
  750. if (ret) {
  751. dev_err(data->dev, "Failed to read chip id register\n");
  752. return ret;
  753. }
  754. if (val != BMA400_ID_REG_VAL) {
  755. dev_err(data->dev, "Chip ID mismatch\n");
  756. return -ENODEV;
  757. }
  758. ret = bma400_get_power_mode(data);
  759. if (ret) {
  760. dev_err(data->dev, "Failed to get the initial power-mode\n");
  761. return ret;
  762. }
  763. if (data->power_mode != POWER_MODE_NORMAL) {
  764. ret = bma400_set_power_mode(data, POWER_MODE_NORMAL);
  765. if (ret) {
  766. dev_err(data->dev, "Failed to wake up the device\n");
  767. return ret;
  768. }
  769. /*
  770. * TODO: The datasheet waits 1500us here in the example, but
  771. * lists 2/ODR as the wakeup time.
  772. */
  773. usleep_range(1500, 2000);
  774. }
  775. ret = devm_add_action_or_reset(data->dev, bma400_power_disable, data);
  776. if (ret)
  777. return ret;
  778. bma400_init_tables();
  779. ret = bma400_get_accel_output_data_rate(data);
  780. if (ret)
  781. return ret;
  782. ret = bma400_get_accel_oversampling_ratio(data);
  783. if (ret)
  784. return ret;
  785. ret = bma400_get_accel_scale(data);
  786. if (ret)
  787. return ret;
  788. /* Configure INT1 pin to open drain */
  789. ret = regmap_write(data->regmap, BMA400_INT_IO_CTRL_REG, 0x06);
  790. if (ret)
  791. return ret;
  792. /*
  793. * Once the interrupt engine is supported we might use the
  794. * data_src_reg, but for now ensure this is set to the
  795. * variable ODR filter selectable by the sample frequency
  796. * channel.
  797. */
  798. return regmap_write(data->regmap, BMA400_ACC_CONFIG2_REG, 0x00);
  799. }
  800. static int bma400_read_raw(struct iio_dev *indio_dev,
  801. struct iio_chan_spec const *chan, int *val,
  802. int *val2, long mask)
  803. {
  804. struct bma400_data *data = iio_priv(indio_dev);
  805. unsigned int activity;
  806. int ret;
  807. switch (mask) {
  808. case IIO_CHAN_INFO_PROCESSED:
  809. switch (chan->type) {
  810. case IIO_TEMP:
  811. mutex_lock(&data->mutex);
  812. ret = bma400_get_temp_reg(data, val, val2);
  813. mutex_unlock(&data->mutex);
  814. return ret;
  815. case IIO_STEPS:
  816. return bma400_get_steps_reg(data, val);
  817. case IIO_ACTIVITY:
  818. ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
  819. &activity);
  820. if (ret)
  821. return ret;
  822. /*
  823. * The device does not support confidence value levels,
  824. * so we will always have 100% for current activity and
  825. * 0% for the others.
  826. */
  827. if (chan->channel2 == bma400_act_to_mod(activity))
  828. *val = 100;
  829. else
  830. *val = 0;
  831. return IIO_VAL_INT;
  832. default:
  833. return -EINVAL;
  834. }
  835. case IIO_CHAN_INFO_RAW:
  836. mutex_lock(&data->mutex);
  837. ret = bma400_get_accel_reg(data, chan, val);
  838. mutex_unlock(&data->mutex);
  839. return ret;
  840. case IIO_CHAN_INFO_SAMP_FREQ:
  841. switch (chan->type) {
  842. case IIO_ACCEL:
  843. if (data->sample_freq.hz < 0)
  844. return -EINVAL;
  845. *val = data->sample_freq.hz;
  846. *val2 = data->sample_freq.uhz;
  847. return IIO_VAL_INT_PLUS_MICRO;
  848. case IIO_TEMP:
  849. /*
  850. * Runs at a fixed sampling frequency. See Section 4.4
  851. * of the datasheet.
  852. */
  853. *val = 6;
  854. *val2 = 250000;
  855. return IIO_VAL_INT_PLUS_MICRO;
  856. default:
  857. return -EINVAL;
  858. }
  859. case IIO_CHAN_INFO_SCALE:
  860. *val = 0;
  861. *val2 = data->scale;
  862. return IIO_VAL_INT_PLUS_MICRO;
  863. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  864. /*
  865. * TODO: We could avoid this logic and returning -EINVAL here if
  866. * we set both the low-power and normal mode OSR registers when
  867. * we configure the device.
  868. */
  869. if (data->oversampling_ratio < 0)
  870. return -EINVAL;
  871. *val = data->oversampling_ratio;
  872. return IIO_VAL_INT;
  873. case IIO_CHAN_INFO_ENABLE:
  874. *val = data->steps_enabled;
  875. return IIO_VAL_INT;
  876. default:
  877. return -EINVAL;
  878. }
  879. }
  880. static int bma400_read_avail(struct iio_dev *indio_dev,
  881. struct iio_chan_spec const *chan,
  882. const int **vals, int *type, int *length,
  883. long mask)
  884. {
  885. switch (mask) {
  886. case IIO_CHAN_INFO_SCALE:
  887. *type = IIO_VAL_INT_PLUS_MICRO;
  888. *vals = bma400_scales;
  889. *length = ARRAY_SIZE(bma400_scales);
  890. return IIO_AVAIL_LIST;
  891. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  892. *type = IIO_VAL_INT;
  893. *vals = bma400_osr_range;
  894. *length = ARRAY_SIZE(bma400_osr_range);
  895. return IIO_AVAIL_RANGE;
  896. case IIO_CHAN_INFO_SAMP_FREQ:
  897. *type = IIO_VAL_INT_PLUS_MICRO;
  898. *vals = bma400_sample_freqs;
  899. *length = ARRAY_SIZE(bma400_sample_freqs);
  900. return IIO_AVAIL_LIST;
  901. default:
  902. return -EINVAL;
  903. }
  904. }
  905. static int bma400_write_raw(struct iio_dev *indio_dev,
  906. struct iio_chan_spec const *chan, int val, int val2,
  907. long mask)
  908. {
  909. struct bma400_data *data = iio_priv(indio_dev);
  910. int ret;
  911. switch (mask) {
  912. case IIO_CHAN_INFO_SAMP_FREQ:
  913. /*
  914. * The sample frequency is readonly for the temperature
  915. * register and a fixed value in low-power mode.
  916. */
  917. if (chan->type != IIO_ACCEL)
  918. return -EINVAL;
  919. mutex_lock(&data->mutex);
  920. ret = bma400_set_accel_output_data_rate(data, val, val2);
  921. mutex_unlock(&data->mutex);
  922. return ret;
  923. case IIO_CHAN_INFO_SCALE:
  924. if (val != 0 ||
  925. val2 < BMA400_SCALE_MIN || val2 > BMA400_SCALE_MAX)
  926. return -EINVAL;
  927. mutex_lock(&data->mutex);
  928. ret = bma400_set_accel_scale(data, val2);
  929. mutex_unlock(&data->mutex);
  930. return ret;
  931. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  932. mutex_lock(&data->mutex);
  933. ret = bma400_set_accel_oversampling_ratio(data, val);
  934. mutex_unlock(&data->mutex);
  935. return ret;
  936. case IIO_CHAN_INFO_ENABLE:
  937. mutex_lock(&data->mutex);
  938. ret = bma400_enable_steps(data, val);
  939. mutex_unlock(&data->mutex);
  940. return ret;
  941. default:
  942. return -EINVAL;
  943. }
  944. }
  945. static int bma400_write_raw_get_fmt(struct iio_dev *indio_dev,
  946. struct iio_chan_spec const *chan,
  947. long mask)
  948. {
  949. switch (mask) {
  950. case IIO_CHAN_INFO_SAMP_FREQ:
  951. return IIO_VAL_INT_PLUS_MICRO;
  952. case IIO_CHAN_INFO_SCALE:
  953. return IIO_VAL_INT_PLUS_MICRO;
  954. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  955. return IIO_VAL_INT;
  956. case IIO_CHAN_INFO_ENABLE:
  957. return IIO_VAL_INT;
  958. default:
  959. return -EINVAL;
  960. }
  961. }
  962. static int bma400_read_event_config(struct iio_dev *indio_dev,
  963. const struct iio_chan_spec *chan,
  964. enum iio_event_type type,
  965. enum iio_event_direction dir)
  966. {
  967. struct bma400_data *data = iio_priv(indio_dev);
  968. switch (chan->type) {
  969. case IIO_ACCEL:
  970. switch (dir) {
  971. case IIO_EV_DIR_RISING:
  972. return FIELD_GET(BMA400_INT_GEN1_MSK,
  973. data->generic_event_en);
  974. case IIO_EV_DIR_FALLING:
  975. return FIELD_GET(BMA400_INT_GEN2_MSK,
  976. data->generic_event_en);
  977. case IIO_EV_DIR_SINGLETAP:
  978. return FIELD_GET(BMA400_S_TAP_MSK,
  979. data->tap_event_en_bitmask);
  980. case IIO_EV_DIR_DOUBLETAP:
  981. return FIELD_GET(BMA400_D_TAP_MSK,
  982. data->tap_event_en_bitmask);
  983. default:
  984. return -EINVAL;
  985. }
  986. case IIO_STEPS:
  987. return data->step_event_en;
  988. case IIO_ACTIVITY:
  989. return data->activity_event_en;
  990. default:
  991. return -EINVAL;
  992. }
  993. }
  994. static int bma400_steps_event_enable(struct bma400_data *data, int state)
  995. {
  996. int ret;
  997. ret = bma400_enable_steps(data, 1);
  998. if (ret)
  999. return ret;
  1000. ret = regmap_update_bits(data->regmap, BMA400_INT12_MAP_REG,
  1001. BMA400_STEP_INT_MSK,
  1002. FIELD_PREP(BMA400_STEP_INT_MSK,
  1003. state));
  1004. if (ret)
  1005. return ret;
  1006. data->step_event_en = state;
  1007. return 0;
  1008. }
  1009. static int bma400_activity_event_en(struct bma400_data *data,
  1010. enum iio_event_direction dir,
  1011. int state)
  1012. {
  1013. int ret, reg, msk, value;
  1014. int field_value = 0;
  1015. switch (dir) {
  1016. case IIO_EV_DIR_RISING:
  1017. reg = BMA400_GEN1INT_CONFIG0;
  1018. msk = BMA400_INT_GEN1_MSK;
  1019. value = 2;
  1020. set_mask_bits(&field_value, BMA400_INT_GEN1_MSK,
  1021. FIELD_PREP(BMA400_INT_GEN1_MSK, state));
  1022. break;
  1023. case IIO_EV_DIR_FALLING:
  1024. reg = BMA400_GEN2INT_CONFIG0;
  1025. msk = BMA400_INT_GEN2_MSK;
  1026. value = 0;
  1027. set_mask_bits(&field_value, BMA400_INT_GEN2_MSK,
  1028. FIELD_PREP(BMA400_INT_GEN2_MSK, state));
  1029. break;
  1030. default:
  1031. return -EINVAL;
  1032. }
  1033. /* Enabling all axis for interrupt evaluation */
  1034. ret = regmap_write(data->regmap, reg, 0xF8);
  1035. if (ret)
  1036. return ret;
  1037. /* OR combination of all axis for interrupt evaluation */
  1038. ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG1_OFF, value);
  1039. if (ret)
  1040. return ret;
  1041. /* Initial value to avoid interrupts while enabling*/
  1042. ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG2_OFF, 0x0A);
  1043. if (ret)
  1044. return ret;
  1045. /* Initial duration value to avoid interrupts while enabling*/
  1046. ret = regmap_write(data->regmap, reg + BMA400_GEN_CONFIG31_OFF, 0x0F);
  1047. if (ret)
  1048. return ret;
  1049. ret = regmap_update_bits(data->regmap, BMA400_INT1_MAP_REG, msk,
  1050. field_value);
  1051. if (ret)
  1052. return ret;
  1053. ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG0_REG, msk,
  1054. field_value);
  1055. if (ret)
  1056. return ret;
  1057. set_mask_bits(&data->generic_event_en, msk, field_value);
  1058. return 0;
  1059. }
  1060. static int bma400_tap_event_en(struct bma400_data *data,
  1061. enum iio_event_direction dir, int state)
  1062. {
  1063. unsigned int mask;
  1064. unsigned int field_value = 0;
  1065. int ret;
  1066. /*
  1067. * Tap interrupts can be configured only in normal mode.
  1068. * See table in section 4.3 "Power modes - performance modes" of
  1069. * datasheet v1.2.
  1070. */
  1071. if (data->power_mode != POWER_MODE_NORMAL)
  1072. return -EINVAL;
  1073. /*
  1074. * Tap interrupts are operating with a data rate of 200Hz.
  1075. * See section 4.7 "Tap sensing interrupt" in datasheet v1.2.
  1076. */
  1077. if (data->sample_freq.hz != 200 && state) {
  1078. dev_err(data->dev, "Invalid data rate for tap interrupts.\n");
  1079. return -EINVAL;
  1080. }
  1081. ret = regmap_update_bits(data->regmap, BMA400_INT12_MAP_REG,
  1082. BMA400_S_TAP_MSK,
  1083. FIELD_PREP(BMA400_S_TAP_MSK, state));
  1084. if (ret)
  1085. return ret;
  1086. switch (dir) {
  1087. case IIO_EV_DIR_SINGLETAP:
  1088. mask = BMA400_S_TAP_MSK;
  1089. set_mask_bits(&field_value, BMA400_S_TAP_MSK,
  1090. FIELD_PREP(BMA400_S_TAP_MSK, state));
  1091. break;
  1092. case IIO_EV_DIR_DOUBLETAP:
  1093. mask = BMA400_D_TAP_MSK;
  1094. set_mask_bits(&field_value, BMA400_D_TAP_MSK,
  1095. FIELD_PREP(BMA400_D_TAP_MSK, state));
  1096. break;
  1097. default:
  1098. return -EINVAL;
  1099. }
  1100. ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG1_REG, mask,
  1101. field_value);
  1102. if (ret)
  1103. return ret;
  1104. set_mask_bits(&data->tap_event_en_bitmask, mask, field_value);
  1105. return 0;
  1106. }
  1107. static int bma400_disable_adv_interrupt(struct bma400_data *data)
  1108. {
  1109. int ret;
  1110. ret = regmap_write(data->regmap, BMA400_INT_CONFIG0_REG, 0);
  1111. if (ret)
  1112. return ret;
  1113. ret = regmap_write(data->regmap, BMA400_INT_CONFIG1_REG, 0);
  1114. if (ret)
  1115. return ret;
  1116. data->tap_event_en_bitmask = 0;
  1117. data->generic_event_en = 0;
  1118. data->step_event_en = false;
  1119. data->activity_event_en = false;
  1120. return 0;
  1121. }
  1122. static int bma400_write_event_config(struct iio_dev *indio_dev,
  1123. const struct iio_chan_spec *chan,
  1124. enum iio_event_type type,
  1125. enum iio_event_direction dir, int state)
  1126. {
  1127. struct bma400_data *data = iio_priv(indio_dev);
  1128. int ret;
  1129. switch (chan->type) {
  1130. case IIO_ACCEL:
  1131. switch (type) {
  1132. case IIO_EV_TYPE_MAG:
  1133. mutex_lock(&data->mutex);
  1134. ret = bma400_activity_event_en(data, dir, state);
  1135. mutex_unlock(&data->mutex);
  1136. return ret;
  1137. case IIO_EV_TYPE_GESTURE:
  1138. mutex_lock(&data->mutex);
  1139. ret = bma400_tap_event_en(data, dir, state);
  1140. mutex_unlock(&data->mutex);
  1141. return ret;
  1142. default:
  1143. return -EINVAL;
  1144. }
  1145. case IIO_STEPS:
  1146. mutex_lock(&data->mutex);
  1147. ret = bma400_steps_event_enable(data, state);
  1148. mutex_unlock(&data->mutex);
  1149. return ret;
  1150. case IIO_ACTIVITY:
  1151. mutex_lock(&data->mutex);
  1152. if (!data->step_event_en) {
  1153. ret = bma400_steps_event_enable(data, true);
  1154. if (ret) {
  1155. mutex_unlock(&data->mutex);
  1156. return ret;
  1157. }
  1158. }
  1159. data->activity_event_en = state;
  1160. mutex_unlock(&data->mutex);
  1161. return 0;
  1162. default:
  1163. return -EINVAL;
  1164. }
  1165. }
  1166. static int get_gen_config_reg(enum iio_event_direction dir)
  1167. {
  1168. switch (dir) {
  1169. case IIO_EV_DIR_FALLING:
  1170. return BMA400_GEN2INT_CONFIG0;
  1171. case IIO_EV_DIR_RISING:
  1172. return BMA400_GEN1INT_CONFIG0;
  1173. default:
  1174. return -EINVAL;
  1175. }
  1176. }
  1177. static int bma400_read_event_value(struct iio_dev *indio_dev,
  1178. const struct iio_chan_spec *chan,
  1179. enum iio_event_type type,
  1180. enum iio_event_direction dir,
  1181. enum iio_event_info info,
  1182. int *val, int *val2)
  1183. {
  1184. struct bma400_data *data = iio_priv(indio_dev);
  1185. int ret, reg, reg_val, raw;
  1186. if (chan->type != IIO_ACCEL)
  1187. return -EINVAL;
  1188. switch (type) {
  1189. case IIO_EV_TYPE_MAG:
  1190. reg = get_gen_config_reg(dir);
  1191. if (reg < 0)
  1192. return -EINVAL;
  1193. *val2 = 0;
  1194. switch (info) {
  1195. case IIO_EV_INFO_VALUE:
  1196. ret = regmap_read(data->regmap,
  1197. reg + BMA400_GEN_CONFIG2_OFF,
  1198. val);
  1199. if (ret)
  1200. return ret;
  1201. return IIO_VAL_INT;
  1202. case IIO_EV_INFO_PERIOD:
  1203. mutex_lock(&data->mutex);
  1204. ret = regmap_bulk_read(data->regmap,
  1205. reg + BMA400_GEN_CONFIG3_OFF,
  1206. &data->duration,
  1207. sizeof(data->duration));
  1208. if (ret) {
  1209. mutex_unlock(&data->mutex);
  1210. return ret;
  1211. }
  1212. *val = be16_to_cpu(data->duration);
  1213. mutex_unlock(&data->mutex);
  1214. return IIO_VAL_INT;
  1215. case IIO_EV_INFO_HYSTERESIS:
  1216. ret = regmap_read(data->regmap, reg, val);
  1217. if (ret)
  1218. return ret;
  1219. *val = FIELD_GET(BMA400_GEN_HYST_MSK, *val);
  1220. return IIO_VAL_INT;
  1221. default:
  1222. return -EINVAL;
  1223. }
  1224. case IIO_EV_TYPE_GESTURE:
  1225. switch (info) {
  1226. case IIO_EV_INFO_VALUE:
  1227. ret = regmap_read(data->regmap, BMA400_TAP_CONFIG,
  1228. &reg_val);
  1229. if (ret)
  1230. return ret;
  1231. *val = FIELD_GET(BMA400_TAP_SEN_MSK, reg_val);
  1232. return IIO_VAL_INT;
  1233. case IIO_EV_INFO_RESET_TIMEOUT:
  1234. ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1,
  1235. &reg_val);
  1236. if (ret)
  1237. return ret;
  1238. raw = FIELD_GET(BMA400_TAP_QUIET_MSK, reg_val);
  1239. *val = 0;
  1240. *val2 = tap_reset_timeout[raw];
  1241. return IIO_VAL_INT_PLUS_MICRO;
  1242. case IIO_EV_INFO_TAP2_MIN_DELAY:
  1243. ret = regmap_read(data->regmap, BMA400_TAP_CONFIG1,
  1244. &reg_val);
  1245. if (ret)
  1246. return ret;
  1247. raw = FIELD_GET(BMA400_TAP_QUIETDT_MSK, reg_val);
  1248. *val = 0;
  1249. *val2 = double_tap2_min_delay[raw];
  1250. return IIO_VAL_INT_PLUS_MICRO;
  1251. default:
  1252. return -EINVAL;
  1253. }
  1254. default:
  1255. return -EINVAL;
  1256. }
  1257. }
  1258. static int bma400_write_event_value(struct iio_dev *indio_dev,
  1259. const struct iio_chan_spec *chan,
  1260. enum iio_event_type type,
  1261. enum iio_event_direction dir,
  1262. enum iio_event_info info,
  1263. int val, int val2)
  1264. {
  1265. struct bma400_data *data = iio_priv(indio_dev);
  1266. int reg, ret, raw;
  1267. if (chan->type != IIO_ACCEL)
  1268. return -EINVAL;
  1269. switch (type) {
  1270. case IIO_EV_TYPE_MAG:
  1271. reg = get_gen_config_reg(dir);
  1272. if (reg < 0)
  1273. return -EINVAL;
  1274. switch (info) {
  1275. case IIO_EV_INFO_VALUE:
  1276. if (val < 1 || val > 255)
  1277. return -EINVAL;
  1278. return regmap_write(data->regmap,
  1279. reg + BMA400_GEN_CONFIG2_OFF,
  1280. val);
  1281. case IIO_EV_INFO_PERIOD:
  1282. if (val < 1 || val > 65535)
  1283. return -EINVAL;
  1284. mutex_lock(&data->mutex);
  1285. put_unaligned_be16(val, &data->duration);
  1286. ret = regmap_bulk_write(data->regmap,
  1287. reg + BMA400_GEN_CONFIG3_OFF,
  1288. &data->duration,
  1289. sizeof(data->duration));
  1290. mutex_unlock(&data->mutex);
  1291. return ret;
  1292. case IIO_EV_INFO_HYSTERESIS:
  1293. if (val < 0 || val > 3)
  1294. return -EINVAL;
  1295. return regmap_update_bits(data->regmap, reg,
  1296. BMA400_GEN_HYST_MSK,
  1297. FIELD_PREP(BMA400_GEN_HYST_MSK,
  1298. val));
  1299. default:
  1300. return -EINVAL;
  1301. }
  1302. case IIO_EV_TYPE_GESTURE:
  1303. switch (info) {
  1304. case IIO_EV_INFO_VALUE:
  1305. if (val < 0 || val > 7)
  1306. return -EINVAL;
  1307. return regmap_update_bits(data->regmap,
  1308. BMA400_TAP_CONFIG,
  1309. BMA400_TAP_SEN_MSK,
  1310. FIELD_PREP(BMA400_TAP_SEN_MSK,
  1311. val));
  1312. case IIO_EV_INFO_RESET_TIMEOUT:
  1313. raw = usec_to_tapreg_raw(val2, tap_reset_timeout);
  1314. if (raw < 0)
  1315. return -EINVAL;
  1316. return regmap_update_bits(data->regmap,
  1317. BMA400_TAP_CONFIG1,
  1318. BMA400_TAP_QUIET_MSK,
  1319. FIELD_PREP(BMA400_TAP_QUIET_MSK,
  1320. raw));
  1321. case IIO_EV_INFO_TAP2_MIN_DELAY:
  1322. raw = usec_to_tapreg_raw(val2, double_tap2_min_delay);
  1323. if (raw < 0)
  1324. return -EINVAL;
  1325. return regmap_update_bits(data->regmap,
  1326. BMA400_TAP_CONFIG1,
  1327. BMA400_TAP_QUIETDT_MSK,
  1328. FIELD_PREP(BMA400_TAP_QUIETDT_MSK,
  1329. raw));
  1330. default:
  1331. return -EINVAL;
  1332. }
  1333. default:
  1334. return -EINVAL;
  1335. }
  1336. }
  1337. static int bma400_data_rdy_trigger_set_state(struct iio_trigger *trig,
  1338. bool state)
  1339. {
  1340. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  1341. struct bma400_data *data = iio_priv(indio_dev);
  1342. int ret;
  1343. ret = regmap_update_bits(data->regmap, BMA400_INT_CONFIG0_REG,
  1344. BMA400_INT_DRDY_MSK,
  1345. FIELD_PREP(BMA400_INT_DRDY_MSK, state));
  1346. if (ret)
  1347. return ret;
  1348. return regmap_update_bits(data->regmap, BMA400_INT1_MAP_REG,
  1349. BMA400_INT_DRDY_MSK,
  1350. FIELD_PREP(BMA400_INT_DRDY_MSK, state));
  1351. }
  1352. static const unsigned long bma400_avail_scan_masks[] = {
  1353. BIT(BMA400_ACCL_X) | BIT(BMA400_ACCL_Y) | BIT(BMA400_ACCL_Z),
  1354. BIT(BMA400_ACCL_X) | BIT(BMA400_ACCL_Y) | BIT(BMA400_ACCL_Z)
  1355. | BIT(BMA400_TEMP),
  1356. 0
  1357. };
  1358. static const struct iio_info bma400_info = {
  1359. .read_raw = bma400_read_raw,
  1360. .read_avail = bma400_read_avail,
  1361. .write_raw = bma400_write_raw,
  1362. .write_raw_get_fmt = bma400_write_raw_get_fmt,
  1363. .read_event_config = bma400_read_event_config,
  1364. .write_event_config = bma400_write_event_config,
  1365. .write_event_value = bma400_write_event_value,
  1366. .read_event_value = bma400_read_event_value,
  1367. .event_attrs = &bma400_event_attribute_group,
  1368. };
  1369. static const struct iio_trigger_ops bma400_trigger_ops = {
  1370. .set_trigger_state = &bma400_data_rdy_trigger_set_state,
  1371. .validate_device = &iio_trigger_validate_own_device,
  1372. };
  1373. static irqreturn_t bma400_trigger_handler(int irq, void *p)
  1374. {
  1375. struct iio_poll_func *pf = p;
  1376. struct iio_dev *indio_dev = pf->indio_dev;
  1377. struct bma400_data *data = iio_priv(indio_dev);
  1378. int ret, temp;
  1379. /* Lock to protect the data->buffer */
  1380. mutex_lock(&data->mutex);
  1381. /* bulk read six registers, with the base being the LSB register */
  1382. ret = regmap_bulk_read(data->regmap, BMA400_X_AXIS_LSB_REG,
  1383. &data->buffer.buff, sizeof(data->buffer.buff));
  1384. if (ret)
  1385. goto unlock_err;
  1386. if (test_bit(BMA400_TEMP, indio_dev->active_scan_mask)) {
  1387. ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &temp);
  1388. if (ret)
  1389. goto unlock_err;
  1390. data->buffer.temperature = temp;
  1391. }
  1392. iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
  1393. iio_get_time_ns(indio_dev));
  1394. mutex_unlock(&data->mutex);
  1395. iio_trigger_notify_done(indio_dev->trig);
  1396. return IRQ_HANDLED;
  1397. unlock_err:
  1398. mutex_unlock(&data->mutex);
  1399. return IRQ_NONE;
  1400. }
  1401. static irqreturn_t bma400_interrupt(int irq, void *private)
  1402. {
  1403. struct iio_dev *indio_dev = private;
  1404. struct bma400_data *data = iio_priv(indio_dev);
  1405. s64 timestamp = iio_get_time_ns(indio_dev);
  1406. unsigned int act, ev_dir = IIO_EV_DIR_NONE;
  1407. int ret;
  1408. /* Lock to protect the data->status */
  1409. mutex_lock(&data->mutex);
  1410. ret = regmap_bulk_read(data->regmap, BMA400_INT_STAT0_REG,
  1411. &data->status,
  1412. sizeof(data->status));
  1413. /*
  1414. * if none of the bit is set in the status register then it is
  1415. * spurious interrupt.
  1416. */
  1417. if (ret || !data->status)
  1418. goto unlock_err;
  1419. /*
  1420. * Disable all advance interrupts if interrupt engine overrun occurs.
  1421. * See section 4.7 "Interrupt engine overrun" in datasheet v1.2.
  1422. */
  1423. if (FIELD_GET(BMA400_INT_ENG_OVRUN_MSK, le16_to_cpu(data->status))) {
  1424. bma400_disable_adv_interrupt(data);
  1425. dev_err(data->dev, "Interrupt engine overrun\n");
  1426. goto unlock_err;
  1427. }
  1428. if (FIELD_GET(BMA400_INT_S_TAP_MSK, le16_to_cpu(data->status)))
  1429. iio_push_event(indio_dev,
  1430. IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
  1431. IIO_MOD_X_OR_Y_OR_Z,
  1432. IIO_EV_TYPE_GESTURE,
  1433. IIO_EV_DIR_SINGLETAP),
  1434. timestamp);
  1435. if (FIELD_GET(BMA400_INT_D_TAP_MSK, le16_to_cpu(data->status)))
  1436. iio_push_event(indio_dev,
  1437. IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
  1438. IIO_MOD_X_OR_Y_OR_Z,
  1439. IIO_EV_TYPE_GESTURE,
  1440. IIO_EV_DIR_DOUBLETAP),
  1441. timestamp);
  1442. if (FIELD_GET(BMA400_INT_GEN1_MSK, le16_to_cpu(data->status)))
  1443. ev_dir = IIO_EV_DIR_RISING;
  1444. if (FIELD_GET(BMA400_INT_GEN2_MSK, le16_to_cpu(data->status)))
  1445. ev_dir = IIO_EV_DIR_FALLING;
  1446. if (ev_dir != IIO_EV_DIR_NONE) {
  1447. iio_push_event(indio_dev,
  1448. IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
  1449. IIO_MOD_X_OR_Y_OR_Z,
  1450. IIO_EV_TYPE_MAG, ev_dir),
  1451. timestamp);
  1452. }
  1453. if (FIELD_GET(BMA400_STEP_STAT_MASK, le16_to_cpu(data->status))) {
  1454. iio_push_event(indio_dev,
  1455. IIO_MOD_EVENT_CODE(IIO_STEPS, 0, IIO_NO_MOD,
  1456. IIO_EV_TYPE_CHANGE,
  1457. IIO_EV_DIR_NONE),
  1458. timestamp);
  1459. if (data->activity_event_en) {
  1460. ret = regmap_read(data->regmap, BMA400_STEP_STAT_REG,
  1461. &act);
  1462. if (ret)
  1463. goto unlock_err;
  1464. iio_push_event(indio_dev,
  1465. IIO_MOD_EVENT_CODE(IIO_ACTIVITY, 0,
  1466. bma400_act_to_mod(act),
  1467. IIO_EV_TYPE_CHANGE,
  1468. IIO_EV_DIR_NONE),
  1469. timestamp);
  1470. }
  1471. }
  1472. if (FIELD_GET(BMA400_INT_DRDY_MSK, le16_to_cpu(data->status))) {
  1473. mutex_unlock(&data->mutex);
  1474. iio_trigger_poll_nested(data->trig);
  1475. return IRQ_HANDLED;
  1476. }
  1477. mutex_unlock(&data->mutex);
  1478. return IRQ_HANDLED;
  1479. unlock_err:
  1480. mutex_unlock(&data->mutex);
  1481. return IRQ_NONE;
  1482. }
  1483. int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
  1484. const char *name)
  1485. {
  1486. struct iio_dev *indio_dev;
  1487. struct bma400_data *data;
  1488. int ret;
  1489. indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
  1490. if (!indio_dev)
  1491. return -ENOMEM;
  1492. data = iio_priv(indio_dev);
  1493. data->regmap = regmap;
  1494. data->dev = dev;
  1495. ret = bma400_init(data);
  1496. if (ret)
  1497. return ret;
  1498. ret = iio_read_mount_matrix(dev, &data->orientation);
  1499. if (ret)
  1500. return ret;
  1501. mutex_init(&data->mutex);
  1502. indio_dev->name = name;
  1503. indio_dev->info = &bma400_info;
  1504. indio_dev->channels = bma400_channels;
  1505. indio_dev->num_channels = ARRAY_SIZE(bma400_channels);
  1506. indio_dev->available_scan_masks = bma400_avail_scan_masks;
  1507. indio_dev->modes = INDIO_DIRECT_MODE;
  1508. if (irq > 0) {
  1509. data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
  1510. indio_dev->name,
  1511. iio_device_id(indio_dev));
  1512. if (!data->trig)
  1513. return -ENOMEM;
  1514. data->trig->ops = &bma400_trigger_ops;
  1515. iio_trigger_set_drvdata(data->trig, indio_dev);
  1516. ret = devm_iio_trigger_register(data->dev, data->trig);
  1517. if (ret)
  1518. return dev_err_probe(data->dev, ret,
  1519. "iio trigger register fail\n");
  1520. indio_dev->trig = iio_trigger_get(data->trig);
  1521. ret = devm_request_threaded_irq(dev, irq, NULL,
  1522. &bma400_interrupt,
  1523. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  1524. indio_dev->name, indio_dev);
  1525. if (ret)
  1526. return dev_err_probe(data->dev, ret,
  1527. "request irq %d failed\n", irq);
  1528. }
  1529. ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
  1530. &bma400_trigger_handler, NULL);
  1531. if (ret)
  1532. return dev_err_probe(data->dev, ret,
  1533. "iio triggered buffer setup failed\n");
  1534. return devm_iio_device_register(dev, indio_dev);
  1535. }
  1536. EXPORT_SYMBOL_NS(bma400_probe, IIO_BMA400);
  1537. MODULE_AUTHOR("Dan Robertson <dan@dlrobertson.com>");
  1538. MODULE_AUTHOR("Jagath Jog J <jagathjog1996@gmail.com>");
  1539. MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor core");
  1540. MODULE_LICENSE("GPL");