ad7091r8.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Analog Devices AD7091R8 12-bit SAR ADC driver
  4. *
  5. * Copyright 2023 Analog Devices Inc.
  6. */
  7. #include <linux/bitfield.h>
  8. #include <linux/iio/iio.h>
  9. #include <linux/module.h>
  10. #include <linux/regmap.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/spi/spi.h>
  13. #include "ad7091r-base.h"
  14. #define AD7091R8_REG_ADDR_MSK GENMASK(15, 11)
  15. #define AD7091R8_RD_WR_FLAG_MSK BIT(10)
  16. #define AD7091R8_REG_DATA_MSK GENMASK(9, 0)
  17. #define AD7091R_SPI_REGMAP_CONFIG(n) { \
  18. .reg_bits = 8, \
  19. .val_bits = 16, \
  20. .volatile_reg = ad7091r_volatile_reg, \
  21. .writeable_reg = ad7091r_writeable_reg, \
  22. .max_register = AD7091R_REG_CH_HYSTERESIS(n), \
  23. }
  24. static int ad7091r8_set_mode(struct ad7091r_state *st, enum ad7091r_mode mode)
  25. {
  26. /* AD7091R-2/-4/-8 don't set sample/command/autocycle mode in conf reg */
  27. st->mode = mode;
  28. return 0;
  29. }
  30. static unsigned int ad7091r8_reg_result_chan_id(unsigned int val)
  31. {
  32. return AD7091R8_REG_RESULT_CH_ID(val);
  33. }
  34. #define AD7091R_SPI_CHIP_INFO(_n, _name) { \
  35. .name = _name, \
  36. .channels = ad7091r##_n##_channels, \
  37. .num_channels = ARRAY_SIZE(ad7091r##_n##_channels), \
  38. .vref_mV = 2500, \
  39. .reg_result_chan_id = &ad7091r8_reg_result_chan_id, \
  40. .set_mode = &ad7091r8_set_mode, \
  41. }
  42. #define AD7091R_SPI_CHIP_INFO_IRQ(_n, _name) { \
  43. .name = _name, \
  44. .channels = ad7091r##_n##_channels_irq, \
  45. .num_channels = ARRAY_SIZE(ad7091r##_n##_channels_irq), \
  46. .vref_mV = 2500, \
  47. .reg_result_chan_id = &ad7091r8_reg_result_chan_id, \
  48. .set_mode = &ad7091r8_set_mode, \
  49. }
  50. enum ad7091r8_info_ids {
  51. AD7091R2_INFO,
  52. AD7091R4_INFO,
  53. AD7091R4_INFO_IRQ,
  54. AD7091R8_INFO,
  55. AD7091R8_INFO_IRQ,
  56. };
  57. static const struct iio_chan_spec ad7091r2_channels[] = {
  58. AD7091R_CHANNEL(0, 12, NULL, 0),
  59. AD7091R_CHANNEL(1, 12, NULL, 0),
  60. };
  61. static const struct iio_chan_spec ad7091r4_channels[] = {
  62. AD7091R_CHANNEL(0, 12, NULL, 0),
  63. AD7091R_CHANNEL(1, 12, NULL, 0),
  64. AD7091R_CHANNEL(2, 12, NULL, 0),
  65. AD7091R_CHANNEL(3, 12, NULL, 0),
  66. };
  67. static const struct iio_chan_spec ad7091r4_channels_irq[] = {
  68. AD7091R_CHANNEL(0, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  69. AD7091R_CHANNEL(1, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  70. AD7091R_CHANNEL(2, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  71. AD7091R_CHANNEL(3, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  72. };
  73. static const struct iio_chan_spec ad7091r8_channels[] = {
  74. AD7091R_CHANNEL(0, 12, NULL, 0),
  75. AD7091R_CHANNEL(1, 12, NULL, 0),
  76. AD7091R_CHANNEL(2, 12, NULL, 0),
  77. AD7091R_CHANNEL(3, 12, NULL, 0),
  78. AD7091R_CHANNEL(4, 12, NULL, 0),
  79. AD7091R_CHANNEL(5, 12, NULL, 0),
  80. AD7091R_CHANNEL(6, 12, NULL, 0),
  81. AD7091R_CHANNEL(7, 12, NULL, 0),
  82. };
  83. static const struct iio_chan_spec ad7091r8_channels_irq[] = {
  84. AD7091R_CHANNEL(0, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  85. AD7091R_CHANNEL(1, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  86. AD7091R_CHANNEL(2, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  87. AD7091R_CHANNEL(3, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  88. AD7091R_CHANNEL(4, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  89. AD7091R_CHANNEL(5, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  90. AD7091R_CHANNEL(6, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  91. AD7091R_CHANNEL(7, 12, ad7091r_events, ARRAY_SIZE(ad7091r_events)),
  92. };
  93. static void ad7091r_pulse_convst(struct ad7091r_state *st)
  94. {
  95. gpiod_set_value_cansleep(st->convst_gpio, 1);
  96. gpiod_set_value_cansleep(st->convst_gpio, 0);
  97. }
  98. static int ad7091r_regmap_bus_reg_read(void *context, unsigned int reg,
  99. unsigned int *val)
  100. {
  101. struct ad7091r_state *st = context;
  102. struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
  103. int ret;
  104. struct spi_transfer t[] = {
  105. {
  106. .tx_buf = &st->tx_buf,
  107. .len = 2,
  108. .cs_change = 1,
  109. }, {
  110. .rx_buf = &st->rx_buf,
  111. .len = 2,
  112. }
  113. };
  114. if (reg == AD7091R_REG_RESULT)
  115. ad7091r_pulse_convst(st);
  116. st->tx_buf = cpu_to_be16(reg << 11);
  117. ret = spi_sync_transfer(spi, t, ARRAY_SIZE(t));
  118. if (ret < 0)
  119. return ret;
  120. *val = be16_to_cpu(st->rx_buf);
  121. return 0;
  122. }
  123. static int ad7091r_regmap_bus_reg_write(void *context, unsigned int reg,
  124. unsigned int val)
  125. {
  126. struct ad7091r_state *st = context;
  127. struct spi_device *spi = container_of(st->dev, struct spi_device, dev);
  128. /*
  129. * AD7091R-2/-4/-8 protocol (datasheet page 31) is to do a single SPI
  130. * transfer with reg address set in bits B15:B11 and value set in B9:B0.
  131. */
  132. st->tx_buf = cpu_to_be16(FIELD_PREP(AD7091R8_REG_DATA_MSK, val) |
  133. FIELD_PREP(AD7091R8_RD_WR_FLAG_MSK, 1) |
  134. FIELD_PREP(AD7091R8_REG_ADDR_MSK, reg));
  135. return spi_write(spi, &st->tx_buf, 2);
  136. }
  137. static const struct regmap_bus ad7091r8_regmap_bus = {
  138. .reg_read = ad7091r_regmap_bus_reg_read,
  139. .reg_write = ad7091r_regmap_bus_reg_write,
  140. .reg_format_endian_default = REGMAP_ENDIAN_BIG,
  141. .val_format_endian_default = REGMAP_ENDIAN_BIG,
  142. };
  143. static const struct ad7091r_chip_info ad7091r8_infos[] = {
  144. [AD7091R2_INFO] = AD7091R_SPI_CHIP_INFO(2, "ad7091r-2"),
  145. [AD7091R4_INFO] = AD7091R_SPI_CHIP_INFO(4, "ad7091r-4"),
  146. [AD7091R4_INFO_IRQ] = AD7091R_SPI_CHIP_INFO_IRQ(4, "ad7091r-4"),
  147. [AD7091R8_INFO] = AD7091R_SPI_CHIP_INFO(8, "ad7091r-8"),
  148. [AD7091R8_INFO_IRQ] = AD7091R_SPI_CHIP_INFO_IRQ(8, "ad7091r-8")
  149. };
  150. static const struct regmap_config ad7091r2_reg_conf = AD7091R_SPI_REGMAP_CONFIG(2);
  151. static const struct regmap_config ad7091r4_reg_conf = AD7091R_SPI_REGMAP_CONFIG(4);
  152. static const struct regmap_config ad7091r8_reg_conf = AD7091R_SPI_REGMAP_CONFIG(8);
  153. static void ad7091r8_regmap_init(struct ad7091r_state *st,
  154. const struct regmap_config *regmap_conf)
  155. {
  156. st->map = devm_regmap_init(st->dev, &ad7091r8_regmap_bus, st,
  157. regmap_conf);
  158. }
  159. static int ad7091r8_gpio_setup(struct ad7091r_state *st)
  160. {
  161. st->convst_gpio = devm_gpiod_get(st->dev, "convst", GPIOD_OUT_LOW);
  162. if (IS_ERR(st->convst_gpio))
  163. return dev_err_probe(st->dev, PTR_ERR(st->convst_gpio),
  164. "Error getting convst GPIO\n");
  165. st->reset_gpio = devm_gpiod_get_optional(st->dev, "reset",
  166. GPIOD_OUT_HIGH);
  167. if (IS_ERR(st->reset_gpio))
  168. return dev_err_probe(st->dev, PTR_ERR(st->reset_gpio),
  169. "Error on requesting reset GPIO\n");
  170. if (st->reset_gpio) {
  171. fsleep(20);
  172. gpiod_set_value_cansleep(st->reset_gpio, 0);
  173. }
  174. return 0;
  175. }
  176. static struct ad7091r_init_info ad7091r2_init_info = {
  177. .info_no_irq = &ad7091r8_infos[AD7091R2_INFO],
  178. .regmap_config = &ad7091r2_reg_conf,
  179. .init_adc_regmap = &ad7091r8_regmap_init,
  180. .setup = &ad7091r8_gpio_setup
  181. };
  182. static struct ad7091r_init_info ad7091r4_init_info = {
  183. .info_no_irq = &ad7091r8_infos[AD7091R4_INFO],
  184. .info_irq = &ad7091r8_infos[AD7091R4_INFO_IRQ],
  185. .regmap_config = &ad7091r4_reg_conf,
  186. .init_adc_regmap = &ad7091r8_regmap_init,
  187. .setup = &ad7091r8_gpio_setup
  188. };
  189. static struct ad7091r_init_info ad7091r8_init_info = {
  190. .info_no_irq = &ad7091r8_infos[AD7091R8_INFO],
  191. .info_irq = &ad7091r8_infos[AD7091R8_INFO_IRQ],
  192. .regmap_config = &ad7091r8_reg_conf,
  193. .init_adc_regmap = &ad7091r8_regmap_init,
  194. .setup = &ad7091r8_gpio_setup
  195. };
  196. static int ad7091r8_spi_probe(struct spi_device *spi)
  197. {
  198. const struct ad7091r_init_info *init_info;
  199. init_info = spi_get_device_match_data(spi);
  200. if (!init_info)
  201. return -EINVAL;
  202. return ad7091r_probe(&spi->dev, init_info, spi->irq);
  203. }
  204. static const struct of_device_id ad7091r8_of_match[] = {
  205. { .compatible = "adi,ad7091r2", .data = &ad7091r2_init_info },
  206. { .compatible = "adi,ad7091r4", .data = &ad7091r4_init_info },
  207. { .compatible = "adi,ad7091r8", .data = &ad7091r8_init_info },
  208. { }
  209. };
  210. MODULE_DEVICE_TABLE(of, ad7091r8_of_match);
  211. static const struct spi_device_id ad7091r8_spi_id[] = {
  212. { "ad7091r2", (kernel_ulong_t)&ad7091r2_init_info },
  213. { "ad7091r4", (kernel_ulong_t)&ad7091r4_init_info },
  214. { "ad7091r8", (kernel_ulong_t)&ad7091r8_init_info },
  215. { }
  216. };
  217. MODULE_DEVICE_TABLE(spi, ad7091r8_spi_id);
  218. static struct spi_driver ad7091r8_driver = {
  219. .driver = {
  220. .name = "ad7091r8",
  221. .of_match_table = ad7091r8_of_match,
  222. },
  223. .probe = ad7091r8_spi_probe,
  224. .id_table = ad7091r8_spi_id,
  225. };
  226. module_spi_driver(ad7091r8_driver);
  227. MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt@analog.com>");
  228. MODULE_DESCRIPTION("Analog Devices AD7091R8 ADC driver");
  229. MODULE_LICENSE("GPL");
  230. MODULE_IMPORT_NS(IIO_AD7091R);