ad7606.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * AD7606 SPI ADC driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. */
  7. #include <linux/delay.h>
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/property.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/sched.h>
  17. #include <linux/slab.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/util_macros.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/buffer.h>
  22. #include <linux/iio/sysfs.h>
  23. #include <linux/iio/trigger.h>
  24. #include <linux/iio/triggered_buffer.h>
  25. #include <linux/iio/trigger_consumer.h>
  26. #include "ad7606.h"
  27. /*
  28. * Scales are computed as 5000/32768 and 10000/32768 respectively,
  29. * so that when applied to the raw values they provide mV values
  30. */
  31. static const unsigned int ad7606_scale_avail[2] = {
  32. 152588, 305176
  33. };
  34. static const unsigned int ad7616_sw_scale_avail[3] = {
  35. 76293, 152588, 305176
  36. };
  37. static const unsigned int ad7606_oversampling_avail[7] = {
  38. 1, 2, 4, 8, 16, 32, 64,
  39. };
  40. static const unsigned int ad7616_oversampling_avail[8] = {
  41. 1, 2, 4, 8, 16, 32, 64, 128,
  42. };
  43. int ad7606_reset(struct ad7606_state *st)
  44. {
  45. if (st->gpio_reset) {
  46. gpiod_set_value(st->gpio_reset, 1);
  47. ndelay(100); /* t_reset >= 100ns */
  48. gpiod_set_value(st->gpio_reset, 0);
  49. return 0;
  50. }
  51. return -ENODEV;
  52. }
  53. EXPORT_SYMBOL_NS_GPL(ad7606_reset, IIO_AD7606);
  54. static int ad7606_reg_access(struct iio_dev *indio_dev,
  55. unsigned int reg,
  56. unsigned int writeval,
  57. unsigned int *readval)
  58. {
  59. struct ad7606_state *st = iio_priv(indio_dev);
  60. int ret;
  61. guard(mutex)(&st->lock);
  62. if (readval) {
  63. ret = st->bops->reg_read(st, reg);
  64. if (ret < 0)
  65. return ret;
  66. *readval = ret;
  67. return 0;
  68. } else {
  69. return st->bops->reg_write(st, reg, writeval);
  70. }
  71. }
  72. static int ad7606_read_samples(struct ad7606_state *st)
  73. {
  74. unsigned int num = st->chip_info->num_channels - 1;
  75. u16 *data = st->data;
  76. return st->bops->read_block(st->dev, num, data);
  77. }
  78. static irqreturn_t ad7606_trigger_handler(int irq, void *p)
  79. {
  80. struct iio_poll_func *pf = p;
  81. struct iio_dev *indio_dev = pf->indio_dev;
  82. struct ad7606_state *st = iio_priv(indio_dev);
  83. int ret;
  84. guard(mutex)(&st->lock);
  85. ret = ad7606_read_samples(st);
  86. if (ret)
  87. goto error_ret;
  88. iio_push_to_buffers_with_timestamp(indio_dev, st->data,
  89. iio_get_time_ns(indio_dev));
  90. error_ret:
  91. iio_trigger_notify_done(indio_dev->trig);
  92. /* The rising edge of the CONVST signal starts a new conversion. */
  93. gpiod_set_value(st->gpio_convst, 1);
  94. return IRQ_HANDLED;
  95. }
  96. static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
  97. {
  98. struct ad7606_state *st = iio_priv(indio_dev);
  99. int ret;
  100. gpiod_set_value(st->gpio_convst, 1);
  101. ret = wait_for_completion_timeout(&st->completion,
  102. msecs_to_jiffies(1000));
  103. if (!ret) {
  104. ret = -ETIMEDOUT;
  105. goto error_ret;
  106. }
  107. ret = ad7606_read_samples(st);
  108. if (ret == 0)
  109. ret = st->data[ch];
  110. error_ret:
  111. gpiod_set_value(st->gpio_convst, 0);
  112. return ret;
  113. }
  114. static int ad7606_read_raw(struct iio_dev *indio_dev,
  115. struct iio_chan_spec const *chan,
  116. int *val,
  117. int *val2,
  118. long m)
  119. {
  120. int ret, ch = 0;
  121. struct ad7606_state *st = iio_priv(indio_dev);
  122. switch (m) {
  123. case IIO_CHAN_INFO_RAW:
  124. iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
  125. ret = ad7606_scan_direct(indio_dev, chan->address);
  126. if (ret < 0)
  127. return ret;
  128. *val = (short) ret;
  129. return IIO_VAL_INT;
  130. }
  131. unreachable();
  132. case IIO_CHAN_INFO_SCALE:
  133. if (st->sw_mode_en)
  134. ch = chan->address;
  135. *val = 0;
  136. *val2 = st->scale_avail[st->range[ch]];
  137. return IIO_VAL_INT_PLUS_MICRO;
  138. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  139. *val = st->oversampling;
  140. return IIO_VAL_INT;
  141. }
  142. return -EINVAL;
  143. }
  144. static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
  145. unsigned int n, bool micros)
  146. {
  147. size_t len = 0;
  148. int i;
  149. for (i = 0; i < n; i++) {
  150. len += scnprintf(buf + len, PAGE_SIZE - len,
  151. micros ? "0.%06u " : "%u ", vals[i]);
  152. }
  153. buf[len - 1] = '\n';
  154. return len;
  155. }
  156. static ssize_t in_voltage_scale_available_show(struct device *dev,
  157. struct device_attribute *attr,
  158. char *buf)
  159. {
  160. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  161. struct ad7606_state *st = iio_priv(indio_dev);
  162. return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
  163. }
  164. static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
  165. static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
  166. {
  167. struct ad7606_state *st = iio_priv(indio_dev);
  168. gpiod_set_value(st->gpio_range, val);
  169. return 0;
  170. }
  171. static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
  172. {
  173. struct ad7606_state *st = iio_priv(indio_dev);
  174. DECLARE_BITMAP(values, 3);
  175. values[0] = val & GENMASK(2, 0);
  176. gpiod_set_array_value(st->gpio_os->ndescs, st->gpio_os->desc,
  177. st->gpio_os->info, values);
  178. /* AD7616 requires a reset to update value */
  179. if (st->chip_info->os_req_reset)
  180. ad7606_reset(st);
  181. return 0;
  182. }
  183. static int ad7606_write_raw(struct iio_dev *indio_dev,
  184. struct iio_chan_spec const *chan,
  185. int val,
  186. int val2,
  187. long mask)
  188. {
  189. struct ad7606_state *st = iio_priv(indio_dev);
  190. int i, ret, ch = 0;
  191. guard(mutex)(&st->lock);
  192. switch (mask) {
  193. case IIO_CHAN_INFO_SCALE:
  194. i = find_closest(val2, st->scale_avail, st->num_scales);
  195. if (st->sw_mode_en)
  196. ch = chan->address;
  197. ret = st->write_scale(indio_dev, ch, i);
  198. if (ret < 0)
  199. return ret;
  200. st->range[ch] = i;
  201. return 0;
  202. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  203. if (val2)
  204. return -EINVAL;
  205. i = find_closest(val, st->oversampling_avail,
  206. st->num_os_ratios);
  207. ret = st->write_os(indio_dev, i);
  208. if (ret < 0)
  209. return ret;
  210. return 0;
  211. default:
  212. return -EINVAL;
  213. }
  214. }
  215. static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
  216. struct device_attribute *attr,
  217. char *buf)
  218. {
  219. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  220. struct ad7606_state *st = iio_priv(indio_dev);
  221. return ad7606_show_avail(buf, st->oversampling_avail,
  222. st->num_os_ratios, false);
  223. }
  224. static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
  225. ad7606_oversampling_ratio_avail, NULL, 0);
  226. static struct attribute *ad7606_attributes_os_and_range[] = {
  227. &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
  228. &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
  229. NULL,
  230. };
  231. static const struct attribute_group ad7606_attribute_group_os_and_range = {
  232. .attrs = ad7606_attributes_os_and_range,
  233. };
  234. static struct attribute *ad7606_attributes_os[] = {
  235. &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
  236. NULL,
  237. };
  238. static const struct attribute_group ad7606_attribute_group_os = {
  239. .attrs = ad7606_attributes_os,
  240. };
  241. static struct attribute *ad7606_attributes_range[] = {
  242. &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
  243. NULL,
  244. };
  245. static const struct attribute_group ad7606_attribute_group_range = {
  246. .attrs = ad7606_attributes_range,
  247. };
  248. static const struct iio_chan_spec ad7605_channels[] = {
  249. IIO_CHAN_SOFT_TIMESTAMP(4),
  250. AD7605_CHANNEL(0),
  251. AD7605_CHANNEL(1),
  252. AD7605_CHANNEL(2),
  253. AD7605_CHANNEL(3),
  254. };
  255. static const struct iio_chan_spec ad7606_channels[] = {
  256. IIO_CHAN_SOFT_TIMESTAMP(8),
  257. AD7606_CHANNEL(0),
  258. AD7606_CHANNEL(1),
  259. AD7606_CHANNEL(2),
  260. AD7606_CHANNEL(3),
  261. AD7606_CHANNEL(4),
  262. AD7606_CHANNEL(5),
  263. AD7606_CHANNEL(6),
  264. AD7606_CHANNEL(7),
  265. };
  266. /*
  267. * The current assumption that this driver makes for AD7616, is that it's
  268. * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
  269. * To activate them, following pins must be pulled high:
  270. * -SER/PAR
  271. * -SEQEN
  272. * And following pins must be pulled low:
  273. * -WR/BURST
  274. * -DB4/SER1W
  275. */
  276. static const struct iio_chan_spec ad7616_channels[] = {
  277. IIO_CHAN_SOFT_TIMESTAMP(16),
  278. AD7606_CHANNEL(0),
  279. AD7606_CHANNEL(1),
  280. AD7606_CHANNEL(2),
  281. AD7606_CHANNEL(3),
  282. AD7606_CHANNEL(4),
  283. AD7606_CHANNEL(5),
  284. AD7606_CHANNEL(6),
  285. AD7606_CHANNEL(7),
  286. AD7606_CHANNEL(8),
  287. AD7606_CHANNEL(9),
  288. AD7606_CHANNEL(10),
  289. AD7606_CHANNEL(11),
  290. AD7606_CHANNEL(12),
  291. AD7606_CHANNEL(13),
  292. AD7606_CHANNEL(14),
  293. AD7606_CHANNEL(15),
  294. };
  295. static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
  296. /* More devices added in future */
  297. [ID_AD7605_4] = {
  298. .channels = ad7605_channels,
  299. .num_channels = 5,
  300. },
  301. [ID_AD7606_8] = {
  302. .channels = ad7606_channels,
  303. .num_channels = 9,
  304. .oversampling_avail = ad7606_oversampling_avail,
  305. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  306. },
  307. [ID_AD7606_6] = {
  308. .channels = ad7606_channels,
  309. .num_channels = 7,
  310. .oversampling_avail = ad7606_oversampling_avail,
  311. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  312. },
  313. [ID_AD7606_4] = {
  314. .channels = ad7606_channels,
  315. .num_channels = 5,
  316. .oversampling_avail = ad7606_oversampling_avail,
  317. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  318. },
  319. [ID_AD7606B] = {
  320. .channels = ad7606_channels,
  321. .num_channels = 9,
  322. .oversampling_avail = ad7606_oversampling_avail,
  323. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  324. },
  325. [ID_AD7616] = {
  326. .channels = ad7616_channels,
  327. .num_channels = 17,
  328. .oversampling_avail = ad7616_oversampling_avail,
  329. .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
  330. .os_req_reset = true,
  331. .init_delay_ms = 15,
  332. },
  333. };
  334. static int ad7606_request_gpios(struct ad7606_state *st)
  335. {
  336. struct device *dev = st->dev;
  337. st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
  338. GPIOD_OUT_LOW);
  339. if (IS_ERR(st->gpio_convst))
  340. return PTR_ERR(st->gpio_convst);
  341. st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
  342. if (IS_ERR(st->gpio_reset))
  343. return PTR_ERR(st->gpio_reset);
  344. st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
  345. GPIOD_OUT_LOW);
  346. if (IS_ERR(st->gpio_range))
  347. return PTR_ERR(st->gpio_range);
  348. st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
  349. GPIOD_OUT_LOW);
  350. if (IS_ERR(st->gpio_standby))
  351. return PTR_ERR(st->gpio_standby);
  352. st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
  353. GPIOD_IN);
  354. if (IS_ERR(st->gpio_frstdata))
  355. return PTR_ERR(st->gpio_frstdata);
  356. if (!st->chip_info->oversampling_num)
  357. return 0;
  358. st->gpio_os = devm_gpiod_get_array_optional(dev,
  359. "adi,oversampling-ratio",
  360. GPIOD_OUT_LOW);
  361. return PTR_ERR_OR_ZERO(st->gpio_os);
  362. }
  363. /*
  364. * The BUSY signal indicates when conversions are in progress, so when a rising
  365. * edge of CONVST is applied, BUSY goes logic high and transitions low at the
  366. * end of the entire conversion process. The falling edge of the BUSY signal
  367. * triggers this interrupt.
  368. */
  369. static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
  370. {
  371. struct iio_dev *indio_dev = dev_id;
  372. struct ad7606_state *st = iio_priv(indio_dev);
  373. if (iio_buffer_enabled(indio_dev)) {
  374. gpiod_set_value(st->gpio_convst, 0);
  375. iio_trigger_poll_nested(st->trig);
  376. } else {
  377. complete(&st->completion);
  378. }
  379. return IRQ_HANDLED;
  380. };
  381. static int ad7606_validate_trigger(struct iio_dev *indio_dev,
  382. struct iio_trigger *trig)
  383. {
  384. struct ad7606_state *st = iio_priv(indio_dev);
  385. if (st->trig != trig)
  386. return -EINVAL;
  387. return 0;
  388. }
  389. static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
  390. {
  391. struct ad7606_state *st = iio_priv(indio_dev);
  392. gpiod_set_value(st->gpio_convst, 1);
  393. return 0;
  394. }
  395. static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
  396. {
  397. struct ad7606_state *st = iio_priv(indio_dev);
  398. gpiod_set_value(st->gpio_convst, 0);
  399. return 0;
  400. }
  401. static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
  402. .postenable = &ad7606_buffer_postenable,
  403. .predisable = &ad7606_buffer_predisable,
  404. };
  405. static const struct iio_info ad7606_info_no_os_or_range = {
  406. .read_raw = &ad7606_read_raw,
  407. .validate_trigger = &ad7606_validate_trigger,
  408. };
  409. static const struct iio_info ad7606_info_os_and_range = {
  410. .read_raw = &ad7606_read_raw,
  411. .write_raw = &ad7606_write_raw,
  412. .attrs = &ad7606_attribute_group_os_and_range,
  413. .validate_trigger = &ad7606_validate_trigger,
  414. };
  415. static const struct iio_info ad7606_info_os_range_and_debug = {
  416. .read_raw = &ad7606_read_raw,
  417. .write_raw = &ad7606_write_raw,
  418. .debugfs_reg_access = &ad7606_reg_access,
  419. .attrs = &ad7606_attribute_group_os_and_range,
  420. .validate_trigger = &ad7606_validate_trigger,
  421. };
  422. static const struct iio_info ad7606_info_os = {
  423. .read_raw = &ad7606_read_raw,
  424. .write_raw = &ad7606_write_raw,
  425. .attrs = &ad7606_attribute_group_os,
  426. .validate_trigger = &ad7606_validate_trigger,
  427. };
  428. static const struct iio_info ad7606_info_range = {
  429. .read_raw = &ad7606_read_raw,
  430. .write_raw = &ad7606_write_raw,
  431. .attrs = &ad7606_attribute_group_range,
  432. .validate_trigger = &ad7606_validate_trigger,
  433. };
  434. static const struct iio_trigger_ops ad7606_trigger_ops = {
  435. .validate_device = iio_trigger_validate_own_device,
  436. };
  437. int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
  438. const char *name, unsigned int id,
  439. const struct ad7606_bus_ops *bops)
  440. {
  441. struct ad7606_state *st;
  442. int ret;
  443. struct iio_dev *indio_dev;
  444. indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
  445. if (!indio_dev)
  446. return -ENOMEM;
  447. st = iio_priv(indio_dev);
  448. dev_set_drvdata(dev, indio_dev);
  449. st->dev = dev;
  450. mutex_init(&st->lock);
  451. st->bops = bops;
  452. st->base_address = base_address;
  453. /* tied to logic low, analog input range is +/- 5V */
  454. st->range[0] = 0;
  455. st->oversampling = 1;
  456. st->scale_avail = ad7606_scale_avail;
  457. st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
  458. ret = devm_regulator_get_enable(dev, "avcc");
  459. if (ret)
  460. return dev_err_probe(dev, ret,
  461. "Failed to enable specified AVcc supply\n");
  462. st->chip_info = &ad7606_chip_info_tbl[id];
  463. if (st->chip_info->oversampling_num) {
  464. st->oversampling_avail = st->chip_info->oversampling_avail;
  465. st->num_os_ratios = st->chip_info->oversampling_num;
  466. }
  467. ret = ad7606_request_gpios(st);
  468. if (ret)
  469. return ret;
  470. if (st->gpio_os) {
  471. if (st->gpio_range)
  472. indio_dev->info = &ad7606_info_os_and_range;
  473. else
  474. indio_dev->info = &ad7606_info_os;
  475. } else {
  476. if (st->gpio_range)
  477. indio_dev->info = &ad7606_info_range;
  478. else
  479. indio_dev->info = &ad7606_info_no_os_or_range;
  480. }
  481. indio_dev->modes = INDIO_DIRECT_MODE;
  482. indio_dev->name = name;
  483. indio_dev->channels = st->chip_info->channels;
  484. indio_dev->num_channels = st->chip_info->num_channels;
  485. init_completion(&st->completion);
  486. ret = ad7606_reset(st);
  487. if (ret)
  488. dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
  489. /* AD7616 requires al least 15ms to reconfigure after a reset */
  490. if (st->chip_info->init_delay_ms) {
  491. if (msleep_interruptible(st->chip_info->init_delay_ms))
  492. return -ERESTARTSYS;
  493. }
  494. st->write_scale = ad7606_write_scale_hw;
  495. st->write_os = ad7606_write_os_hw;
  496. if (st->bops->sw_mode_config)
  497. st->sw_mode_en = device_property_present(st->dev,
  498. "adi,sw-mode");
  499. if (st->sw_mode_en) {
  500. /* Scale of 0.076293 is only available in sw mode */
  501. st->scale_avail = ad7616_sw_scale_avail;
  502. st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
  503. /* After reset, in software mode, ±10 V is set by default */
  504. memset32(st->range, 2, ARRAY_SIZE(st->range));
  505. indio_dev->info = &ad7606_info_os_range_and_debug;
  506. ret = st->bops->sw_mode_config(indio_dev);
  507. if (ret < 0)
  508. return ret;
  509. }
  510. st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
  511. indio_dev->name,
  512. iio_device_id(indio_dev));
  513. if (!st->trig)
  514. return -ENOMEM;
  515. st->trig->ops = &ad7606_trigger_ops;
  516. iio_trigger_set_drvdata(st->trig, indio_dev);
  517. ret = devm_iio_trigger_register(dev, st->trig);
  518. if (ret)
  519. return ret;
  520. indio_dev->trig = iio_trigger_get(st->trig);
  521. ret = devm_request_threaded_irq(dev, irq,
  522. NULL,
  523. &ad7606_interrupt,
  524. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  525. name, indio_dev);
  526. if (ret)
  527. return ret;
  528. ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
  529. &iio_pollfunc_store_time,
  530. &ad7606_trigger_handler,
  531. &ad7606_buffer_ops);
  532. if (ret)
  533. return ret;
  534. return devm_iio_device_register(dev, indio_dev);
  535. }
  536. EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606);
  537. #ifdef CONFIG_PM_SLEEP
  538. static int ad7606_suspend(struct device *dev)
  539. {
  540. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  541. struct ad7606_state *st = iio_priv(indio_dev);
  542. if (st->gpio_standby) {
  543. gpiod_set_value(st->gpio_range, 1);
  544. gpiod_set_value(st->gpio_standby, 1);
  545. }
  546. return 0;
  547. }
  548. static int ad7606_resume(struct device *dev)
  549. {
  550. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  551. struct ad7606_state *st = iio_priv(indio_dev);
  552. if (st->gpio_standby) {
  553. gpiod_set_value(st->gpio_range, st->range[0]);
  554. gpiod_set_value(st->gpio_standby, 1);
  555. ad7606_reset(st);
  556. }
  557. return 0;
  558. }
  559. SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
  560. EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, IIO_AD7606);
  561. #endif
  562. MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
  563. MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
  564. MODULE_LICENSE("GPL v2");