ad799x.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * iio/adc/ad799x.c
  4. * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
  5. *
  6. * based on iio/adc/max1363
  7. * Copyright (C) 2008-2010 Jonathan Cameron
  8. *
  9. * based on linux/drivers/i2c/chips/max123x
  10. * Copyright (C) 2002-2004 Stefan Eletzhofer
  11. *
  12. * based on linux/drivers/acron/char/pcf8583.c
  13. * Copyright (C) 2000 Russell King
  14. *
  15. * ad799x.c
  16. *
  17. * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
  18. * ad7998 and similar chips.
  19. */
  20. #include <linux/interrupt.h>
  21. #include <linux/device.h>
  22. #include <linux/kernel.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/i2c.h>
  25. #include <linux/regulator/consumer.h>
  26. #include <linux/slab.h>
  27. #include <linux/types.h>
  28. #include <linux/err.h>
  29. #include <linux/module.h>
  30. #include <linux/mutex.h>
  31. #include <linux/bitops.h>
  32. #include <linux/iio/iio.h>
  33. #include <linux/iio/sysfs.h>
  34. #include <linux/iio/events.h>
  35. #include <linux/iio/buffer.h>
  36. #include <linux/iio/trigger_consumer.h>
  37. #include <linux/iio/triggered_buffer.h>
  38. #define AD799X_CHANNEL_SHIFT 4
  39. /*
  40. * AD7991, AD7995 and AD7999 defines
  41. */
  42. #define AD7991_REF_SEL 0x08
  43. #define AD7991_FLTR 0x04
  44. #define AD7991_BIT_TRIAL_DELAY 0x02
  45. #define AD7991_SAMPLE_DELAY 0x01
  46. /*
  47. * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
  48. */
  49. #define AD7998_FLTR BIT(3)
  50. #define AD7998_ALERT_EN BIT(2)
  51. #define AD7998_BUSY_ALERT BIT(1)
  52. #define AD7998_BUSY_ALERT_POL BIT(0)
  53. #define AD7998_CONV_RES_REG 0x0
  54. #define AD7998_ALERT_STAT_REG 0x1
  55. #define AD7998_CONF_REG 0x2
  56. #define AD7998_CYCLE_TMR_REG 0x3
  57. #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
  58. #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
  59. #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
  60. #define AD7998_CYC_MASK GENMASK(2, 0)
  61. #define AD7998_CYC_DIS 0x0
  62. #define AD7998_CYC_TCONF_32 0x1
  63. #define AD7998_CYC_TCONF_64 0x2
  64. #define AD7998_CYC_TCONF_128 0x3
  65. #define AD7998_CYC_TCONF_256 0x4
  66. #define AD7998_CYC_TCONF_512 0x5
  67. #define AD7998_CYC_TCONF_1024 0x6
  68. #define AD7998_CYC_TCONF_2048 0x7
  69. #define AD7998_ALERT_STAT_CLEAR 0xFF
  70. /*
  71. * AD7997 and AD7997 defines
  72. */
  73. #define AD7997_8_READ_SINGLE BIT(7)
  74. #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
  75. enum {
  76. ad7991,
  77. ad7995,
  78. ad7999,
  79. ad7992,
  80. ad7993,
  81. ad7994,
  82. ad7997,
  83. ad7998
  84. };
  85. /**
  86. * struct ad799x_chip_config - chip specific information
  87. * @channel: channel specification
  88. * @default_config: device default configuration
  89. * @info: pointer to iio_info struct
  90. */
  91. struct ad799x_chip_config {
  92. const struct iio_chan_spec channel[9];
  93. u16 default_config;
  94. const struct iio_info *info;
  95. };
  96. /**
  97. * struct ad799x_chip_info - chip specific information
  98. * @num_channels: number of channels
  99. * @noirq_config: device configuration w/o IRQ
  100. * @irq_config: device configuration w/IRQ
  101. */
  102. struct ad799x_chip_info {
  103. int num_channels;
  104. const struct ad799x_chip_config noirq_config;
  105. const struct ad799x_chip_config irq_config;
  106. };
  107. struct ad799x_state {
  108. struct i2c_client *client;
  109. const struct ad799x_chip_config *chip_config;
  110. struct regulator *reg;
  111. struct regulator *vref;
  112. /* lock to protect against multiple access to the device */
  113. struct mutex lock;
  114. unsigned int id;
  115. u16 config;
  116. u8 *rx_buf;
  117. unsigned int transfer_size;
  118. };
  119. static int ad799x_write_config(struct ad799x_state *st, u16 val)
  120. {
  121. switch (st->id) {
  122. case ad7997:
  123. case ad7998:
  124. return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
  125. val);
  126. case ad7992:
  127. case ad7993:
  128. case ad7994:
  129. return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
  130. val);
  131. default:
  132. /* Will be written when doing a conversion */
  133. st->config = val;
  134. return 0;
  135. }
  136. }
  137. static int ad799x_read_config(struct ad799x_state *st)
  138. {
  139. switch (st->id) {
  140. case ad7997:
  141. case ad7998:
  142. return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
  143. case ad7992:
  144. case ad7993:
  145. case ad7994:
  146. return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
  147. default:
  148. /* No readback support */
  149. return st->config;
  150. }
  151. }
  152. static int ad799x_update_config(struct ad799x_state *st, u16 config)
  153. {
  154. int ret;
  155. ret = ad799x_write_config(st, config);
  156. if (ret < 0)
  157. return ret;
  158. ret = ad799x_read_config(st);
  159. if (ret < 0)
  160. return ret;
  161. st->config = ret;
  162. return 0;
  163. }
  164. static irqreturn_t ad799x_trigger_handler(int irq, void *p)
  165. {
  166. struct iio_poll_func *pf = p;
  167. struct iio_dev *indio_dev = pf->indio_dev;
  168. struct ad799x_state *st = iio_priv(indio_dev);
  169. int b_sent;
  170. u8 cmd;
  171. switch (st->id) {
  172. case ad7991:
  173. case ad7995:
  174. case ad7999:
  175. cmd = st->config |
  176. (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
  177. break;
  178. case ad7992:
  179. case ad7993:
  180. case ad7994:
  181. cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
  182. AD7998_CONV_RES_REG;
  183. break;
  184. case ad7997:
  185. case ad7998:
  186. cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
  187. break;
  188. default:
  189. cmd = 0;
  190. }
  191. b_sent = i2c_smbus_read_i2c_block_data(st->client,
  192. cmd, st->transfer_size, st->rx_buf);
  193. if (b_sent < 0)
  194. goto out;
  195. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  196. iio_get_time_ns(indio_dev));
  197. out:
  198. iio_trigger_notify_done(indio_dev->trig);
  199. return IRQ_HANDLED;
  200. }
  201. static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
  202. const unsigned long *scan_mask)
  203. {
  204. struct ad799x_state *st = iio_priv(indio_dev);
  205. kfree(st->rx_buf);
  206. st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  207. if (!st->rx_buf)
  208. return -ENOMEM;
  209. st->transfer_size = bitmap_weight(scan_mask,
  210. iio_get_masklength(indio_dev)) * 2;
  211. switch (st->id) {
  212. case ad7992:
  213. case ad7993:
  214. case ad7994:
  215. case ad7997:
  216. case ad7998:
  217. st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
  218. st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
  219. return ad799x_write_config(st, st->config);
  220. default:
  221. return 0;
  222. }
  223. }
  224. static int ad799x_scan_direct(struct ad799x_state *st, unsigned int ch)
  225. {
  226. u8 cmd;
  227. switch (st->id) {
  228. case ad7991:
  229. case ad7995:
  230. case ad7999:
  231. cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
  232. break;
  233. case ad7992:
  234. case ad7993:
  235. case ad7994:
  236. cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
  237. break;
  238. case ad7997:
  239. case ad7998:
  240. cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
  241. break;
  242. default:
  243. return -EINVAL;
  244. }
  245. return i2c_smbus_read_word_swapped(st->client, cmd);
  246. }
  247. static int ad799x_read_raw(struct iio_dev *indio_dev,
  248. struct iio_chan_spec const *chan,
  249. int *val,
  250. int *val2,
  251. long m)
  252. {
  253. int ret;
  254. struct ad799x_state *st = iio_priv(indio_dev);
  255. switch (m) {
  256. case IIO_CHAN_INFO_RAW:
  257. ret = iio_device_claim_direct_mode(indio_dev);
  258. if (ret)
  259. return ret;
  260. mutex_lock(&st->lock);
  261. ret = ad799x_scan_direct(st, chan->scan_index);
  262. mutex_unlock(&st->lock);
  263. iio_device_release_direct_mode(indio_dev);
  264. if (ret < 0)
  265. return ret;
  266. *val = (ret >> chan->scan_type.shift) &
  267. GENMASK(chan->scan_type.realbits - 1, 0);
  268. return IIO_VAL_INT;
  269. case IIO_CHAN_INFO_SCALE:
  270. if (st->vref)
  271. ret = regulator_get_voltage(st->vref);
  272. else
  273. ret = regulator_get_voltage(st->reg);
  274. if (ret < 0)
  275. return ret;
  276. *val = ret / 1000;
  277. *val2 = chan->scan_type.realbits;
  278. return IIO_VAL_FRACTIONAL_LOG2;
  279. }
  280. return -EINVAL;
  281. }
  282. static const unsigned int ad7998_frequencies[] = {
  283. [AD7998_CYC_DIS] = 0,
  284. [AD7998_CYC_TCONF_32] = 15625,
  285. [AD7998_CYC_TCONF_64] = 7812,
  286. [AD7998_CYC_TCONF_128] = 3906,
  287. [AD7998_CYC_TCONF_512] = 976,
  288. [AD7998_CYC_TCONF_1024] = 488,
  289. [AD7998_CYC_TCONF_2048] = 244,
  290. };
  291. static ssize_t ad799x_read_frequency(struct device *dev,
  292. struct device_attribute *attr,
  293. char *buf)
  294. {
  295. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  296. struct ad799x_state *st = iio_priv(indio_dev);
  297. int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  298. if (ret < 0)
  299. return ret;
  300. return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
  301. }
  302. static ssize_t ad799x_write_frequency(struct device *dev,
  303. struct device_attribute *attr,
  304. const char *buf,
  305. size_t len)
  306. {
  307. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  308. struct ad799x_state *st = iio_priv(indio_dev);
  309. long val;
  310. int ret, i;
  311. ret = kstrtol(buf, 10, &val);
  312. if (ret)
  313. return ret;
  314. mutex_lock(&st->lock);
  315. ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  316. if (ret < 0)
  317. goto error_ret_mutex;
  318. /* Wipe the bits clean */
  319. ret &= ~AD7998_CYC_MASK;
  320. for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
  321. if (val == ad7998_frequencies[i])
  322. break;
  323. if (i == ARRAY_SIZE(ad7998_frequencies)) {
  324. ret = -EINVAL;
  325. goto error_ret_mutex;
  326. }
  327. ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
  328. ret | i);
  329. if (ret < 0)
  330. goto error_ret_mutex;
  331. ret = len;
  332. error_ret_mutex:
  333. mutex_unlock(&st->lock);
  334. return ret;
  335. }
  336. static int ad799x_read_event_config(struct iio_dev *indio_dev,
  337. const struct iio_chan_spec *chan,
  338. enum iio_event_type type,
  339. enum iio_event_direction dir)
  340. {
  341. struct ad799x_state *st = iio_priv(indio_dev);
  342. if (!(st->config & AD7998_ALERT_EN))
  343. return 0;
  344. if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
  345. return 1;
  346. return 0;
  347. }
  348. static int ad799x_write_event_config(struct iio_dev *indio_dev,
  349. const struct iio_chan_spec *chan,
  350. enum iio_event_type type,
  351. enum iio_event_direction dir,
  352. int state)
  353. {
  354. struct ad799x_state *st = iio_priv(indio_dev);
  355. int ret;
  356. ret = iio_device_claim_direct_mode(indio_dev);
  357. if (ret)
  358. return ret;
  359. mutex_lock(&st->lock);
  360. if (state)
  361. st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
  362. else
  363. st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
  364. if (st->config >> AD799X_CHANNEL_SHIFT)
  365. st->config |= AD7998_ALERT_EN;
  366. else
  367. st->config &= ~AD7998_ALERT_EN;
  368. ret = ad799x_write_config(st, st->config);
  369. mutex_unlock(&st->lock);
  370. iio_device_release_direct_mode(indio_dev);
  371. return ret;
  372. }
  373. static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
  374. enum iio_event_direction dir,
  375. enum iio_event_info info)
  376. {
  377. switch (info) {
  378. case IIO_EV_INFO_VALUE:
  379. if (dir == IIO_EV_DIR_FALLING)
  380. return AD7998_DATALOW_REG(chan->channel);
  381. else
  382. return AD7998_DATAHIGH_REG(chan->channel);
  383. case IIO_EV_INFO_HYSTERESIS:
  384. return AD7998_HYST_REG(chan->channel);
  385. default:
  386. return -EINVAL;
  387. }
  388. return 0;
  389. }
  390. static int ad799x_write_event_value(struct iio_dev *indio_dev,
  391. const struct iio_chan_spec *chan,
  392. enum iio_event_type type,
  393. enum iio_event_direction dir,
  394. enum iio_event_info info,
  395. int val, int val2)
  396. {
  397. int ret;
  398. struct ad799x_state *st = iio_priv(indio_dev);
  399. if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
  400. return -EINVAL;
  401. ret = i2c_smbus_write_word_swapped(st->client,
  402. ad799x_threshold_reg(chan, dir, info),
  403. val << chan->scan_type.shift);
  404. return ret;
  405. }
  406. static int ad799x_read_event_value(struct iio_dev *indio_dev,
  407. const struct iio_chan_spec *chan,
  408. enum iio_event_type type,
  409. enum iio_event_direction dir,
  410. enum iio_event_info info,
  411. int *val, int *val2)
  412. {
  413. int ret;
  414. struct ad799x_state *st = iio_priv(indio_dev);
  415. ret = i2c_smbus_read_word_swapped(st->client,
  416. ad799x_threshold_reg(chan, dir, info));
  417. if (ret < 0)
  418. return ret;
  419. *val = (ret >> chan->scan_type.shift) &
  420. GENMASK(chan->scan_type.realbits - 1, 0);
  421. return IIO_VAL_INT;
  422. }
  423. static irqreturn_t ad799x_event_handler(int irq, void *private)
  424. {
  425. struct iio_dev *indio_dev = private;
  426. struct ad799x_state *st = iio_priv(private);
  427. int i, ret;
  428. ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
  429. if (ret <= 0)
  430. goto done;
  431. if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
  432. AD7998_ALERT_STAT_CLEAR) < 0)
  433. goto done;
  434. for (i = 0; i < 8; i++) {
  435. if (ret & BIT(i))
  436. iio_push_event(indio_dev,
  437. i & 0x1 ?
  438. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  439. (i >> 1),
  440. IIO_EV_TYPE_THRESH,
  441. IIO_EV_DIR_RISING) :
  442. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  443. (i >> 1),
  444. IIO_EV_TYPE_THRESH,
  445. IIO_EV_DIR_FALLING),
  446. iio_get_time_ns(indio_dev));
  447. }
  448. done:
  449. return IRQ_HANDLED;
  450. }
  451. static IIO_DEV_ATTR_SAMP_FREQ(0644,
  452. ad799x_read_frequency,
  453. ad799x_write_frequency);
  454. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
  455. static struct attribute *ad799x_event_attributes[] = {
  456. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  457. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  458. NULL,
  459. };
  460. static const struct attribute_group ad799x_event_attrs_group = {
  461. .attrs = ad799x_event_attributes,
  462. };
  463. static const struct iio_info ad7991_info = {
  464. .read_raw = &ad799x_read_raw,
  465. .update_scan_mode = ad799x_update_scan_mode,
  466. };
  467. static const struct iio_info ad7993_4_7_8_noirq_info = {
  468. .read_raw = &ad799x_read_raw,
  469. .update_scan_mode = ad799x_update_scan_mode,
  470. };
  471. static const struct iio_info ad7993_4_7_8_irq_info = {
  472. .read_raw = &ad799x_read_raw,
  473. .event_attrs = &ad799x_event_attrs_group,
  474. .read_event_config = &ad799x_read_event_config,
  475. .write_event_config = &ad799x_write_event_config,
  476. .read_event_value = &ad799x_read_event_value,
  477. .write_event_value = &ad799x_write_event_value,
  478. .update_scan_mode = ad799x_update_scan_mode,
  479. };
  480. static const struct iio_event_spec ad799x_events[] = {
  481. {
  482. .type = IIO_EV_TYPE_THRESH,
  483. .dir = IIO_EV_DIR_RISING,
  484. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  485. BIT(IIO_EV_INFO_ENABLE),
  486. }, {
  487. .type = IIO_EV_TYPE_THRESH,
  488. .dir = IIO_EV_DIR_FALLING,
  489. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  490. BIT(IIO_EV_INFO_ENABLE),
  491. }, {
  492. .type = IIO_EV_TYPE_THRESH,
  493. .dir = IIO_EV_DIR_EITHER,
  494. .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
  495. },
  496. };
  497. #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
  498. .type = IIO_VOLTAGE, \
  499. .indexed = 1, \
  500. .channel = (_index), \
  501. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  502. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  503. .scan_index = (_index), \
  504. .scan_type = { \
  505. .sign = 'u', \
  506. .realbits = (_realbits), \
  507. .storagebits = 16, \
  508. .shift = 12 - (_realbits), \
  509. .endianness = IIO_BE, \
  510. }, \
  511. .event_spec = _ev_spec, \
  512. .num_event_specs = _num_ev_spec, \
  513. }
  514. #define AD799X_CHANNEL(_index, _realbits) \
  515. _AD799X_CHANNEL(_index, _realbits, NULL, 0)
  516. #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
  517. _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
  518. ARRAY_SIZE(ad799x_events))
  519. static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
  520. [ad7991] = {
  521. .num_channels = 5,
  522. .noirq_config = {
  523. .channel = {
  524. AD799X_CHANNEL(0, 12),
  525. AD799X_CHANNEL(1, 12),
  526. AD799X_CHANNEL(2, 12),
  527. AD799X_CHANNEL(3, 12),
  528. IIO_CHAN_SOFT_TIMESTAMP(4),
  529. },
  530. .info = &ad7991_info,
  531. },
  532. },
  533. [ad7995] = {
  534. .num_channels = 5,
  535. .noirq_config = {
  536. .channel = {
  537. AD799X_CHANNEL(0, 10),
  538. AD799X_CHANNEL(1, 10),
  539. AD799X_CHANNEL(2, 10),
  540. AD799X_CHANNEL(3, 10),
  541. IIO_CHAN_SOFT_TIMESTAMP(4),
  542. },
  543. .info = &ad7991_info,
  544. },
  545. },
  546. [ad7999] = {
  547. .num_channels = 5,
  548. .noirq_config = {
  549. .channel = {
  550. AD799X_CHANNEL(0, 8),
  551. AD799X_CHANNEL(1, 8),
  552. AD799X_CHANNEL(2, 8),
  553. AD799X_CHANNEL(3, 8),
  554. IIO_CHAN_SOFT_TIMESTAMP(4),
  555. },
  556. .info = &ad7991_info,
  557. },
  558. },
  559. [ad7992] = {
  560. .num_channels = 3,
  561. .noirq_config = {
  562. .channel = {
  563. AD799X_CHANNEL(0, 12),
  564. AD799X_CHANNEL(1, 12),
  565. IIO_CHAN_SOFT_TIMESTAMP(3),
  566. },
  567. .info = &ad7993_4_7_8_noirq_info,
  568. },
  569. .irq_config = {
  570. .channel = {
  571. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  572. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  573. IIO_CHAN_SOFT_TIMESTAMP(3),
  574. },
  575. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  576. .info = &ad7993_4_7_8_irq_info,
  577. },
  578. },
  579. [ad7993] = {
  580. .num_channels = 5,
  581. .noirq_config = {
  582. .channel = {
  583. AD799X_CHANNEL(0, 10),
  584. AD799X_CHANNEL(1, 10),
  585. AD799X_CHANNEL(2, 10),
  586. AD799X_CHANNEL(3, 10),
  587. IIO_CHAN_SOFT_TIMESTAMP(4),
  588. },
  589. .info = &ad7993_4_7_8_noirq_info,
  590. },
  591. .irq_config = {
  592. .channel = {
  593. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  594. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  595. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  596. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  597. IIO_CHAN_SOFT_TIMESTAMP(4),
  598. },
  599. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  600. .info = &ad7993_4_7_8_irq_info,
  601. },
  602. },
  603. [ad7994] = {
  604. .num_channels = 5,
  605. .noirq_config = {
  606. .channel = {
  607. AD799X_CHANNEL(0, 12),
  608. AD799X_CHANNEL(1, 12),
  609. AD799X_CHANNEL(2, 12),
  610. AD799X_CHANNEL(3, 12),
  611. IIO_CHAN_SOFT_TIMESTAMP(4),
  612. },
  613. .info = &ad7993_4_7_8_noirq_info,
  614. },
  615. .irq_config = {
  616. .channel = {
  617. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  618. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  619. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  620. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  621. IIO_CHAN_SOFT_TIMESTAMP(4),
  622. },
  623. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  624. .info = &ad7993_4_7_8_irq_info,
  625. },
  626. },
  627. [ad7997] = {
  628. .num_channels = 9,
  629. .noirq_config = {
  630. .channel = {
  631. AD799X_CHANNEL(0, 10),
  632. AD799X_CHANNEL(1, 10),
  633. AD799X_CHANNEL(2, 10),
  634. AD799X_CHANNEL(3, 10),
  635. AD799X_CHANNEL(4, 10),
  636. AD799X_CHANNEL(5, 10),
  637. AD799X_CHANNEL(6, 10),
  638. AD799X_CHANNEL(7, 10),
  639. IIO_CHAN_SOFT_TIMESTAMP(8),
  640. },
  641. .info = &ad7993_4_7_8_noirq_info,
  642. },
  643. .irq_config = {
  644. .channel = {
  645. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  646. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  647. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  648. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  649. AD799X_CHANNEL(4, 10),
  650. AD799X_CHANNEL(5, 10),
  651. AD799X_CHANNEL(6, 10),
  652. AD799X_CHANNEL(7, 10),
  653. IIO_CHAN_SOFT_TIMESTAMP(8),
  654. },
  655. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  656. .info = &ad7993_4_7_8_irq_info,
  657. },
  658. },
  659. [ad7998] = {
  660. .num_channels = 9,
  661. .noirq_config = {
  662. .channel = {
  663. AD799X_CHANNEL(0, 12),
  664. AD799X_CHANNEL(1, 12),
  665. AD799X_CHANNEL(2, 12),
  666. AD799X_CHANNEL(3, 12),
  667. AD799X_CHANNEL(4, 12),
  668. AD799X_CHANNEL(5, 12),
  669. AD799X_CHANNEL(6, 12),
  670. AD799X_CHANNEL(7, 12),
  671. IIO_CHAN_SOFT_TIMESTAMP(8),
  672. },
  673. .info = &ad7993_4_7_8_noirq_info,
  674. },
  675. .irq_config = {
  676. .channel = {
  677. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  678. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  679. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  680. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  681. AD799X_CHANNEL(4, 12),
  682. AD799X_CHANNEL(5, 12),
  683. AD799X_CHANNEL(6, 12),
  684. AD799X_CHANNEL(7, 12),
  685. IIO_CHAN_SOFT_TIMESTAMP(8),
  686. },
  687. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  688. .info = &ad7993_4_7_8_irq_info,
  689. },
  690. },
  691. };
  692. static int ad799x_probe(struct i2c_client *client)
  693. {
  694. const struct i2c_device_id *id = i2c_client_get_device_id(client);
  695. int ret;
  696. int extra_config = 0;
  697. struct ad799x_state *st;
  698. struct iio_dev *indio_dev;
  699. const struct ad799x_chip_info *chip_info =
  700. &ad799x_chip_info_tbl[id->driver_data];
  701. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
  702. if (indio_dev == NULL)
  703. return -ENOMEM;
  704. st = iio_priv(indio_dev);
  705. /* this is only used for device removal purposes */
  706. i2c_set_clientdata(client, indio_dev);
  707. st->id = id->driver_data;
  708. if (client->irq > 0 && chip_info->irq_config.info)
  709. st->chip_config = &chip_info->irq_config;
  710. else
  711. st->chip_config = &chip_info->noirq_config;
  712. /* TODO: Add pdata options for filtering and bit delay */
  713. st->reg = devm_regulator_get(&client->dev, "vcc");
  714. if (IS_ERR(st->reg))
  715. return PTR_ERR(st->reg);
  716. ret = regulator_enable(st->reg);
  717. if (ret)
  718. return ret;
  719. /* check if an external reference is supplied */
  720. st->vref = devm_regulator_get_optional(&client->dev, "vref");
  721. if (IS_ERR(st->vref)) {
  722. if (PTR_ERR(st->vref) == -ENODEV) {
  723. st->vref = NULL;
  724. dev_info(&client->dev, "Using VCC reference voltage\n");
  725. } else {
  726. ret = PTR_ERR(st->vref);
  727. goto error_disable_reg;
  728. }
  729. }
  730. if (st->vref) {
  731. /*
  732. * Use external reference voltage if supported by hardware.
  733. * This is optional if voltage / regulator present, use VCC otherwise.
  734. */
  735. if ((st->id == ad7991) || (st->id == ad7995) || (st->id == ad7999)) {
  736. dev_info(&client->dev, "Using external reference voltage\n");
  737. extra_config |= AD7991_REF_SEL;
  738. ret = regulator_enable(st->vref);
  739. if (ret)
  740. goto error_disable_reg;
  741. } else {
  742. st->vref = NULL;
  743. dev_warn(&client->dev, "Supplied reference not supported\n");
  744. }
  745. }
  746. st->client = client;
  747. indio_dev->name = id->name;
  748. indio_dev->info = st->chip_config->info;
  749. indio_dev->modes = INDIO_DIRECT_MODE;
  750. indio_dev->channels = st->chip_config->channel;
  751. indio_dev->num_channels = chip_info->num_channels;
  752. ret = ad799x_update_config(st, st->chip_config->default_config | extra_config);
  753. if (ret)
  754. goto error_disable_vref;
  755. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  756. &ad799x_trigger_handler, NULL);
  757. if (ret)
  758. goto error_disable_vref;
  759. if (client->irq > 0) {
  760. ret = devm_request_threaded_irq(&client->dev,
  761. client->irq,
  762. NULL,
  763. ad799x_event_handler,
  764. IRQF_TRIGGER_FALLING |
  765. IRQF_ONESHOT,
  766. client->name,
  767. indio_dev);
  768. if (ret)
  769. goto error_cleanup_ring;
  770. }
  771. mutex_init(&st->lock);
  772. ret = iio_device_register(indio_dev);
  773. if (ret)
  774. goto error_cleanup_ring;
  775. return 0;
  776. error_cleanup_ring:
  777. iio_triggered_buffer_cleanup(indio_dev);
  778. error_disable_vref:
  779. if (st->vref)
  780. regulator_disable(st->vref);
  781. error_disable_reg:
  782. regulator_disable(st->reg);
  783. return ret;
  784. }
  785. static void ad799x_remove(struct i2c_client *client)
  786. {
  787. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  788. struct ad799x_state *st = iio_priv(indio_dev);
  789. iio_device_unregister(indio_dev);
  790. iio_triggered_buffer_cleanup(indio_dev);
  791. if (st->vref)
  792. regulator_disable(st->vref);
  793. regulator_disable(st->reg);
  794. kfree(st->rx_buf);
  795. }
  796. static int ad799x_suspend(struct device *dev)
  797. {
  798. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  799. struct ad799x_state *st = iio_priv(indio_dev);
  800. if (st->vref)
  801. regulator_disable(st->vref);
  802. regulator_disable(st->reg);
  803. return 0;
  804. }
  805. static int ad799x_resume(struct device *dev)
  806. {
  807. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  808. struct ad799x_state *st = iio_priv(indio_dev);
  809. int ret;
  810. ret = regulator_enable(st->reg);
  811. if (ret) {
  812. dev_err(dev, "Unable to enable vcc regulator\n");
  813. return ret;
  814. }
  815. if (st->vref) {
  816. ret = regulator_enable(st->vref);
  817. if (ret) {
  818. regulator_disable(st->reg);
  819. dev_err(dev, "Unable to enable vref regulator\n");
  820. return ret;
  821. }
  822. }
  823. /* resync config */
  824. ret = ad799x_update_config(st, st->config);
  825. if (ret) {
  826. if (st->vref)
  827. regulator_disable(st->vref);
  828. regulator_disable(st->reg);
  829. return ret;
  830. }
  831. return 0;
  832. }
  833. static DEFINE_SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
  834. static const struct i2c_device_id ad799x_id[] = {
  835. { "ad7991", ad7991 },
  836. { "ad7995", ad7995 },
  837. { "ad7999", ad7999 },
  838. { "ad7992", ad7992 },
  839. { "ad7993", ad7993 },
  840. { "ad7994", ad7994 },
  841. { "ad7997", ad7997 },
  842. { "ad7998", ad7998 },
  843. {}
  844. };
  845. MODULE_DEVICE_TABLE(i2c, ad799x_id);
  846. static struct i2c_driver ad799x_driver = {
  847. .driver = {
  848. .name = "ad799x",
  849. .pm = pm_sleep_ptr(&ad799x_pm_ops),
  850. },
  851. .probe = ad799x_probe,
  852. .remove = ad799x_remove,
  853. .id_table = ad799x_id,
  854. };
  855. module_i2c_driver(ad799x_driver);
  856. MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
  857. MODULE_DESCRIPTION("Analog Devices AD799x ADC");
  858. MODULE_LICENSE("GPL v2");