ti-ads7924.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * IIO driver for Texas Instruments ADS7924 ADC, 12-bit, 4-Channels, I2C
  4. *
  5. * Author: Hugo Villeneuve <hvilleneuve@dimonoff.com>
  6. * Copyright 2022 DimOnOff
  7. *
  8. * based on iio/adc/ti-ads1015.c
  9. * Copyright (c) 2016, Intel Corporation.
  10. *
  11. * Datasheet: https://www.ti.com/lit/gpn/ads7924
  12. */
  13. #include <linux/bitfield.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio/consumer.h>
  16. #include <linux/init.h>
  17. #include <linux/irq.h>
  18. #include <linux/i2c.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/regmap.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/iio/types.h>
  25. #define ADS7924_CHANNELS 4
  26. #define ADS7924_BITS 12
  27. #define ADS7924_DATA_SHIFT 4
  28. /* Registers. */
  29. #define ADS7924_MODECNTRL_REG 0x00
  30. #define ADS7924_INTCNTRL_REG 0x01
  31. #define ADS7924_DATA0_U_REG 0x02
  32. #define ADS7924_DATA0_L_REG 0x03
  33. #define ADS7924_DATA1_U_REG 0x04
  34. #define ADS7924_DATA1_L_REG 0x05
  35. #define ADS7924_DATA2_U_REG 0x06
  36. #define ADS7924_DATA2_L_REG 0x07
  37. #define ADS7924_DATA3_U_REG 0x08
  38. #define ADS7924_DATA3_L_REG 0x09
  39. #define ADS7924_ULR0_REG 0x0A
  40. #define ADS7924_LLR0_REG 0x0B
  41. #define ADS7924_ULR1_REG 0x0C
  42. #define ADS7924_LLR1_REG 0x0D
  43. #define ADS7924_ULR2_REG 0x0E
  44. #define ADS7924_LLR2_REG 0x0F
  45. #define ADS7924_ULR3_REG 0x10
  46. #define ADS7924_LLR3_REG 0x11
  47. #define ADS7924_INTCONFIG_REG 0x12
  48. #define ADS7924_SLPCONFIG_REG 0x13
  49. #define ADS7924_ACQCONFIG_REG 0x14
  50. #define ADS7924_PWRCONFIG_REG 0x15
  51. #define ADS7924_RESET_REG 0x16
  52. /*
  53. * Register address INC bit: when set to '1', the register address is
  54. * automatically incremented after every register read which allows convenient
  55. * reading of multiple registers. Set INC to '0' when reading a single register.
  56. */
  57. #define ADS7924_AUTO_INCREMENT_BIT BIT(7)
  58. #define ADS7924_MODECNTRL_MODE_MASK GENMASK(7, 2)
  59. #define ADS7924_MODECNTRL_SEL_MASK GENMASK(1, 0)
  60. #define ADS7924_CFG_INTPOL_BIT 1
  61. #define ADS7924_CFG_INTTRIG_BIT 0
  62. #define ADS7924_CFG_INTPOL_MASK BIT(ADS7924_CFG_INTPOL_BIT)
  63. #define ADS7924_CFG_INTTRIG_MASK BIT(ADS7924_CFG_INTTRIG_BIT)
  64. /* Interrupt pin polarity */
  65. #define ADS7924_CFG_INTPOL_LOW 0
  66. #define ADS7924_CFG_INTPOL_HIGH 1
  67. /* Interrupt pin signaling */
  68. #define ADS7924_CFG_INTTRIG_LEVEL 0
  69. #define ADS7924_CFG_INTTRIG_EDGE 1
  70. /* Mode control values */
  71. #define ADS7924_MODECNTRL_IDLE 0x00
  72. #define ADS7924_MODECNTRL_AWAKE 0x20
  73. #define ADS7924_MODECNTRL_MANUAL_SINGLE 0x30
  74. #define ADS7924_MODECNTRL_MANUAL_SCAN 0x32
  75. #define ADS7924_MODECNTRL_AUTO_SINGLE 0x31
  76. #define ADS7924_MODECNTRL_AUTO_SCAN 0x33
  77. #define ADS7924_MODECNTRL_AUTO_SINGLE_SLEEP 0x39
  78. #define ADS7924_MODECNTRL_AUTO_SCAN_SLEEP 0x3B
  79. #define ADS7924_MODECNTRL_AUTO_BURST_SLEEP 0x3F
  80. #define ADS7924_ACQTIME_MASK GENMASK(4, 0)
  81. #define ADS7924_PWRUPTIME_MASK GENMASK(4, 0)
  82. /*
  83. * The power-up time is allowed to elapse whenever the device has been shutdown
  84. * in idle mode. Power-up time can allow external circuits, such as an
  85. * operational amplifier, between the MUXOUT and ADCIN pins to turn on.
  86. * The nominal time programmed by the PUTIME[4:0] register bits is given by:
  87. * t PU = PWRUPTIME[4:0] × 2 μs
  88. * If a power-up time is not required, set the bits to '0' to effectively bypass.
  89. */
  90. #define ADS7924_PWRUPTIME_US 0 /* Bypass (0us). */
  91. /*
  92. * Acquisition Time according to ACQTIME[4:0] register bits.
  93. * The Acquisition Time is given by:
  94. * t ACQ = (ACQTIME[4:0] × 2 μs) + 6 μs
  95. * Using default value of 0 for ACQTIME[4:0] results in a minimum acquisition
  96. * time of 6us.
  97. */
  98. #define ADS7924_ACQTIME_US 6
  99. /* The conversion time is always 4μs and cannot be programmed by the user. */
  100. #define ADS7924_CONVTIME_US 4
  101. #define ADS7924_TOTAL_CONVTIME_US (ADS7924_PWRUPTIME_US + ADS7924_ACQTIME_US + \
  102. ADS7924_CONVTIME_US)
  103. #define ADS7924_V_CHAN(_chan, _addr) { \
  104. .type = IIO_VOLTAGE, \
  105. .indexed = 1, \
  106. .channel = _chan, \
  107. .address = _addr, \
  108. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  109. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  110. .datasheet_name = "AIN"#_chan, \
  111. }
  112. struct ads7924_data {
  113. struct device *dev;
  114. struct regmap *regmap;
  115. struct regulator *vref_reg;
  116. /* GPIO descriptor for device hard-reset pin. */
  117. struct gpio_desc *reset_gpio;
  118. /*
  119. * Protects ADC ops, e.g: concurrent sysfs/buffered
  120. * data reads, configuration updates
  121. */
  122. struct mutex lock;
  123. /*
  124. * Set to true when the ADC is switched to the continuous-conversion
  125. * mode and exits from a power-down state. This flag is used to avoid
  126. * getting the stale result from the conversion register.
  127. */
  128. bool conv_invalid;
  129. };
  130. static bool ads7924_is_writeable_reg(struct device *dev, unsigned int reg)
  131. {
  132. switch (reg) {
  133. case ADS7924_MODECNTRL_REG:
  134. case ADS7924_INTCNTRL_REG:
  135. case ADS7924_ULR0_REG:
  136. case ADS7924_LLR0_REG:
  137. case ADS7924_ULR1_REG:
  138. case ADS7924_LLR1_REG:
  139. case ADS7924_ULR2_REG:
  140. case ADS7924_LLR2_REG:
  141. case ADS7924_ULR3_REG:
  142. case ADS7924_LLR3_REG:
  143. case ADS7924_INTCONFIG_REG:
  144. case ADS7924_SLPCONFIG_REG:
  145. case ADS7924_ACQCONFIG_REG:
  146. case ADS7924_PWRCONFIG_REG:
  147. case ADS7924_RESET_REG:
  148. return true;
  149. default:
  150. return false;
  151. }
  152. }
  153. static const struct regmap_config ads7924_regmap_config = {
  154. .reg_bits = 8,
  155. .val_bits = 8,
  156. .max_register = ADS7924_RESET_REG,
  157. .writeable_reg = ads7924_is_writeable_reg,
  158. };
  159. static const struct iio_chan_spec ads7924_channels[] = {
  160. ADS7924_V_CHAN(0, ADS7924_DATA0_U_REG),
  161. ADS7924_V_CHAN(1, ADS7924_DATA1_U_REG),
  162. ADS7924_V_CHAN(2, ADS7924_DATA2_U_REG),
  163. ADS7924_V_CHAN(3, ADS7924_DATA3_U_REG),
  164. };
  165. static int ads7924_get_adc_result(struct ads7924_data *data,
  166. struct iio_chan_spec const *chan, int *val)
  167. {
  168. int ret;
  169. __be16 be_val;
  170. if (chan->channel < 0 || chan->channel >= ADS7924_CHANNELS)
  171. return -EINVAL;
  172. if (data->conv_invalid) {
  173. int conv_time;
  174. conv_time = ADS7924_TOTAL_CONVTIME_US;
  175. /* Allow 10% for internal clock inaccuracy. */
  176. conv_time += conv_time / 10;
  177. usleep_range(conv_time, conv_time + 1);
  178. data->conv_invalid = false;
  179. }
  180. ret = regmap_raw_read(data->regmap, ADS7924_AUTO_INCREMENT_BIT |
  181. chan->address, &be_val, sizeof(be_val));
  182. if (ret)
  183. return ret;
  184. *val = be16_to_cpu(be_val) >> ADS7924_DATA_SHIFT;
  185. return 0;
  186. }
  187. static int ads7924_read_raw(struct iio_dev *indio_dev,
  188. struct iio_chan_spec const *chan, int *val,
  189. int *val2, long mask)
  190. {
  191. int ret, vref_uv;
  192. struct ads7924_data *data = iio_priv(indio_dev);
  193. switch (mask) {
  194. case IIO_CHAN_INFO_RAW:
  195. mutex_lock(&data->lock);
  196. ret = ads7924_get_adc_result(data, chan, val);
  197. mutex_unlock(&data->lock);
  198. if (ret < 0)
  199. return ret;
  200. return IIO_VAL_INT;
  201. case IIO_CHAN_INFO_SCALE:
  202. vref_uv = regulator_get_voltage(data->vref_reg);
  203. if (vref_uv < 0)
  204. return vref_uv;
  205. *val = vref_uv / 1000; /* Convert reg voltage to mV */
  206. *val2 = ADS7924_BITS;
  207. return IIO_VAL_FRACTIONAL_LOG2;
  208. default:
  209. return -EINVAL;
  210. }
  211. }
  212. static const struct iio_info ads7924_info = {
  213. .read_raw = ads7924_read_raw,
  214. };
  215. static int ads7924_get_channels_config(struct i2c_client *client,
  216. struct iio_dev *indio_dev)
  217. {
  218. struct ads7924_data *priv = iio_priv(indio_dev);
  219. struct device *dev = priv->dev;
  220. struct fwnode_handle *node;
  221. int num_channels = 0;
  222. device_for_each_child_node(dev, node) {
  223. u32 pval;
  224. unsigned int channel;
  225. if (fwnode_property_read_u32(node, "reg", &pval)) {
  226. dev_err(dev, "invalid reg on %pfw\n", node);
  227. continue;
  228. }
  229. channel = pval;
  230. if (channel >= ADS7924_CHANNELS) {
  231. dev_err(dev, "invalid channel index %d on %pfw\n",
  232. channel, node);
  233. continue;
  234. }
  235. num_channels++;
  236. }
  237. if (!num_channels)
  238. return -EINVAL;
  239. return 0;
  240. }
  241. static int ads7924_set_conv_mode(struct ads7924_data *data, int mode)
  242. {
  243. int ret;
  244. unsigned int mode_field;
  245. struct device *dev = data->dev;
  246. /*
  247. * When switching between modes, be sure to first select the Awake mode
  248. * and then switch to the desired mode. This procedure ensures the
  249. * internal control logic is properly synchronized.
  250. */
  251. if (mode != ADS7924_MODECNTRL_IDLE) {
  252. mode_field = FIELD_PREP(ADS7924_MODECNTRL_MODE_MASK,
  253. ADS7924_MODECNTRL_AWAKE);
  254. ret = regmap_update_bits(data->regmap, ADS7924_MODECNTRL_REG,
  255. ADS7924_MODECNTRL_MODE_MASK,
  256. mode_field);
  257. if (ret) {
  258. dev_err(dev, "failed to set awake mode (%pe)\n",
  259. ERR_PTR(ret));
  260. return ret;
  261. }
  262. }
  263. mode_field = FIELD_PREP(ADS7924_MODECNTRL_MODE_MASK, mode);
  264. ret = regmap_update_bits(data->regmap, ADS7924_MODECNTRL_REG,
  265. ADS7924_MODECNTRL_MODE_MASK, mode_field);
  266. if (ret)
  267. dev_err(dev, "failed to set mode %d (%pe)\n", mode,
  268. ERR_PTR(ret));
  269. return ret;
  270. }
  271. static int ads7924_reset(struct iio_dev *indio_dev)
  272. {
  273. struct ads7924_data *data = iio_priv(indio_dev);
  274. if (data->reset_gpio) {
  275. gpiod_set_value(data->reset_gpio, 1); /* Assert. */
  276. /* Educated guess: assert time not specified in datasheet... */
  277. mdelay(100);
  278. gpiod_set_value(data->reset_gpio, 0); /* Deassert. */
  279. return 0;
  280. }
  281. /*
  282. * A write of 10101010 to this register will generate a
  283. * software reset of the ADS7924.
  284. */
  285. return regmap_write(data->regmap, ADS7924_RESET_REG, 0b10101010);
  286. };
  287. static void ads7924_reg_disable(void *data)
  288. {
  289. regulator_disable(data);
  290. }
  291. static void ads7924_set_idle_mode(void *data)
  292. {
  293. ads7924_set_conv_mode(data, ADS7924_MODECNTRL_IDLE);
  294. }
  295. static int ads7924_probe(struct i2c_client *client)
  296. {
  297. struct iio_dev *indio_dev;
  298. struct ads7924_data *data;
  299. struct device *dev = &client->dev;
  300. int ret;
  301. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  302. if (!indio_dev)
  303. return dev_err_probe(dev, -ENOMEM,
  304. "failed to allocate iio device\n");
  305. data = iio_priv(indio_dev);
  306. data->dev = dev;
  307. /* Initialize the reset GPIO as output with an initial value of 0. */
  308. data->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
  309. if (IS_ERR(data->reset_gpio))
  310. return dev_err_probe(dev, PTR_ERR(data->reset_gpio),
  311. "failed to get request reset GPIO\n");
  312. mutex_init(&data->lock);
  313. indio_dev->name = "ads7924";
  314. indio_dev->modes = INDIO_DIRECT_MODE;
  315. indio_dev->channels = ads7924_channels;
  316. indio_dev->num_channels = ARRAY_SIZE(ads7924_channels);
  317. indio_dev->info = &ads7924_info;
  318. ret = ads7924_get_channels_config(client, indio_dev);
  319. if (ret < 0)
  320. return dev_err_probe(dev, ret,
  321. "failed to get channels configuration\n");
  322. data->regmap = devm_regmap_init_i2c(client, &ads7924_regmap_config);
  323. if (IS_ERR(data->regmap))
  324. return dev_err_probe(dev, PTR_ERR(data->regmap),
  325. "failed to init regmap\n");
  326. data->vref_reg = devm_regulator_get(dev, "vref");
  327. if (IS_ERR(data->vref_reg))
  328. return dev_err_probe(dev, PTR_ERR(data->vref_reg),
  329. "failed to get vref regulator\n");
  330. ret = regulator_enable(data->vref_reg);
  331. if (ret)
  332. return dev_err_probe(dev, ret,
  333. "failed to enable regulator\n");
  334. ret = devm_add_action_or_reset(dev, ads7924_reg_disable, data->vref_reg);
  335. if (ret)
  336. return dev_err_probe(dev, ret,
  337. "failed to add regulator disable action\n");
  338. ret = ads7924_reset(indio_dev);
  339. if (ret < 0)
  340. return dev_err_probe(dev, ret,
  341. "failed to reset device\n");
  342. ret = ads7924_set_conv_mode(data, ADS7924_MODECNTRL_AUTO_SCAN);
  343. if (ret)
  344. return dev_err_probe(dev, ret,
  345. "failed to set conversion mode\n");
  346. ret = devm_add_action_or_reset(dev, ads7924_set_idle_mode, data);
  347. if (ret)
  348. return dev_err_probe(dev, ret,
  349. "failed to add idle mode action\n");
  350. /* Use minimum signal acquire time. */
  351. ret = regmap_update_bits(data->regmap, ADS7924_ACQCONFIG_REG,
  352. ADS7924_ACQTIME_MASK,
  353. FIELD_PREP(ADS7924_ACQTIME_MASK, 0));
  354. if (ret < 0)
  355. return dev_err_probe(dev, ret,
  356. "failed to configure signal acquire time\n");
  357. /* Disable power-up time. */
  358. ret = regmap_update_bits(data->regmap, ADS7924_PWRCONFIG_REG,
  359. ADS7924_PWRUPTIME_MASK,
  360. FIELD_PREP(ADS7924_PWRUPTIME_MASK, 0));
  361. if (ret < 0)
  362. return dev_err_probe(dev, ret,
  363. "failed to configure power-up time\n");
  364. data->conv_invalid = true;
  365. ret = devm_iio_device_register(dev, indio_dev);
  366. if (ret < 0)
  367. return dev_err_probe(dev, ret,
  368. "failed to register IIO device\n");
  369. return 0;
  370. }
  371. static const struct i2c_device_id ads7924_id[] = {
  372. { "ads7924" },
  373. { }
  374. };
  375. MODULE_DEVICE_TABLE(i2c, ads7924_id);
  376. static const struct of_device_id ads7924_of_match[] = {
  377. { .compatible = "ti,ads7924", },
  378. { }
  379. };
  380. MODULE_DEVICE_TABLE(of, ads7924_of_match);
  381. static struct i2c_driver ads7924_driver = {
  382. .driver = {
  383. .name = "ads7924",
  384. .of_match_table = ads7924_of_match,
  385. },
  386. .probe = ads7924_probe,
  387. .id_table = ads7924_id,
  388. };
  389. module_i2c_driver(ads7924_driver);
  390. MODULE_AUTHOR("Hugo Villeneuve <hvilleneuve@dimonoff.com>");
  391. MODULE_DESCRIPTION("Texas Instruments ADS7924 ADC I2C driver");
  392. MODULE_LICENSE("GPL");