ad5449.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog
  4. * Converter driver.
  5. *
  6. * Copyright 2012 Analog Devices Inc.
  7. * Author: Lars-Peter Clausen <lars@metafoo.de>
  8. */
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/unaligned.h>
  18. #include <linux/iio/iio.h>
  19. #include <linux/iio/sysfs.h>
  20. #define AD5449_MAX_CHANNELS 2
  21. #define AD5449_MAX_VREFS 2
  22. #define AD5449_CMD_NOOP 0x0
  23. #define AD5449_CMD_LOAD_AND_UPDATE(x) (0x1 + (x) * 3)
  24. #define AD5449_CMD_READ(x) (0x2 + (x) * 3)
  25. #define AD5449_CMD_LOAD(x) (0x3 + (x) * 3)
  26. #define AD5449_CMD_CTRL 13
  27. #define AD5449_CTRL_SDO_OFFSET 10
  28. #define AD5449_CTRL_DAISY_CHAIN BIT(9)
  29. #define AD5449_CTRL_HCLR_TO_MIDSCALE BIT(8)
  30. #define AD5449_CTRL_SAMPLE_RISING BIT(7)
  31. /**
  32. * struct ad5449_chip_info - chip specific information
  33. * @channels: Channel specification
  34. * @num_channels: Number of channels
  35. * @has_ctrl: Chip has a control register
  36. */
  37. struct ad5449_chip_info {
  38. const struct iio_chan_spec *channels;
  39. unsigned int num_channels;
  40. bool has_ctrl;
  41. };
  42. /**
  43. * struct ad5449 - driver instance specific data
  44. * @spi: the SPI device for this driver instance
  45. * @chip_info: chip model specific constants, available modes etc
  46. * @vref_reg: vref supply regulators
  47. * @has_sdo: whether the SDO line is connected
  48. * @dac_cache: Cache for the DAC values
  49. * @data: spi transfer buffers
  50. * @lock: lock to protect the data buffer during SPI ops
  51. */
  52. struct ad5449 {
  53. struct spi_device *spi;
  54. const struct ad5449_chip_info *chip_info;
  55. struct regulator_bulk_data vref_reg[AD5449_MAX_VREFS];
  56. struct mutex lock;
  57. bool has_sdo;
  58. uint16_t dac_cache[AD5449_MAX_CHANNELS];
  59. /*
  60. * DMA (thus cache coherency maintenance) may require the
  61. * transfer buffers to live in their own cache lines.
  62. */
  63. __be16 data[2] __aligned(IIO_DMA_MINALIGN);
  64. };
  65. enum ad5449_type {
  66. ID_AD5426,
  67. ID_AD5429,
  68. ID_AD5432,
  69. ID_AD5439,
  70. ID_AD5443,
  71. ID_AD5449,
  72. };
  73. static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr,
  74. unsigned int val)
  75. {
  76. struct ad5449 *st = iio_priv(indio_dev);
  77. int ret;
  78. mutex_lock(&st->lock);
  79. st->data[0] = cpu_to_be16((addr << 12) | val);
  80. ret = spi_write(st->spi, st->data, 2);
  81. mutex_unlock(&st->lock);
  82. return ret;
  83. }
  84. static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr,
  85. unsigned int *val)
  86. {
  87. struct ad5449 *st = iio_priv(indio_dev);
  88. int ret;
  89. struct spi_transfer t[] = {
  90. {
  91. .tx_buf = &st->data[0],
  92. .len = 2,
  93. .cs_change = 1,
  94. }, {
  95. .tx_buf = &st->data[1],
  96. .rx_buf = &st->data[1],
  97. .len = 2,
  98. },
  99. };
  100. mutex_lock(&st->lock);
  101. st->data[0] = cpu_to_be16(addr << 12);
  102. st->data[1] = cpu_to_be16(AD5449_CMD_NOOP);
  103. ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
  104. if (ret < 0)
  105. goto out_unlock;
  106. *val = be16_to_cpu(st->data[1]);
  107. out_unlock:
  108. mutex_unlock(&st->lock);
  109. return ret;
  110. }
  111. static int ad5449_read_raw(struct iio_dev *indio_dev,
  112. struct iio_chan_spec const *chan, int *val, int *val2, long info)
  113. {
  114. struct ad5449 *st = iio_priv(indio_dev);
  115. struct regulator_bulk_data *reg;
  116. int scale_uv;
  117. int ret;
  118. switch (info) {
  119. case IIO_CHAN_INFO_RAW:
  120. if (st->has_sdo) {
  121. ret = ad5449_read(indio_dev,
  122. AD5449_CMD_READ(chan->address), val);
  123. if (ret)
  124. return ret;
  125. *val &= 0xfff;
  126. } else {
  127. *val = st->dac_cache[chan->address];
  128. }
  129. return IIO_VAL_INT;
  130. case IIO_CHAN_INFO_SCALE:
  131. reg = &st->vref_reg[chan->channel];
  132. scale_uv = regulator_get_voltage(reg->consumer);
  133. if (scale_uv < 0)
  134. return scale_uv;
  135. *val = scale_uv / 1000;
  136. *val2 = chan->scan_type.realbits;
  137. return IIO_VAL_FRACTIONAL_LOG2;
  138. default:
  139. break;
  140. }
  141. return -EINVAL;
  142. }
  143. static int ad5449_write_raw(struct iio_dev *indio_dev,
  144. struct iio_chan_spec const *chan, int val, int val2, long info)
  145. {
  146. struct ad5449 *st = iio_priv(indio_dev);
  147. int ret;
  148. switch (info) {
  149. case IIO_CHAN_INFO_RAW:
  150. if (val < 0 || val >= (1 << chan->scan_type.realbits))
  151. return -EINVAL;
  152. ret = ad5449_write(indio_dev,
  153. AD5449_CMD_LOAD_AND_UPDATE(chan->address),
  154. val << chan->scan_type.shift);
  155. if (ret == 0)
  156. st->dac_cache[chan->address] = val;
  157. break;
  158. default:
  159. ret = -EINVAL;
  160. }
  161. return ret;
  162. }
  163. static const struct iio_info ad5449_info = {
  164. .read_raw = ad5449_read_raw,
  165. .write_raw = ad5449_write_raw,
  166. };
  167. #define AD5449_CHANNEL(chan, bits) { \
  168. .type = IIO_VOLTAGE, \
  169. .indexed = 1, \
  170. .output = 1, \
  171. .channel = (chan), \
  172. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  173. BIT(IIO_CHAN_INFO_SCALE), \
  174. .address = (chan), \
  175. .scan_type = { \
  176. .sign = 'u', \
  177. .realbits = (bits), \
  178. .storagebits = 16, \
  179. .shift = 12 - (bits), \
  180. }, \
  181. }
  182. #define DECLARE_AD5449_CHANNELS(name, bits) \
  183. const struct iio_chan_spec name[] = { \
  184. AD5449_CHANNEL(0, bits), \
  185. AD5449_CHANNEL(1, bits), \
  186. }
  187. static DECLARE_AD5449_CHANNELS(ad5429_channels, 8);
  188. static DECLARE_AD5449_CHANNELS(ad5439_channels, 10);
  189. static DECLARE_AD5449_CHANNELS(ad5449_channels, 12);
  190. static const struct ad5449_chip_info ad5449_chip_info[] = {
  191. [ID_AD5426] = {
  192. .channels = ad5429_channels,
  193. .num_channels = 1,
  194. .has_ctrl = false,
  195. },
  196. [ID_AD5429] = {
  197. .channels = ad5429_channels,
  198. .num_channels = 2,
  199. .has_ctrl = true,
  200. },
  201. [ID_AD5432] = {
  202. .channels = ad5439_channels,
  203. .num_channels = 1,
  204. .has_ctrl = false,
  205. },
  206. [ID_AD5439] = {
  207. .channels = ad5439_channels,
  208. .num_channels = 2,
  209. .has_ctrl = true,
  210. },
  211. [ID_AD5443] = {
  212. .channels = ad5449_channels,
  213. .num_channels = 1,
  214. .has_ctrl = false,
  215. },
  216. [ID_AD5449] = {
  217. .channels = ad5449_channels,
  218. .num_channels = 2,
  219. .has_ctrl = true,
  220. },
  221. };
  222. static const char *ad5449_vref_name(struct ad5449 *st, int n)
  223. {
  224. if (st->chip_info->num_channels == 1)
  225. return "VREF";
  226. if (n == 0)
  227. return "VREFA";
  228. else
  229. return "VREFB";
  230. }
  231. static int ad5449_spi_probe(struct spi_device *spi)
  232. {
  233. const struct spi_device_id *id = spi_get_device_id(spi);
  234. struct iio_dev *indio_dev;
  235. struct ad5449 *st;
  236. unsigned int i;
  237. int ret;
  238. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  239. if (indio_dev == NULL)
  240. return -ENOMEM;
  241. st = iio_priv(indio_dev);
  242. spi_set_drvdata(spi, indio_dev);
  243. st->chip_info = &ad5449_chip_info[id->driver_data];
  244. st->spi = spi;
  245. for (i = 0; i < st->chip_info->num_channels; ++i)
  246. st->vref_reg[i].supply = ad5449_vref_name(st, i);
  247. ret = devm_regulator_bulk_get(&spi->dev, st->chip_info->num_channels,
  248. st->vref_reg);
  249. if (ret)
  250. return ret;
  251. ret = regulator_bulk_enable(st->chip_info->num_channels, st->vref_reg);
  252. if (ret)
  253. return ret;
  254. indio_dev->name = id->name;
  255. indio_dev->info = &ad5449_info;
  256. indio_dev->modes = INDIO_DIRECT_MODE;
  257. indio_dev->channels = st->chip_info->channels;
  258. indio_dev->num_channels = st->chip_info->num_channels;
  259. mutex_init(&st->lock);
  260. if (st->chip_info->has_ctrl) {
  261. st->has_sdo = true;
  262. ad5449_write(indio_dev, AD5449_CMD_CTRL, 0x0);
  263. }
  264. ret = iio_device_register(indio_dev);
  265. if (ret)
  266. goto error_disable_reg;
  267. return 0;
  268. error_disable_reg:
  269. regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
  270. return ret;
  271. }
  272. static void ad5449_spi_remove(struct spi_device *spi)
  273. {
  274. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  275. struct ad5449 *st = iio_priv(indio_dev);
  276. iio_device_unregister(indio_dev);
  277. regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
  278. }
  279. static const struct spi_device_id ad5449_spi_ids[] = {
  280. { "ad5415", ID_AD5449 },
  281. { "ad5426", ID_AD5426 },
  282. { "ad5429", ID_AD5429 },
  283. { "ad5432", ID_AD5432 },
  284. { "ad5439", ID_AD5439 },
  285. { "ad5443", ID_AD5443 },
  286. { "ad5449", ID_AD5449 },
  287. {}
  288. };
  289. MODULE_DEVICE_TABLE(spi, ad5449_spi_ids);
  290. static struct spi_driver ad5449_spi_driver = {
  291. .driver = {
  292. .name = "ad5449",
  293. },
  294. .probe = ad5449_spi_probe,
  295. .remove = ad5449_spi_remove,
  296. .id_table = ad5449_spi_ids,
  297. };
  298. module_spi_driver(ad5449_spi_driver);
  299. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  300. MODULE_DESCRIPTION("Analog Devices AD5449 and similar DACs");
  301. MODULE_LICENSE("GPL v2");