stm32-dac-core.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * This file is part of STM32 DAC driver
  4. *
  5. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  6. * Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
  7. *
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/delay.h>
  11. #include <linux/mod_devicetable.h>
  12. #include <linux/module.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/property.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <linux/reset.h>
  19. #include "stm32-dac-core.h"
  20. /**
  21. * struct stm32_dac_priv - stm32 DAC core private data
  22. * @pclk: peripheral clock common for all DACs
  23. * @vref: regulator reference
  24. * @common: Common data for all DAC instances
  25. */
  26. struct stm32_dac_priv {
  27. struct clk *pclk;
  28. struct regulator *vref;
  29. struct stm32_dac_common common;
  30. };
  31. /**
  32. * struct stm32_dac_cfg - DAC configuration
  33. * @has_hfsel: DAC has high frequency control
  34. */
  35. struct stm32_dac_cfg {
  36. bool has_hfsel;
  37. };
  38. static struct stm32_dac_priv *to_stm32_dac_priv(struct stm32_dac_common *com)
  39. {
  40. return container_of(com, struct stm32_dac_priv, common);
  41. }
  42. static const struct regmap_config stm32_dac_regmap_cfg = {
  43. .reg_bits = 32,
  44. .val_bits = 32,
  45. .reg_stride = sizeof(u32),
  46. .max_register = 0x3fc,
  47. };
  48. static int stm32_dac_core_hw_start(struct device *dev)
  49. {
  50. struct stm32_dac_common *common = dev_get_drvdata(dev);
  51. struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
  52. int ret;
  53. ret = regulator_enable(priv->vref);
  54. if (ret < 0) {
  55. dev_err(dev, "vref enable failed: %d\n", ret);
  56. return ret;
  57. }
  58. ret = clk_prepare_enable(priv->pclk);
  59. if (ret < 0) {
  60. dev_err(dev, "pclk enable failed: %d\n", ret);
  61. goto err_regulator_disable;
  62. }
  63. return 0;
  64. err_regulator_disable:
  65. regulator_disable(priv->vref);
  66. return ret;
  67. }
  68. static void stm32_dac_core_hw_stop(struct device *dev)
  69. {
  70. struct stm32_dac_common *common = dev_get_drvdata(dev);
  71. struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
  72. clk_disable_unprepare(priv->pclk);
  73. regulator_disable(priv->vref);
  74. }
  75. static int stm32_dac_probe(struct platform_device *pdev)
  76. {
  77. struct device *dev = &pdev->dev;
  78. const struct stm32_dac_cfg *cfg;
  79. struct stm32_dac_priv *priv;
  80. struct regmap *regmap;
  81. void __iomem *mmio;
  82. struct reset_control *rst;
  83. int ret;
  84. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  85. if (!priv)
  86. return -ENOMEM;
  87. platform_set_drvdata(pdev, &priv->common);
  88. cfg = device_get_match_data(dev);
  89. mmio = devm_platform_ioremap_resource(pdev, 0);
  90. if (IS_ERR(mmio))
  91. return PTR_ERR(mmio);
  92. regmap = devm_regmap_init_mmio_clk(dev, "pclk", mmio,
  93. &stm32_dac_regmap_cfg);
  94. if (IS_ERR(regmap))
  95. return PTR_ERR(regmap);
  96. priv->common.regmap = regmap;
  97. priv->pclk = devm_clk_get(dev, "pclk");
  98. if (IS_ERR(priv->pclk))
  99. return dev_err_probe(dev, PTR_ERR(priv->pclk), "pclk get failed\n");
  100. priv->vref = devm_regulator_get(dev, "vref");
  101. if (IS_ERR(priv->vref))
  102. return dev_err_probe(dev, PTR_ERR(priv->vref), "vref get failed\n");
  103. pm_runtime_get_noresume(dev);
  104. pm_runtime_set_active(dev);
  105. pm_runtime_enable(dev);
  106. ret = stm32_dac_core_hw_start(dev);
  107. if (ret)
  108. goto err_pm_stop;
  109. ret = regulator_get_voltage(priv->vref);
  110. if (ret < 0) {
  111. dev_err(dev, "vref get voltage failed, %d\n", ret);
  112. goto err_hw_stop;
  113. }
  114. priv->common.vref_mv = ret / 1000;
  115. dev_dbg(dev, "vref+=%dmV\n", priv->common.vref_mv);
  116. rst = devm_reset_control_get_optional_exclusive(dev, NULL);
  117. if (rst) {
  118. if (IS_ERR(rst)) {
  119. ret = dev_err_probe(dev, PTR_ERR(rst), "reset get failed\n");
  120. goto err_hw_stop;
  121. }
  122. reset_control_assert(rst);
  123. udelay(2);
  124. reset_control_deassert(rst);
  125. }
  126. if (cfg && cfg->has_hfsel) {
  127. /* When clock speed is higher than 80MHz, set HFSEL */
  128. priv->common.hfsel = (clk_get_rate(priv->pclk) > 80000000UL);
  129. ret = regmap_update_bits(regmap, STM32_DAC_CR,
  130. STM32H7_DAC_CR_HFSEL,
  131. priv->common.hfsel ?
  132. STM32H7_DAC_CR_HFSEL : 0);
  133. if (ret)
  134. goto err_hw_stop;
  135. }
  136. ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, dev);
  137. if (ret < 0) {
  138. dev_err(dev, "failed to populate DT children\n");
  139. goto err_hw_stop;
  140. }
  141. pm_runtime_put(dev);
  142. return 0;
  143. err_hw_stop:
  144. stm32_dac_core_hw_stop(dev);
  145. err_pm_stop:
  146. pm_runtime_disable(dev);
  147. pm_runtime_set_suspended(dev);
  148. pm_runtime_put_noidle(dev);
  149. return ret;
  150. }
  151. static void stm32_dac_remove(struct platform_device *pdev)
  152. {
  153. pm_runtime_get_sync(&pdev->dev);
  154. of_platform_depopulate(&pdev->dev);
  155. stm32_dac_core_hw_stop(&pdev->dev);
  156. pm_runtime_disable(&pdev->dev);
  157. pm_runtime_set_suspended(&pdev->dev);
  158. pm_runtime_put_noidle(&pdev->dev);
  159. }
  160. static int stm32_dac_core_resume(struct device *dev)
  161. {
  162. struct stm32_dac_common *common = dev_get_drvdata(dev);
  163. struct stm32_dac_priv *priv = to_stm32_dac_priv(common);
  164. int ret;
  165. if (priv->common.hfsel) {
  166. /* restore hfsel (maybe lost under low power state) */
  167. ret = regmap_set_bits(priv->common.regmap, STM32_DAC_CR,
  168. STM32H7_DAC_CR_HFSEL);
  169. if (ret)
  170. return ret;
  171. }
  172. return pm_runtime_force_resume(dev);
  173. }
  174. static int stm32_dac_core_runtime_suspend(struct device *dev)
  175. {
  176. stm32_dac_core_hw_stop(dev);
  177. return 0;
  178. }
  179. static int stm32_dac_core_runtime_resume(struct device *dev)
  180. {
  181. return stm32_dac_core_hw_start(dev);
  182. }
  183. static const struct dev_pm_ops stm32_dac_core_pm_ops = {
  184. SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, stm32_dac_core_resume)
  185. RUNTIME_PM_OPS(stm32_dac_core_runtime_suspend,
  186. stm32_dac_core_runtime_resume,
  187. NULL)
  188. };
  189. static const struct stm32_dac_cfg stm32h7_dac_cfg = {
  190. .has_hfsel = true,
  191. };
  192. static const struct of_device_id stm32_dac_of_match[] = {
  193. {
  194. .compatible = "st,stm32f4-dac-core",
  195. }, {
  196. .compatible = "st,stm32h7-dac-core",
  197. .data = (void *)&stm32h7_dac_cfg,
  198. },
  199. {},
  200. };
  201. MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
  202. static struct platform_driver stm32_dac_driver = {
  203. .probe = stm32_dac_probe,
  204. .remove_new = stm32_dac_remove,
  205. .driver = {
  206. .name = "stm32-dac-core",
  207. .of_match_table = stm32_dac_of_match,
  208. .pm = pm_ptr(&stm32_dac_core_pm_ops),
  209. },
  210. };
  211. module_platform_driver(stm32_dac_driver);
  212. MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
  213. MODULE_DESCRIPTION("STMicroelectronics STM32 DAC core driver");
  214. MODULE_LICENSE("GPL v2");
  215. MODULE_ALIAS("platform:stm32-dac-core");