gp2ap020a00f.c 45 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  4. * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
  5. *
  6. * IIO features supported by the driver:
  7. *
  8. * Read-only raw channels:
  9. * - illuminance_clear [lux]
  10. * - illuminance_ir
  11. * - proximity
  12. *
  13. * Triggered buffer:
  14. * - illuminance_clear
  15. * - illuminance_ir
  16. * - proximity
  17. *
  18. * Events:
  19. * - illuminance_clear (rising and falling)
  20. * - proximity (rising and falling)
  21. * - both falling and rising thresholds for the proximity events
  22. * must be set to the values greater than 0.
  23. *
  24. * The driver supports triggered buffers for all the three
  25. * channels as well as high and low threshold events for the
  26. * illuminance_clear and proxmimity channels. Triggers
  27. * can be enabled simultaneously with both illuminance_clear
  28. * events. Proximity events cannot be enabled simultaneously
  29. * with any triggers or illuminance events. Enabling/disabling
  30. * one of the proximity events automatically enables/disables
  31. * the other one.
  32. */
  33. #include <linux/debugfs.h>
  34. #include <linux/delay.h>
  35. #include <linux/i2c.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/irq.h>
  38. #include <linux/irq_work.h>
  39. #include <linux/module.h>
  40. #include <linux/mod_devicetable.h>
  41. #include <linux/mutex.h>
  42. #include <linux/regmap.h>
  43. #include <linux/regulator/consumer.h>
  44. #include <linux/slab.h>
  45. #include <linux/unaligned.h>
  46. #include <linux/iio/buffer.h>
  47. #include <linux/iio/events.h>
  48. #include <linux/iio/iio.h>
  49. #include <linux/iio/sysfs.h>
  50. #include <linux/iio/trigger.h>
  51. #include <linux/iio/trigger_consumer.h>
  52. #include <linux/iio/triggered_buffer.h>
  53. #define GP2A_I2C_NAME "gp2ap020a00f"
  54. /* Registers */
  55. #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */
  56. #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */
  57. #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */
  58. #define GP2AP020A00F_LED_REG 0x03 /* LED reg */
  59. #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */
  60. #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */
  61. #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */
  62. #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */
  63. #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */
  64. #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */
  65. #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */
  66. #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */
  67. #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */
  68. #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */
  69. #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */
  70. #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */
  71. #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */
  72. #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */
  73. #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */
  74. /* OP_REG bits */
  75. #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */
  76. #define GP2AP020A00F_OP3_SHUTDOWN 0x00
  77. #define GP2AP020A00F_OP3_OPERATION 0x80
  78. #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */
  79. #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
  80. #define GP2AP020A00F_OP2_CONT_OPERATION 0x40
  81. #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */
  82. #define GP2AP020A00F_OP_ALS_AND_PS 0x00
  83. #define GP2AP020A00F_OP_ALS 0x10
  84. #define GP2AP020A00F_OP_PS 0x20
  85. #define GP2AP020A00F_OP_DEBUG 0x30
  86. #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */
  87. #define GP2AP020A00F_PROX_NON_DETECT 0x00
  88. #define GP2AP020A00F_PROX_DETECT 0x08
  89. #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */
  90. #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */
  91. #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */
  92. #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
  93. #define GP2AP020A00F_TYPE_AUTO_CALC 0x01
  94. /* ALS_REG bits */
  95. #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */
  96. #define GP2AP020A00F_PRST_ONCE 0x00
  97. #define GP2AP020A00F_PRST_4_CYCLES 0x40
  98. #define GP2AP020A00F_PRST_8_CYCLES 0x80
  99. #define GP2AP020A00F_PRST_16_CYCLES 0xc0
  100. #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */
  101. #define GP2AP020A00F_RES_A_800ms 0x00
  102. #define GP2AP020A00F_RES_A_400ms 0x08
  103. #define GP2AP020A00F_RES_A_200ms 0x10
  104. #define GP2AP020A00F_RES_A_100ms 0x18
  105. #define GP2AP020A00F_RES_A_25ms 0x20
  106. #define GP2AP020A00F_RES_A_6_25ms 0x28
  107. #define GP2AP020A00F_RES_A_1_56ms 0x30
  108. #define GP2AP020A00F_RES_A_0_39ms 0x38
  109. #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */
  110. #define GP2AP020A00F_RANGE_A_x1 0x00
  111. #define GP2AP020A00F_RANGE_A_x2 0x01
  112. #define GP2AP020A00F_RANGE_A_x4 0x02
  113. #define GP2AP020A00F_RANGE_A_x8 0x03
  114. #define GP2AP020A00F_RANGE_A_x16 0x04
  115. #define GP2AP020A00F_RANGE_A_x32 0x05
  116. #define GP2AP020A00F_RANGE_A_x64 0x06
  117. #define GP2AP020A00F_RANGE_A_x128 0x07
  118. /* PS_REG bits */
  119. #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */
  120. #define GP2AP020A00F_ALC_ON 0x80
  121. #define GP2AP020A00F_ALC_OFF 0x00
  122. #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */
  123. #define GP2AP020A00F_INTTYPE_LEVEL 0x00
  124. #define GP2AP020A00F_INTTYPE_PULSE 0x40
  125. #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */
  126. #define GP2AP020A00F_RES_P_800ms_x2 0x00
  127. #define GP2AP020A00F_RES_P_400ms_x2 0x08
  128. #define GP2AP020A00F_RES_P_200ms_x2 0x10
  129. #define GP2AP020A00F_RES_P_100ms_x2 0x18
  130. #define GP2AP020A00F_RES_P_25ms_x2 0x20
  131. #define GP2AP020A00F_RES_P_6_25ms_x2 0x28
  132. #define GP2AP020A00F_RES_P_1_56ms_x2 0x30
  133. #define GP2AP020A00F_RES_P_0_39ms_x2 0x38
  134. #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */
  135. #define GP2AP020A00F_RANGE_P_x1 0x00
  136. #define GP2AP020A00F_RANGE_P_x2 0x01
  137. #define GP2AP020A00F_RANGE_P_x4 0x02
  138. #define GP2AP020A00F_RANGE_P_x8 0x03
  139. #define GP2AP020A00F_RANGE_P_x16 0x04
  140. #define GP2AP020A00F_RANGE_P_x32 0x05
  141. #define GP2AP020A00F_RANGE_P_x64 0x06
  142. #define GP2AP020A00F_RANGE_P_x128 0x07
  143. /* LED reg bits */
  144. #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */
  145. #define GP2AP020A00F_INTVAL_0 0x00
  146. #define GP2AP020A00F_INTVAL_4 0x40
  147. #define GP2AP020A00F_INTVAL_8 0x80
  148. #define GP2AP020A00F_INTVAL_16 0xc0
  149. #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */
  150. #define GP2AP020A00F_IS_13_8mA 0x00
  151. #define GP2AP020A00F_IS_27_5mA 0x10
  152. #define GP2AP020A00F_IS_55mA 0x20
  153. #define GP2AP020A00F_IS_110mA 0x30
  154. #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */
  155. #define GP2AP020A00F_PIN_ALS_OR_PS 0x00
  156. #define GP2AP020A00F_PIN_ALS 0x04
  157. #define GP2AP020A00F_PIN_PS 0x08
  158. #define GP2AP020A00F_PIN_PS_DETECT 0x0c
  159. #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */
  160. #define GP2AP020A00F_FREQ_327_5kHz 0x00
  161. #define GP2AP020A00F_FREQ_81_8kHz 0x02
  162. #define GP2AP020A00F_RST 0x01 /* Software reset */
  163. #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
  164. #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
  165. #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
  166. #define GP2AP020A00F_CHAN_TIMESTAMP 3
  167. #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
  168. #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \
  169. (chan) * 2)
  170. #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \
  171. (th_val_id) * 2)
  172. #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
  173. #define GP2AP020A00F_SUBTRACT_MODE 0
  174. #define GP2AP020A00F_ADD_MODE 1
  175. #define GP2AP020A00F_MAX_CHANNELS 3
  176. enum gp2ap020a00f_opmode {
  177. GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
  178. GP2AP020A00F_OPMODE_READ_RAW_IR,
  179. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
  180. GP2AP020A00F_OPMODE_ALS,
  181. GP2AP020A00F_OPMODE_PS,
  182. GP2AP020A00F_OPMODE_ALS_AND_PS,
  183. GP2AP020A00F_OPMODE_PROX_DETECT,
  184. GP2AP020A00F_OPMODE_SHUTDOWN,
  185. GP2AP020A00F_NUM_OPMODES,
  186. };
  187. enum gp2ap020a00f_cmd {
  188. GP2AP020A00F_CMD_READ_RAW_CLEAR,
  189. GP2AP020A00F_CMD_READ_RAW_IR,
  190. GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
  191. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
  192. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
  193. GP2AP020A00F_CMD_TRIGGER_IR_EN,
  194. GP2AP020A00F_CMD_TRIGGER_IR_DIS,
  195. GP2AP020A00F_CMD_TRIGGER_PROX_EN,
  196. GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
  197. GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
  198. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
  199. GP2AP020A00F_CMD_ALS_LOW_EV_EN,
  200. GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
  201. GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
  202. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
  203. GP2AP020A00F_CMD_PROX_LOW_EV_EN,
  204. GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
  205. };
  206. enum gp2ap020a00f_flags {
  207. GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
  208. GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
  209. GP2AP020A00F_FLAG_PROX_TRIGGER,
  210. GP2AP020A00F_FLAG_PROX_RISING_EV,
  211. GP2AP020A00F_FLAG_PROX_FALLING_EV,
  212. GP2AP020A00F_FLAG_ALS_RISING_EV,
  213. GP2AP020A00F_FLAG_ALS_FALLING_EV,
  214. GP2AP020A00F_FLAG_LUX_MODE_HI,
  215. GP2AP020A00F_FLAG_DATA_READY,
  216. };
  217. enum gp2ap020a00f_thresh_val_id {
  218. GP2AP020A00F_THRESH_TL,
  219. GP2AP020A00F_THRESH_TH,
  220. GP2AP020A00F_THRESH_PL,
  221. GP2AP020A00F_THRESH_PH,
  222. };
  223. struct gp2ap020a00f_data {
  224. struct i2c_client *client;
  225. struct mutex lock;
  226. char *buffer;
  227. struct regulator *vled_reg;
  228. unsigned long flags;
  229. enum gp2ap020a00f_opmode cur_opmode;
  230. struct iio_trigger *trig;
  231. struct regmap *regmap;
  232. unsigned int thresh_val[4];
  233. u8 debug_reg_addr;
  234. struct irq_work work;
  235. wait_queue_head_t data_ready_queue;
  236. };
  237. static const u8 gp2ap020a00f_reg_init_tab[] = {
  238. [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
  239. [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
  240. GP2AP020A00F_RANGE_A_x8,
  241. [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
  242. GP2AP020A00F_RES_P_1_56ms_x2 |
  243. GP2AP020A00F_RANGE_P_x4,
  244. [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
  245. GP2AP020A00F_IS_110mA |
  246. GP2AP020A00F_FREQ_327_5kHz,
  247. [GP2AP020A00F_TL_L_REG] = 0,
  248. [GP2AP020A00F_TL_H_REG] = 0,
  249. [GP2AP020A00F_TH_L_REG] = 0,
  250. [GP2AP020A00F_TH_H_REG] = 0,
  251. [GP2AP020A00F_PL_L_REG] = 0,
  252. [GP2AP020A00F_PL_H_REG] = 0,
  253. [GP2AP020A00F_PH_L_REG] = 0,
  254. [GP2AP020A00F_PH_H_REG] = 0,
  255. };
  256. static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
  257. {
  258. switch (reg) {
  259. case GP2AP020A00F_OP_REG:
  260. case GP2AP020A00F_D0_L_REG:
  261. case GP2AP020A00F_D0_H_REG:
  262. case GP2AP020A00F_D1_L_REG:
  263. case GP2AP020A00F_D1_H_REG:
  264. case GP2AP020A00F_D2_L_REG:
  265. case GP2AP020A00F_D2_H_REG:
  266. return true;
  267. default:
  268. return false;
  269. }
  270. }
  271. static const struct regmap_config gp2ap020a00f_regmap_config = {
  272. .reg_bits = 8,
  273. .val_bits = 8,
  274. .max_register = GP2AP020A00F_D2_H_REG,
  275. .cache_type = REGCACHE_RBTREE,
  276. .volatile_reg = gp2ap020a00f_is_volatile_reg,
  277. };
  278. static const struct gp2ap020a00f_mutable_config_regs {
  279. u8 op_reg;
  280. u8 als_reg;
  281. u8 ps_reg;
  282. u8 led_reg;
  283. } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
  284. [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
  285. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  286. | GP2AP020A00F_OP3_OPERATION
  287. | GP2AP020A00F_TYPE_AUTO_CALC,
  288. GP2AP020A00F_PRST_ONCE,
  289. GP2AP020A00F_INTTYPE_LEVEL,
  290. GP2AP020A00F_PIN_ALS
  291. },
  292. [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
  293. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  294. | GP2AP020A00F_OP3_OPERATION
  295. | GP2AP020A00F_TYPE_MANUAL_CALC,
  296. GP2AP020A00F_PRST_ONCE,
  297. GP2AP020A00F_INTTYPE_LEVEL,
  298. GP2AP020A00F_PIN_ALS
  299. },
  300. [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
  301. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  302. | GP2AP020A00F_OP3_OPERATION
  303. | GP2AP020A00F_TYPE_MANUAL_CALC,
  304. GP2AP020A00F_PRST_ONCE,
  305. GP2AP020A00F_INTTYPE_LEVEL,
  306. GP2AP020A00F_PIN_PS
  307. },
  308. [GP2AP020A00F_OPMODE_PROX_DETECT] = {
  309. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  310. | GP2AP020A00F_OP3_OPERATION
  311. | GP2AP020A00F_TYPE_MANUAL_CALC,
  312. GP2AP020A00F_PRST_4_CYCLES,
  313. GP2AP020A00F_INTTYPE_PULSE,
  314. GP2AP020A00F_PIN_PS_DETECT
  315. },
  316. [GP2AP020A00F_OPMODE_ALS] = {
  317. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  318. | GP2AP020A00F_OP3_OPERATION
  319. | GP2AP020A00F_TYPE_AUTO_CALC,
  320. GP2AP020A00F_PRST_ONCE,
  321. GP2AP020A00F_INTTYPE_LEVEL,
  322. GP2AP020A00F_PIN_ALS
  323. },
  324. [GP2AP020A00F_OPMODE_PS] = {
  325. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  326. | GP2AP020A00F_OP3_OPERATION
  327. | GP2AP020A00F_TYPE_MANUAL_CALC,
  328. GP2AP020A00F_PRST_4_CYCLES,
  329. GP2AP020A00F_INTTYPE_LEVEL,
  330. GP2AP020A00F_PIN_PS
  331. },
  332. [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
  333. GP2AP020A00F_OP_ALS_AND_PS
  334. | GP2AP020A00F_OP2_CONT_OPERATION
  335. | GP2AP020A00F_OP3_OPERATION
  336. | GP2AP020A00F_TYPE_AUTO_CALC,
  337. GP2AP020A00F_PRST_4_CYCLES,
  338. GP2AP020A00F_INTTYPE_LEVEL,
  339. GP2AP020A00F_PIN_ALS_OR_PS
  340. },
  341. [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
  342. };
  343. static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
  344. enum gp2ap020a00f_opmode op)
  345. {
  346. unsigned int op_reg_val;
  347. int err;
  348. if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
  349. err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
  350. &op_reg_val);
  351. if (err < 0)
  352. return err;
  353. /*
  354. * Shutdown the device if the operation being executed entails
  355. * mode transition.
  356. */
  357. if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
  358. (op_reg_val & GP2AP020A00F_OP_MASK)) {
  359. /* set shutdown mode */
  360. err = regmap_update_bits(data->regmap,
  361. GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
  362. GP2AP020A00F_OP3_SHUTDOWN);
  363. if (err < 0)
  364. return err;
  365. }
  366. err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
  367. GP2AP020A00F_PRST_MASK, opmode_regs_settings[op]
  368. .als_reg);
  369. if (err < 0)
  370. return err;
  371. err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
  372. GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op]
  373. .ps_reg);
  374. if (err < 0)
  375. return err;
  376. err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
  377. GP2AP020A00F_PIN_MASK, opmode_regs_settings[op]
  378. .led_reg);
  379. if (err < 0)
  380. return err;
  381. }
  382. /* Set OP_REG and apply operation mode (power on / off) */
  383. err = regmap_update_bits(data->regmap,
  384. GP2AP020A00F_OP_REG,
  385. GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
  386. GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
  387. opmode_regs_settings[op].op_reg);
  388. if (err < 0)
  389. return err;
  390. data->cur_opmode = op;
  391. return 0;
  392. }
  393. static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
  394. {
  395. return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
  396. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
  397. test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
  398. test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  399. }
  400. static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
  401. {
  402. return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
  403. test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  404. }
  405. static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
  406. enum gp2ap020a00f_thresh_val_id th_val_id,
  407. bool enable)
  408. {
  409. __le16 thresh_buf = 0;
  410. unsigned int thresh_reg_val;
  411. if (!enable)
  412. thresh_reg_val = 0;
  413. else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
  414. th_val_id != GP2AP020A00F_THRESH_PL &&
  415. th_val_id != GP2AP020A00F_THRESH_PH)
  416. /*
  417. * For the high lux mode ALS threshold has to be scaled down
  418. * to allow for proper comparison with the output value.
  419. */
  420. thresh_reg_val = data->thresh_val[th_val_id] / 16;
  421. else
  422. thresh_reg_val = data->thresh_val[th_val_id] > 16000 ?
  423. 16000 :
  424. data->thresh_val[th_val_id];
  425. thresh_buf = cpu_to_le16(thresh_reg_val);
  426. return regmap_bulk_write(data->regmap,
  427. GP2AP020A00F_THRESH_REG(th_val_id),
  428. (u8 *)&thresh_buf, 2);
  429. }
  430. static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
  431. enum gp2ap020a00f_opmode diff_mode, int add_sub)
  432. {
  433. enum gp2ap020a00f_opmode new_mode;
  434. if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
  435. diff_mode != GP2AP020A00F_OPMODE_PS)
  436. return -EINVAL;
  437. if (add_sub == GP2AP020A00F_ADD_MODE) {
  438. if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
  439. new_mode = diff_mode;
  440. else
  441. new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
  442. } else {
  443. if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
  444. new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
  445. GP2AP020A00F_OPMODE_PS :
  446. GP2AP020A00F_OPMODE_ALS;
  447. else
  448. new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
  449. }
  450. return gp2ap020a00f_set_operation_mode(data, new_mode);
  451. }
  452. static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
  453. enum gp2ap020a00f_cmd cmd)
  454. {
  455. int err = 0;
  456. switch (cmd) {
  457. case GP2AP020A00F_CMD_READ_RAW_CLEAR:
  458. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  459. return -EBUSY;
  460. err = gp2ap020a00f_set_operation_mode(data,
  461. GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
  462. break;
  463. case GP2AP020A00F_CMD_READ_RAW_IR:
  464. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  465. return -EBUSY;
  466. err = gp2ap020a00f_set_operation_mode(data,
  467. GP2AP020A00F_OPMODE_READ_RAW_IR);
  468. break;
  469. case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
  470. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  471. return -EBUSY;
  472. err = gp2ap020a00f_set_operation_mode(data,
  473. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
  474. break;
  475. case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
  476. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  477. return -EBUSY;
  478. if (!gp2ap020a00f_als_enabled(data))
  479. err = gp2ap020a00f_alter_opmode(data,
  480. GP2AP020A00F_OPMODE_ALS,
  481. GP2AP020A00F_ADD_MODE);
  482. set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  483. break;
  484. case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
  485. clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  486. if (gp2ap020a00f_als_enabled(data))
  487. break;
  488. err = gp2ap020a00f_alter_opmode(data,
  489. GP2AP020A00F_OPMODE_ALS,
  490. GP2AP020A00F_SUBTRACT_MODE);
  491. break;
  492. case GP2AP020A00F_CMD_TRIGGER_IR_EN:
  493. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  494. return -EBUSY;
  495. if (!gp2ap020a00f_als_enabled(data))
  496. err = gp2ap020a00f_alter_opmode(data,
  497. GP2AP020A00F_OPMODE_ALS,
  498. GP2AP020A00F_ADD_MODE);
  499. set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  500. break;
  501. case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
  502. clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  503. if (gp2ap020a00f_als_enabled(data))
  504. break;
  505. err = gp2ap020a00f_alter_opmode(data,
  506. GP2AP020A00F_OPMODE_ALS,
  507. GP2AP020A00F_SUBTRACT_MODE);
  508. break;
  509. case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
  510. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  511. return -EBUSY;
  512. err = gp2ap020a00f_alter_opmode(data,
  513. GP2AP020A00F_OPMODE_PS,
  514. GP2AP020A00F_ADD_MODE);
  515. set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  516. break;
  517. case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
  518. clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  519. err = gp2ap020a00f_alter_opmode(data,
  520. GP2AP020A00F_OPMODE_PS,
  521. GP2AP020A00F_SUBTRACT_MODE);
  522. break;
  523. case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
  524. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  525. return 0;
  526. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  527. return -EBUSY;
  528. if (!gp2ap020a00f_als_enabled(data)) {
  529. err = gp2ap020a00f_alter_opmode(data,
  530. GP2AP020A00F_OPMODE_ALS,
  531. GP2AP020A00F_ADD_MODE);
  532. if (err < 0)
  533. return err;
  534. }
  535. set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  536. err = gp2ap020a00f_write_event_threshold(data,
  537. GP2AP020A00F_THRESH_TH, true);
  538. break;
  539. case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
  540. if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  541. return 0;
  542. clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  543. if (!gp2ap020a00f_als_enabled(data)) {
  544. err = gp2ap020a00f_alter_opmode(data,
  545. GP2AP020A00F_OPMODE_ALS,
  546. GP2AP020A00F_SUBTRACT_MODE);
  547. if (err < 0)
  548. return err;
  549. }
  550. err = gp2ap020a00f_write_event_threshold(data,
  551. GP2AP020A00F_THRESH_TH, false);
  552. break;
  553. case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
  554. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  555. return 0;
  556. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  557. return -EBUSY;
  558. if (!gp2ap020a00f_als_enabled(data)) {
  559. err = gp2ap020a00f_alter_opmode(data,
  560. GP2AP020A00F_OPMODE_ALS,
  561. GP2AP020A00F_ADD_MODE);
  562. if (err < 0)
  563. return err;
  564. }
  565. set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  566. err = gp2ap020a00f_write_event_threshold(data,
  567. GP2AP020A00F_THRESH_TL, true);
  568. break;
  569. case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
  570. if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  571. return 0;
  572. clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  573. if (!gp2ap020a00f_als_enabled(data)) {
  574. err = gp2ap020a00f_alter_opmode(data,
  575. GP2AP020A00F_OPMODE_ALS,
  576. GP2AP020A00F_SUBTRACT_MODE);
  577. if (err < 0)
  578. return err;
  579. }
  580. err = gp2ap020a00f_write_event_threshold(data,
  581. GP2AP020A00F_THRESH_TL, false);
  582. break;
  583. case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
  584. if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  585. return 0;
  586. if (gp2ap020a00f_als_enabled(data) ||
  587. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  588. return -EBUSY;
  589. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  590. err = gp2ap020a00f_set_operation_mode(data,
  591. GP2AP020A00F_OPMODE_PROX_DETECT);
  592. if (err < 0)
  593. return err;
  594. }
  595. set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  596. err = gp2ap020a00f_write_event_threshold(data,
  597. GP2AP020A00F_THRESH_PH, true);
  598. break;
  599. case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
  600. if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  601. return 0;
  602. clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  603. err = gp2ap020a00f_set_operation_mode(data,
  604. GP2AP020A00F_OPMODE_SHUTDOWN);
  605. if (err < 0)
  606. return err;
  607. err = gp2ap020a00f_write_event_threshold(data,
  608. GP2AP020A00F_THRESH_PH, false);
  609. break;
  610. case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
  611. if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  612. return 0;
  613. if (gp2ap020a00f_als_enabled(data) ||
  614. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  615. return -EBUSY;
  616. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  617. err = gp2ap020a00f_set_operation_mode(data,
  618. GP2AP020A00F_OPMODE_PROX_DETECT);
  619. if (err < 0)
  620. return err;
  621. }
  622. set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  623. err = gp2ap020a00f_write_event_threshold(data,
  624. GP2AP020A00F_THRESH_PL, true);
  625. break;
  626. case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
  627. if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  628. return 0;
  629. clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  630. err = gp2ap020a00f_set_operation_mode(data,
  631. GP2AP020A00F_OPMODE_SHUTDOWN);
  632. if (err < 0)
  633. return err;
  634. err = gp2ap020a00f_write_event_threshold(data,
  635. GP2AP020A00F_THRESH_PL, false);
  636. break;
  637. }
  638. return err;
  639. }
  640. static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
  641. {
  642. int ret;
  643. ret = wait_event_timeout(data->data_ready_queue,
  644. test_bit(GP2AP020A00F_FLAG_DATA_READY,
  645. &data->flags),
  646. GP2AP020A00F_DATA_READY_TIMEOUT);
  647. clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
  648. return ret > 0 ? 0 : -ETIME;
  649. }
  650. static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
  651. unsigned int output_reg, int *val)
  652. {
  653. u8 reg_buf[2];
  654. int err;
  655. err = wait_conversion_complete_irq(data);
  656. if (err < 0)
  657. dev_dbg(&data->client->dev, "data ready timeout\n");
  658. err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);
  659. if (err < 0)
  660. return err;
  661. *val = le16_to_cpup((__le16 *)reg_buf);
  662. return err;
  663. }
  664. static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
  665. int output_val)
  666. {
  667. u8 new_range = 0xff;
  668. int err;
  669. if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
  670. if (output_val > 16000) {
  671. set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  672. new_range = GP2AP020A00F_RANGE_A_x128;
  673. }
  674. } else {
  675. if (output_val < 1000) {
  676. clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  677. new_range = GP2AP020A00F_RANGE_A_x8;
  678. }
  679. }
  680. if (new_range != 0xff) {
  681. /* Clear als threshold registers to avoid spurious
  682. * events caused by lux mode transition.
  683. */
  684. err = gp2ap020a00f_write_event_threshold(data,
  685. GP2AP020A00F_THRESH_TH, false);
  686. if (err < 0) {
  687. dev_err(&data->client->dev,
  688. "Clearing als threshold register failed.\n");
  689. return false;
  690. }
  691. err = gp2ap020a00f_write_event_threshold(data,
  692. GP2AP020A00F_THRESH_TL, false);
  693. if (err < 0) {
  694. dev_err(&data->client->dev,
  695. "Clearing als threshold register failed.\n");
  696. return false;
  697. }
  698. /* Change lux mode */
  699. err = regmap_update_bits(data->regmap,
  700. GP2AP020A00F_OP_REG,
  701. GP2AP020A00F_OP3_MASK,
  702. GP2AP020A00F_OP3_SHUTDOWN);
  703. if (err < 0) {
  704. dev_err(&data->client->dev,
  705. "Shutting down the device failed.\n");
  706. return false;
  707. }
  708. err = regmap_update_bits(data->regmap,
  709. GP2AP020A00F_ALS_REG,
  710. GP2AP020A00F_RANGE_A_MASK,
  711. new_range);
  712. if (err < 0) {
  713. dev_err(&data->client->dev,
  714. "Adjusting device lux mode failed.\n");
  715. return false;
  716. }
  717. err = regmap_update_bits(data->regmap,
  718. GP2AP020A00F_OP_REG,
  719. GP2AP020A00F_OP3_MASK,
  720. GP2AP020A00F_OP3_OPERATION);
  721. if (err < 0) {
  722. dev_err(&data->client->dev,
  723. "Powering up the device failed.\n");
  724. return false;
  725. }
  726. /* Adjust als threshold register values to the new lux mode */
  727. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
  728. err = gp2ap020a00f_write_event_threshold(data,
  729. GP2AP020A00F_THRESH_TH, true);
  730. if (err < 0) {
  731. dev_err(&data->client->dev,
  732. "Adjusting als threshold value failed.\n");
  733. return false;
  734. }
  735. }
  736. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
  737. err = gp2ap020a00f_write_event_threshold(data,
  738. GP2AP020A00F_THRESH_TL, true);
  739. if (err < 0) {
  740. dev_err(&data->client->dev,
  741. "Adjusting als threshold value failed.\n");
  742. return false;
  743. }
  744. }
  745. return true;
  746. }
  747. return false;
  748. }
  749. static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
  750. int *output_val)
  751. {
  752. if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
  753. *output_val *= 16;
  754. }
  755. static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
  756. {
  757. struct gp2ap020a00f_data *data =
  758. container_of(work, struct gp2ap020a00f_data, work);
  759. iio_trigger_poll(data->trig);
  760. }
  761. static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
  762. {
  763. struct iio_dev *indio_dev = data;
  764. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  765. unsigned int op_reg_val;
  766. int ret;
  767. /* Read interrupt flags */
  768. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
  769. if (ret < 0)
  770. return IRQ_HANDLED;
  771. if (gp2ap020a00f_prox_detect_enabled(priv)) {
  772. if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
  773. iio_push_event(indio_dev,
  774. IIO_UNMOD_EVENT_CODE(
  775. IIO_PROXIMITY,
  776. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  777. IIO_EV_TYPE_ROC,
  778. IIO_EV_DIR_RISING),
  779. iio_get_time_ns(indio_dev));
  780. } else {
  781. iio_push_event(indio_dev,
  782. IIO_UNMOD_EVENT_CODE(
  783. IIO_PROXIMITY,
  784. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  785. IIO_EV_TYPE_ROC,
  786. IIO_EV_DIR_FALLING),
  787. iio_get_time_ns(indio_dev));
  788. }
  789. }
  790. return IRQ_HANDLED;
  791. }
  792. static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
  793. {
  794. struct iio_dev *indio_dev = data;
  795. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  796. u8 op_reg_flags, d0_reg_buf[2];
  797. unsigned int output_val, op_reg_val;
  798. int thresh_val_id, ret;
  799. /* Read interrupt flags */
  800. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG,
  801. &op_reg_val);
  802. if (ret < 0)
  803. goto done;
  804. op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
  805. | GP2AP020A00F_PROX_DETECT);
  806. op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
  807. & ~GP2AP020A00F_PROX_DETECT);
  808. /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */
  809. if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
  810. ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG,
  811. op_reg_val);
  812. if (ret < 0)
  813. goto done;
  814. }
  815. if (op_reg_flags & GP2AP020A00F_FLAG_A) {
  816. /* Check D0 register to assess if the lux mode
  817. * transition is required.
  818. */
  819. ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
  820. d0_reg_buf, 2);
  821. if (ret < 0)
  822. goto done;
  823. output_val = le16_to_cpup((__le16 *)d0_reg_buf);
  824. if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
  825. goto done;
  826. gp2ap020a00f_output_to_lux(priv, &output_val);
  827. /*
  828. * We need to check output value to distinguish
  829. * between high and low ambient light threshold event.
  830. */
  831. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
  832. thresh_val_id =
  833. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
  834. if (output_val > priv->thresh_val[thresh_val_id])
  835. iio_push_event(indio_dev,
  836. IIO_MOD_EVENT_CODE(
  837. IIO_LIGHT,
  838. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  839. IIO_MOD_LIGHT_CLEAR,
  840. IIO_EV_TYPE_THRESH,
  841. IIO_EV_DIR_RISING),
  842. iio_get_time_ns(indio_dev));
  843. }
  844. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
  845. thresh_val_id =
  846. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
  847. if (output_val < priv->thresh_val[thresh_val_id])
  848. iio_push_event(indio_dev,
  849. IIO_MOD_EVENT_CODE(
  850. IIO_LIGHT,
  851. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  852. IIO_MOD_LIGHT_CLEAR,
  853. IIO_EV_TYPE_THRESH,
  854. IIO_EV_DIR_FALLING),
  855. iio_get_time_ns(indio_dev));
  856. }
  857. }
  858. if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
  859. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
  860. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
  861. set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
  862. wake_up(&priv->data_ready_queue);
  863. goto done;
  864. }
  865. if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
  866. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
  867. test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
  868. /* This fires off the trigger. */
  869. irq_work_queue(&priv->work);
  870. done:
  871. return IRQ_HANDLED;
  872. }
  873. static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
  874. {
  875. struct iio_poll_func *pf = data;
  876. struct iio_dev *indio_dev = pf->indio_dev;
  877. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  878. size_t d_size = 0;
  879. int i, out_val, ret;
  880. iio_for_each_active_channel(indio_dev, i) {
  881. ret = regmap_bulk_read(priv->regmap,
  882. GP2AP020A00F_DATA_REG(i),
  883. &priv->buffer[d_size], 2);
  884. if (ret < 0)
  885. goto done;
  886. if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
  887. i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
  888. out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
  889. gp2ap020a00f_output_to_lux(priv, &out_val);
  890. put_unaligned_le32(out_val, &priv->buffer[d_size]);
  891. d_size += 4;
  892. } else {
  893. d_size += 2;
  894. }
  895. }
  896. iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer,
  897. pf->timestamp);
  898. done:
  899. iio_trigger_notify_done(indio_dev->trig);
  900. return IRQ_HANDLED;
  901. }
  902. static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
  903. enum iio_event_direction event_dir)
  904. {
  905. switch (chan->type) {
  906. case IIO_PROXIMITY:
  907. if (event_dir == IIO_EV_DIR_RISING)
  908. return GP2AP020A00F_PH_L_REG;
  909. else
  910. return GP2AP020A00F_PL_L_REG;
  911. case IIO_LIGHT:
  912. if (event_dir == IIO_EV_DIR_RISING)
  913. return GP2AP020A00F_TH_L_REG;
  914. else
  915. return GP2AP020A00F_TL_L_REG;
  916. default:
  917. break;
  918. }
  919. return -EINVAL;
  920. }
  921. static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
  922. const struct iio_chan_spec *chan,
  923. enum iio_event_type type,
  924. enum iio_event_direction dir,
  925. enum iio_event_info info,
  926. int val, int val2)
  927. {
  928. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  929. bool event_en = false;
  930. u8 thresh_val_id;
  931. u8 thresh_reg_l;
  932. int err = 0;
  933. mutex_lock(&data->lock);
  934. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  935. thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
  936. if (thresh_val_id > GP2AP020A00F_THRESH_PH) {
  937. err = -EINVAL;
  938. goto error_unlock;
  939. }
  940. switch (thresh_reg_l) {
  941. case GP2AP020A00F_TH_L_REG:
  942. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  943. &data->flags);
  944. break;
  945. case GP2AP020A00F_TL_L_REG:
  946. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  947. &data->flags);
  948. break;
  949. case GP2AP020A00F_PH_L_REG:
  950. if (val == 0) {
  951. err = -EINVAL;
  952. goto error_unlock;
  953. }
  954. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  955. &data->flags);
  956. break;
  957. case GP2AP020A00F_PL_L_REG:
  958. if (val == 0) {
  959. err = -EINVAL;
  960. goto error_unlock;
  961. }
  962. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  963. &data->flags);
  964. break;
  965. }
  966. data->thresh_val[thresh_val_id] = val;
  967. err = gp2ap020a00f_write_event_threshold(data, thresh_val_id,
  968. event_en);
  969. error_unlock:
  970. mutex_unlock(&data->lock);
  971. return err;
  972. }
  973. static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
  974. const struct iio_chan_spec *chan,
  975. enum iio_event_type type,
  976. enum iio_event_direction dir,
  977. enum iio_event_info info,
  978. int *val, int *val2)
  979. {
  980. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  981. u8 thresh_reg_l;
  982. int err = IIO_VAL_INT;
  983. mutex_lock(&data->lock);
  984. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  985. if (thresh_reg_l > GP2AP020A00F_PH_L_REG) {
  986. err = -EINVAL;
  987. goto error_unlock;
  988. }
  989. *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
  990. error_unlock:
  991. mutex_unlock(&data->lock);
  992. return err;
  993. }
  994. static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
  995. int state)
  996. {
  997. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  998. enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
  999. int err;
  1000. cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
  1001. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
  1002. cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
  1003. GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
  1004. /*
  1005. * In order to enable proximity detection feature in the device
  1006. * both high and low threshold registers have to be written
  1007. * with different values, greater than zero.
  1008. */
  1009. if (state) {
  1010. if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
  1011. return -EINVAL;
  1012. if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
  1013. return -EINVAL;
  1014. }
  1015. err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
  1016. if (err < 0)
  1017. return err;
  1018. err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
  1019. if (err < 0)
  1020. return err;
  1021. free_irq(data->client->irq, indio_dev);
  1022. if (state)
  1023. err = request_threaded_irq(data->client->irq, NULL,
  1024. &gp2ap020a00f_prox_sensing_handler,
  1025. IRQF_TRIGGER_RISING |
  1026. IRQF_TRIGGER_FALLING |
  1027. IRQF_ONESHOT,
  1028. "gp2ap020a00f_prox_sensing",
  1029. indio_dev);
  1030. else {
  1031. err = request_threaded_irq(data->client->irq, NULL,
  1032. &gp2ap020a00f_thresh_event_handler,
  1033. IRQF_TRIGGER_FALLING |
  1034. IRQF_ONESHOT,
  1035. "gp2ap020a00f_thresh_event",
  1036. indio_dev);
  1037. }
  1038. return err;
  1039. }
  1040. static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
  1041. const struct iio_chan_spec *chan,
  1042. enum iio_event_type type,
  1043. enum iio_event_direction dir,
  1044. int state)
  1045. {
  1046. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1047. enum gp2ap020a00f_cmd cmd;
  1048. int err;
  1049. mutex_lock(&data->lock);
  1050. switch (chan->type) {
  1051. case IIO_PROXIMITY:
  1052. err = gp2ap020a00f_write_prox_event_config(indio_dev, state);
  1053. break;
  1054. case IIO_LIGHT:
  1055. if (dir == IIO_EV_DIR_RISING) {
  1056. cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
  1057. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
  1058. err = gp2ap020a00f_exec_cmd(data, cmd);
  1059. } else {
  1060. cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
  1061. GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
  1062. err = gp2ap020a00f_exec_cmd(data, cmd);
  1063. }
  1064. break;
  1065. default:
  1066. err = -EINVAL;
  1067. }
  1068. mutex_unlock(&data->lock);
  1069. return err;
  1070. }
  1071. static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
  1072. const struct iio_chan_spec *chan,
  1073. enum iio_event_type type,
  1074. enum iio_event_direction dir)
  1075. {
  1076. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1077. int event_en = 0;
  1078. mutex_lock(&data->lock);
  1079. switch (chan->type) {
  1080. case IIO_PROXIMITY:
  1081. if (dir == IIO_EV_DIR_RISING)
  1082. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  1083. &data->flags);
  1084. else
  1085. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  1086. &data->flags);
  1087. break;
  1088. case IIO_LIGHT:
  1089. if (dir == IIO_EV_DIR_RISING)
  1090. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  1091. &data->flags);
  1092. else
  1093. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  1094. &data->flags);
  1095. break;
  1096. default:
  1097. event_en = -EINVAL;
  1098. break;
  1099. }
  1100. mutex_unlock(&data->lock);
  1101. return event_en;
  1102. }
  1103. static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
  1104. struct iio_chan_spec const *chan, int *val)
  1105. {
  1106. enum gp2ap020a00f_cmd cmd;
  1107. int err;
  1108. switch (chan->scan_index) {
  1109. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1110. cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
  1111. break;
  1112. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1113. cmd = GP2AP020A00F_CMD_READ_RAW_IR;
  1114. break;
  1115. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1116. cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
  1117. break;
  1118. default:
  1119. return -EINVAL;
  1120. }
  1121. err = gp2ap020a00f_exec_cmd(data, cmd);
  1122. if (err < 0) {
  1123. dev_err(&data->client->dev,
  1124. "gp2ap020a00f_exec_cmd failed\n");
  1125. goto error_ret;
  1126. }
  1127. err = gp2ap020a00f_read_output(data, chan->address, val);
  1128. if (err < 0)
  1129. dev_err(&data->client->dev,
  1130. "gp2ap020a00f_read_output failed\n");
  1131. err = gp2ap020a00f_set_operation_mode(data,
  1132. GP2AP020A00F_OPMODE_SHUTDOWN);
  1133. if (err < 0)
  1134. dev_err(&data->client->dev,
  1135. "Failed to shut down the device.\n");
  1136. if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
  1137. cmd == GP2AP020A00F_CMD_READ_RAW_IR)
  1138. gp2ap020a00f_output_to_lux(data, val);
  1139. error_ret:
  1140. return err;
  1141. }
  1142. static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
  1143. struct iio_chan_spec const *chan,
  1144. int *val, int *val2,
  1145. long mask)
  1146. {
  1147. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1148. int err = -EINVAL;
  1149. if (mask == IIO_CHAN_INFO_RAW) {
  1150. err = iio_device_claim_direct_mode(indio_dev);
  1151. if (err)
  1152. return err;
  1153. err = gp2ap020a00f_read_channel(data, chan, val);
  1154. iio_device_release_direct_mode(indio_dev);
  1155. }
  1156. return err < 0 ? err : IIO_VAL_INT;
  1157. }
  1158. static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
  1159. {
  1160. .type = IIO_EV_TYPE_THRESH,
  1161. .dir = IIO_EV_DIR_RISING,
  1162. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1163. BIT(IIO_EV_INFO_ENABLE),
  1164. }, {
  1165. .type = IIO_EV_TYPE_THRESH,
  1166. .dir = IIO_EV_DIR_FALLING,
  1167. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1168. BIT(IIO_EV_INFO_ENABLE),
  1169. },
  1170. };
  1171. static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
  1172. {
  1173. .type = IIO_EV_TYPE_ROC,
  1174. .dir = IIO_EV_DIR_RISING,
  1175. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1176. BIT(IIO_EV_INFO_ENABLE),
  1177. }, {
  1178. .type = IIO_EV_TYPE_ROC,
  1179. .dir = IIO_EV_DIR_FALLING,
  1180. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1181. BIT(IIO_EV_INFO_ENABLE),
  1182. },
  1183. };
  1184. static const struct iio_chan_spec gp2ap020a00f_channels[] = {
  1185. {
  1186. .type = IIO_LIGHT,
  1187. .channel2 = IIO_MOD_LIGHT_CLEAR,
  1188. .modified = 1,
  1189. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1190. .scan_type = {
  1191. .sign = 'u',
  1192. .realbits = 24,
  1193. .shift = 0,
  1194. .storagebits = 32,
  1195. .endianness = IIO_LE,
  1196. },
  1197. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  1198. .address = GP2AP020A00F_D0_L_REG,
  1199. .event_spec = gp2ap020a00f_event_spec_light,
  1200. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
  1201. },
  1202. {
  1203. .type = IIO_LIGHT,
  1204. .channel2 = IIO_MOD_LIGHT_IR,
  1205. .modified = 1,
  1206. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1207. .scan_type = {
  1208. .sign = 'u',
  1209. .realbits = 24,
  1210. .shift = 0,
  1211. .storagebits = 32,
  1212. .endianness = IIO_LE,
  1213. },
  1214. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
  1215. .address = GP2AP020A00F_D1_L_REG,
  1216. },
  1217. {
  1218. .type = IIO_PROXIMITY,
  1219. .modified = 0,
  1220. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1221. .scan_type = {
  1222. .sign = 'u',
  1223. .realbits = 16,
  1224. .shift = 0,
  1225. .storagebits = 16,
  1226. .endianness = IIO_LE,
  1227. },
  1228. .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
  1229. .address = GP2AP020A00F_D2_L_REG,
  1230. .event_spec = gp2ap020a00f_event_spec_prox,
  1231. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
  1232. },
  1233. IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
  1234. };
  1235. static const struct iio_info gp2ap020a00f_info = {
  1236. .read_raw = &gp2ap020a00f_read_raw,
  1237. .read_event_value = &gp2ap020a00f_read_event_val,
  1238. .read_event_config = &gp2ap020a00f_read_event_config,
  1239. .write_event_value = &gp2ap020a00f_write_event_val,
  1240. .write_event_config = &gp2ap020a00f_write_event_config,
  1241. };
  1242. static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
  1243. {
  1244. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1245. int i, err = 0;
  1246. mutex_lock(&data->lock);
  1247. /*
  1248. * Enable triggers according to the scan_mask. Enabling either
  1249. * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS
  1250. * module in the device, which generates samples in both D0 (clear)
  1251. * and D1 (ir) registers. As the two registers are bound to the
  1252. * two separate IIO channels they are treated in the driver logic
  1253. * as if they were controlled independently.
  1254. */
  1255. iio_for_each_active_channel(indio_dev, i) {
  1256. switch (i) {
  1257. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1258. err = gp2ap020a00f_exec_cmd(data,
  1259. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
  1260. break;
  1261. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1262. err = gp2ap020a00f_exec_cmd(data,
  1263. GP2AP020A00F_CMD_TRIGGER_IR_EN);
  1264. break;
  1265. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1266. err = gp2ap020a00f_exec_cmd(data,
  1267. GP2AP020A00F_CMD_TRIGGER_PROX_EN);
  1268. break;
  1269. }
  1270. }
  1271. if (err < 0)
  1272. goto error_unlock;
  1273. data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  1274. if (!data->buffer)
  1275. err = -ENOMEM;
  1276. error_unlock:
  1277. mutex_unlock(&data->lock);
  1278. return err;
  1279. }
  1280. static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
  1281. {
  1282. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1283. int i, err = 0;
  1284. mutex_lock(&data->lock);
  1285. iio_for_each_active_channel(indio_dev, i) {
  1286. switch (i) {
  1287. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1288. err = gp2ap020a00f_exec_cmd(data,
  1289. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
  1290. break;
  1291. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1292. err = gp2ap020a00f_exec_cmd(data,
  1293. GP2AP020A00F_CMD_TRIGGER_IR_DIS);
  1294. break;
  1295. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1296. err = gp2ap020a00f_exec_cmd(data,
  1297. GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
  1298. break;
  1299. }
  1300. }
  1301. if (err == 0)
  1302. kfree(data->buffer);
  1303. mutex_unlock(&data->lock);
  1304. return err;
  1305. }
  1306. static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
  1307. .postenable = &gp2ap020a00f_buffer_postenable,
  1308. .predisable = &gp2ap020a00f_buffer_predisable,
  1309. };
  1310. static int gp2ap020a00f_probe(struct i2c_client *client)
  1311. {
  1312. const struct i2c_device_id *id = i2c_client_get_device_id(client);
  1313. struct gp2ap020a00f_data *data;
  1314. struct iio_dev *indio_dev;
  1315. struct regmap *regmap;
  1316. int err;
  1317. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1318. if (!indio_dev)
  1319. return -ENOMEM;
  1320. data = iio_priv(indio_dev);
  1321. data->vled_reg = devm_regulator_get(&client->dev, "vled");
  1322. if (IS_ERR(data->vled_reg))
  1323. return PTR_ERR(data->vled_reg);
  1324. err = regulator_enable(data->vled_reg);
  1325. if (err)
  1326. return err;
  1327. regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
  1328. if (IS_ERR(regmap)) {
  1329. dev_err(&client->dev, "Regmap initialization failed.\n");
  1330. err = PTR_ERR(regmap);
  1331. goto error_regulator_disable;
  1332. }
  1333. /* Initialize device registers */
  1334. err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
  1335. gp2ap020a00f_reg_init_tab,
  1336. ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
  1337. if (err < 0) {
  1338. dev_err(&client->dev, "Device initialization failed.\n");
  1339. goto error_regulator_disable;
  1340. }
  1341. i2c_set_clientdata(client, indio_dev);
  1342. data->client = client;
  1343. data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
  1344. data->regmap = regmap;
  1345. init_waitqueue_head(&data->data_ready_queue);
  1346. mutex_init(&data->lock);
  1347. indio_dev->channels = gp2ap020a00f_channels;
  1348. indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
  1349. indio_dev->info = &gp2ap020a00f_info;
  1350. indio_dev->name = id->name;
  1351. indio_dev->modes = INDIO_DIRECT_MODE;
  1352. /* Allocate buffer */
  1353. err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  1354. &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
  1355. if (err < 0)
  1356. goto error_regulator_disable;
  1357. /* Allocate trigger */
  1358. data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger",
  1359. indio_dev->name);
  1360. if (data->trig == NULL) {
  1361. err = -ENOMEM;
  1362. dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n");
  1363. goto error_uninit_buffer;
  1364. }
  1365. /* This needs to be requested here for read_raw calls to work. */
  1366. err = request_threaded_irq(client->irq, NULL,
  1367. &gp2ap020a00f_thresh_event_handler,
  1368. IRQF_TRIGGER_FALLING |
  1369. IRQF_ONESHOT,
  1370. "gp2ap020a00f_als_event",
  1371. indio_dev);
  1372. if (err < 0) {
  1373. dev_err(&client->dev, "Irq request failed.\n");
  1374. goto error_uninit_buffer;
  1375. }
  1376. init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
  1377. err = iio_trigger_register(data->trig);
  1378. if (err < 0) {
  1379. dev_err(&client->dev, "Failed to register iio trigger.\n");
  1380. goto error_free_irq;
  1381. }
  1382. err = iio_device_register(indio_dev);
  1383. if (err < 0)
  1384. goto error_trigger_unregister;
  1385. return 0;
  1386. error_trigger_unregister:
  1387. iio_trigger_unregister(data->trig);
  1388. error_free_irq:
  1389. free_irq(client->irq, indio_dev);
  1390. error_uninit_buffer:
  1391. iio_triggered_buffer_cleanup(indio_dev);
  1392. error_regulator_disable:
  1393. regulator_disable(data->vled_reg);
  1394. return err;
  1395. }
  1396. static void gp2ap020a00f_remove(struct i2c_client *client)
  1397. {
  1398. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1399. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1400. int err;
  1401. err = gp2ap020a00f_set_operation_mode(data,
  1402. GP2AP020A00F_OPMODE_SHUTDOWN);
  1403. if (err < 0)
  1404. dev_err(&indio_dev->dev, "Failed to power off the device.\n");
  1405. iio_device_unregister(indio_dev);
  1406. iio_trigger_unregister(data->trig);
  1407. free_irq(client->irq, indio_dev);
  1408. iio_triggered_buffer_cleanup(indio_dev);
  1409. regulator_disable(data->vled_reg);
  1410. }
  1411. static const struct i2c_device_id gp2ap020a00f_id[] = {
  1412. { GP2A_I2C_NAME },
  1413. { }
  1414. };
  1415. MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
  1416. static const struct of_device_id gp2ap020a00f_of_match[] = {
  1417. { .compatible = "sharp,gp2ap020a00f" },
  1418. { }
  1419. };
  1420. MODULE_DEVICE_TABLE(of, gp2ap020a00f_of_match);
  1421. static struct i2c_driver gp2ap020a00f_driver = {
  1422. .driver = {
  1423. .name = GP2A_I2C_NAME,
  1424. .of_match_table = gp2ap020a00f_of_match,
  1425. },
  1426. .probe = gp2ap020a00f_probe,
  1427. .remove = gp2ap020a00f_remove,
  1428. .id_table = gp2ap020a00f_id,
  1429. };
  1430. module_i2c_driver(gp2ap020a00f_driver);
  1431. MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>");
  1432. MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
  1433. MODULE_LICENSE("GPL v2");