opt3001.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * opt3001.c - Texas Instruments OPT3001 Light Sensor
  4. *
  5. * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com
  6. *
  7. * Author: Andreas Dannenberg <dannenberg@ti.com>
  8. * Based on previous work from: Felipe Balbi <balbi@ti.com>
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/delay.h>
  12. #include <linux/device.h>
  13. #include <linux/i2c.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/irq.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/mod_devicetable.h>
  19. #include <linux/mutex.h>
  20. #include <linux/slab.h>
  21. #include <linux/types.h>
  22. #include <linux/iio/events.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/iio/sysfs.h>
  25. #define OPT3001_RESULT 0x00
  26. #define OPT3001_CONFIGURATION 0x01
  27. #define OPT3001_LOW_LIMIT 0x02
  28. #define OPT3001_HIGH_LIMIT 0x03
  29. #define OPT3001_MANUFACTURER_ID 0x7e
  30. #define OPT3001_DEVICE_ID 0x7f
  31. #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
  32. #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
  33. #define OPT3001_CONFIGURATION_CT BIT(11)
  34. #define OPT3001_CONFIGURATION_M_MASK (3 << 9)
  35. #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
  36. #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
  37. #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
  38. #define OPT3001_CONFIGURATION_OVF BIT(8)
  39. #define OPT3001_CONFIGURATION_CRF BIT(7)
  40. #define OPT3001_CONFIGURATION_FH BIT(6)
  41. #define OPT3001_CONFIGURATION_FL BIT(5)
  42. #define OPT3001_CONFIGURATION_L BIT(4)
  43. #define OPT3001_CONFIGURATION_POL BIT(3)
  44. #define OPT3001_CONFIGURATION_ME BIT(2)
  45. #define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
  46. /* The end-of-conversion enable is located in the low-limit register */
  47. #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
  48. #define OPT3001_REG_EXPONENT(n) ((n) >> 12)
  49. #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
  50. #define OPT3001_INT_TIME_LONG 800000
  51. #define OPT3001_INT_TIME_SHORT 100000
  52. /*
  53. * Time to wait for conversion result to be ready. The device datasheet
  54. * sect. 6.5 states results are ready after total integration time plus 3ms.
  55. * This results in worst-case max values of 113ms or 883ms, respectively.
  56. * Add some slack to be on the safe side.
  57. */
  58. #define OPT3001_RESULT_READY_SHORT 150
  59. #define OPT3001_RESULT_READY_LONG 1000
  60. struct opt3001 {
  61. struct i2c_client *client;
  62. struct device *dev;
  63. struct mutex lock;
  64. bool ok_to_ignore_lock;
  65. bool result_ready;
  66. wait_queue_head_t result_ready_queue;
  67. u16 result;
  68. u32 int_time;
  69. u32 mode;
  70. u16 high_thresh_mantissa;
  71. u16 low_thresh_mantissa;
  72. u8 high_thresh_exp;
  73. u8 low_thresh_exp;
  74. bool use_irq;
  75. };
  76. struct opt3001_scale {
  77. int val;
  78. int val2;
  79. };
  80. static const struct opt3001_scale opt3001_scales[] = {
  81. {
  82. .val = 40,
  83. .val2 = 950000,
  84. },
  85. {
  86. .val = 81,
  87. .val2 = 900000,
  88. },
  89. {
  90. .val = 163,
  91. .val2 = 800000,
  92. },
  93. {
  94. .val = 327,
  95. .val2 = 600000,
  96. },
  97. {
  98. .val = 655,
  99. .val2 = 200000,
  100. },
  101. {
  102. .val = 1310,
  103. .val2 = 400000,
  104. },
  105. {
  106. .val = 2620,
  107. .val2 = 800000,
  108. },
  109. {
  110. .val = 5241,
  111. .val2 = 600000,
  112. },
  113. {
  114. .val = 10483,
  115. .val2 = 200000,
  116. },
  117. {
  118. .val = 20966,
  119. .val2 = 400000,
  120. },
  121. {
  122. .val = 41932,
  123. .val2 = 800000,
  124. },
  125. {
  126. .val = 83865,
  127. .val2 = 600000,
  128. },
  129. };
  130. static int opt3001_find_scale(const struct opt3001 *opt, int val,
  131. int val2, u8 *exponent)
  132. {
  133. int i;
  134. for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
  135. const struct opt3001_scale *scale = &opt3001_scales[i];
  136. /*
  137. * Combine the integer and micro parts for comparison
  138. * purposes. Use milli lux precision to avoid 32-bit integer
  139. * overflows.
  140. */
  141. if ((val * 1000 + val2 / 1000) <=
  142. (scale->val * 1000 + scale->val2 / 1000)) {
  143. *exponent = i;
  144. return 0;
  145. }
  146. }
  147. return -EINVAL;
  148. }
  149. static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
  150. u16 mantissa, int *val, int *val2)
  151. {
  152. int lux;
  153. lux = 10 * (mantissa << exponent);
  154. *val = lux / 1000;
  155. *val2 = (lux - (*val * 1000)) * 1000;
  156. }
  157. static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
  158. {
  159. *reg &= ~OPT3001_CONFIGURATION_M_MASK;
  160. *reg |= mode;
  161. opt->mode = mode;
  162. }
  163. static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
  164. static struct attribute *opt3001_attributes[] = {
  165. &iio_const_attr_integration_time_available.dev_attr.attr,
  166. NULL
  167. };
  168. static const struct attribute_group opt3001_attribute_group = {
  169. .attrs = opt3001_attributes,
  170. };
  171. static const struct iio_event_spec opt3001_event_spec[] = {
  172. {
  173. .type = IIO_EV_TYPE_THRESH,
  174. .dir = IIO_EV_DIR_RISING,
  175. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  176. BIT(IIO_EV_INFO_ENABLE),
  177. },
  178. {
  179. .type = IIO_EV_TYPE_THRESH,
  180. .dir = IIO_EV_DIR_FALLING,
  181. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  182. BIT(IIO_EV_INFO_ENABLE),
  183. },
  184. };
  185. static const struct iio_chan_spec opt3001_channels[] = {
  186. {
  187. .type = IIO_LIGHT,
  188. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
  189. BIT(IIO_CHAN_INFO_INT_TIME),
  190. .event_spec = opt3001_event_spec,
  191. .num_event_specs = ARRAY_SIZE(opt3001_event_spec),
  192. },
  193. IIO_CHAN_SOFT_TIMESTAMP(1),
  194. };
  195. static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
  196. {
  197. int ret;
  198. u16 mantissa;
  199. u16 reg;
  200. u8 exponent;
  201. u16 value;
  202. long timeout;
  203. if (opt->use_irq) {
  204. /*
  205. * Enable the end-of-conversion interrupt mechanism. Note that
  206. * doing so will overwrite the low-level limit value however we
  207. * will restore this value later on.
  208. */
  209. ret = i2c_smbus_write_word_swapped(opt->client,
  210. OPT3001_LOW_LIMIT,
  211. OPT3001_LOW_LIMIT_EOC_ENABLE);
  212. if (ret < 0) {
  213. dev_err(opt->dev, "failed to write register %02x\n",
  214. OPT3001_LOW_LIMIT);
  215. return ret;
  216. }
  217. /* Allow IRQ to access the device despite lock being set */
  218. opt->ok_to_ignore_lock = true;
  219. }
  220. /* Reset data-ready indicator flag */
  221. opt->result_ready = false;
  222. /* Configure for single-conversion mode and start a new conversion */
  223. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  224. if (ret < 0) {
  225. dev_err(opt->dev, "failed to read register %02x\n",
  226. OPT3001_CONFIGURATION);
  227. goto err;
  228. }
  229. reg = ret;
  230. opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SINGLE);
  231. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  232. reg);
  233. if (ret < 0) {
  234. dev_err(opt->dev, "failed to write register %02x\n",
  235. OPT3001_CONFIGURATION);
  236. goto err;
  237. }
  238. if (opt->use_irq) {
  239. /* Wait for the IRQ to indicate the conversion is complete */
  240. ret = wait_event_timeout(opt->result_ready_queue,
  241. opt->result_ready,
  242. msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
  243. if (ret == 0)
  244. return -ETIMEDOUT;
  245. } else {
  246. /* Sleep for result ready time */
  247. timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
  248. OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;
  249. msleep(timeout);
  250. /* Check result ready flag */
  251. ret = i2c_smbus_read_word_swapped(opt->client,
  252. OPT3001_CONFIGURATION);
  253. if (ret < 0) {
  254. dev_err(opt->dev, "failed to read register %02x\n",
  255. OPT3001_CONFIGURATION);
  256. goto err;
  257. }
  258. if (!(ret & OPT3001_CONFIGURATION_CRF)) {
  259. ret = -ETIMEDOUT;
  260. goto err;
  261. }
  262. /* Obtain value */
  263. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
  264. if (ret < 0) {
  265. dev_err(opt->dev, "failed to read register %02x\n",
  266. OPT3001_RESULT);
  267. goto err;
  268. }
  269. opt->result = ret;
  270. opt->result_ready = true;
  271. }
  272. err:
  273. if (opt->use_irq)
  274. /* Disallow IRQ to access the device while lock is active */
  275. opt->ok_to_ignore_lock = false;
  276. if (ret < 0)
  277. return ret;
  278. if (opt->use_irq) {
  279. /*
  280. * Disable the end-of-conversion interrupt mechanism by
  281. * restoring the low-level limit value (clearing
  282. * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
  283. * those enable bits would affect the actual limit value due to
  284. * bit-overlap and therefore can't be done.
  285. */
  286. value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
  287. ret = i2c_smbus_write_word_swapped(opt->client,
  288. OPT3001_LOW_LIMIT,
  289. value);
  290. if (ret < 0) {
  291. dev_err(opt->dev, "failed to write register %02x\n",
  292. OPT3001_LOW_LIMIT);
  293. return ret;
  294. }
  295. }
  296. exponent = OPT3001_REG_EXPONENT(opt->result);
  297. mantissa = OPT3001_REG_MANTISSA(opt->result);
  298. opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
  299. return IIO_VAL_INT_PLUS_MICRO;
  300. }
  301. static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
  302. {
  303. *val = 0;
  304. *val2 = opt->int_time;
  305. return IIO_VAL_INT_PLUS_MICRO;
  306. }
  307. static int opt3001_set_int_time(struct opt3001 *opt, int time)
  308. {
  309. int ret;
  310. u16 reg;
  311. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  312. if (ret < 0) {
  313. dev_err(opt->dev, "failed to read register %02x\n",
  314. OPT3001_CONFIGURATION);
  315. return ret;
  316. }
  317. reg = ret;
  318. switch (time) {
  319. case OPT3001_INT_TIME_SHORT:
  320. reg &= ~OPT3001_CONFIGURATION_CT;
  321. opt->int_time = OPT3001_INT_TIME_SHORT;
  322. break;
  323. case OPT3001_INT_TIME_LONG:
  324. reg |= OPT3001_CONFIGURATION_CT;
  325. opt->int_time = OPT3001_INT_TIME_LONG;
  326. break;
  327. default:
  328. return -EINVAL;
  329. }
  330. return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  331. reg);
  332. }
  333. static int opt3001_read_raw(struct iio_dev *iio,
  334. struct iio_chan_spec const *chan, int *val, int *val2,
  335. long mask)
  336. {
  337. struct opt3001 *opt = iio_priv(iio);
  338. int ret;
  339. if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
  340. return -EBUSY;
  341. if (chan->type != IIO_LIGHT)
  342. return -EINVAL;
  343. mutex_lock(&opt->lock);
  344. switch (mask) {
  345. case IIO_CHAN_INFO_PROCESSED:
  346. ret = opt3001_get_lux(opt, val, val2);
  347. break;
  348. case IIO_CHAN_INFO_INT_TIME:
  349. ret = opt3001_get_int_time(opt, val, val2);
  350. break;
  351. default:
  352. ret = -EINVAL;
  353. }
  354. mutex_unlock(&opt->lock);
  355. return ret;
  356. }
  357. static int opt3001_write_raw(struct iio_dev *iio,
  358. struct iio_chan_spec const *chan, int val, int val2,
  359. long mask)
  360. {
  361. struct opt3001 *opt = iio_priv(iio);
  362. int ret;
  363. if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
  364. return -EBUSY;
  365. if (chan->type != IIO_LIGHT)
  366. return -EINVAL;
  367. if (mask != IIO_CHAN_INFO_INT_TIME)
  368. return -EINVAL;
  369. if (val != 0)
  370. return -EINVAL;
  371. mutex_lock(&opt->lock);
  372. ret = opt3001_set_int_time(opt, val2);
  373. mutex_unlock(&opt->lock);
  374. return ret;
  375. }
  376. static int opt3001_read_event_value(struct iio_dev *iio,
  377. const struct iio_chan_spec *chan, enum iio_event_type type,
  378. enum iio_event_direction dir, enum iio_event_info info,
  379. int *val, int *val2)
  380. {
  381. struct opt3001 *opt = iio_priv(iio);
  382. int ret = IIO_VAL_INT_PLUS_MICRO;
  383. mutex_lock(&opt->lock);
  384. switch (dir) {
  385. case IIO_EV_DIR_RISING:
  386. opt3001_to_iio_ret(opt, opt->high_thresh_exp,
  387. opt->high_thresh_mantissa, val, val2);
  388. break;
  389. case IIO_EV_DIR_FALLING:
  390. opt3001_to_iio_ret(opt, opt->low_thresh_exp,
  391. opt->low_thresh_mantissa, val, val2);
  392. break;
  393. default:
  394. ret = -EINVAL;
  395. }
  396. mutex_unlock(&opt->lock);
  397. return ret;
  398. }
  399. static int opt3001_write_event_value(struct iio_dev *iio,
  400. const struct iio_chan_spec *chan, enum iio_event_type type,
  401. enum iio_event_direction dir, enum iio_event_info info,
  402. int val, int val2)
  403. {
  404. struct opt3001 *opt = iio_priv(iio);
  405. int ret;
  406. u16 mantissa;
  407. u16 value;
  408. u16 reg;
  409. u8 exponent;
  410. if (val < 0)
  411. return -EINVAL;
  412. mutex_lock(&opt->lock);
  413. ret = opt3001_find_scale(opt, val, val2, &exponent);
  414. if (ret < 0) {
  415. dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
  416. goto err;
  417. }
  418. mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
  419. value = (exponent << 12) | mantissa;
  420. switch (dir) {
  421. case IIO_EV_DIR_RISING:
  422. reg = OPT3001_HIGH_LIMIT;
  423. opt->high_thresh_mantissa = mantissa;
  424. opt->high_thresh_exp = exponent;
  425. break;
  426. case IIO_EV_DIR_FALLING:
  427. reg = OPT3001_LOW_LIMIT;
  428. opt->low_thresh_mantissa = mantissa;
  429. opt->low_thresh_exp = exponent;
  430. break;
  431. default:
  432. ret = -EINVAL;
  433. goto err;
  434. }
  435. ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
  436. if (ret < 0) {
  437. dev_err(opt->dev, "failed to write register %02x\n", reg);
  438. goto err;
  439. }
  440. err:
  441. mutex_unlock(&opt->lock);
  442. return ret;
  443. }
  444. static int opt3001_read_event_config(struct iio_dev *iio,
  445. const struct iio_chan_spec *chan, enum iio_event_type type,
  446. enum iio_event_direction dir)
  447. {
  448. struct opt3001 *opt = iio_priv(iio);
  449. return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
  450. }
  451. static int opt3001_write_event_config(struct iio_dev *iio,
  452. const struct iio_chan_spec *chan, enum iio_event_type type,
  453. enum iio_event_direction dir, int state)
  454. {
  455. struct opt3001 *opt = iio_priv(iio);
  456. int ret;
  457. u16 mode;
  458. u16 reg;
  459. if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
  460. return 0;
  461. if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
  462. return 0;
  463. mutex_lock(&opt->lock);
  464. mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
  465. : OPT3001_CONFIGURATION_M_SHUTDOWN;
  466. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  467. if (ret < 0) {
  468. dev_err(opt->dev, "failed to read register %02x\n",
  469. OPT3001_CONFIGURATION);
  470. goto err;
  471. }
  472. reg = ret;
  473. opt3001_set_mode(opt, &reg, mode);
  474. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  475. reg);
  476. if (ret < 0) {
  477. dev_err(opt->dev, "failed to write register %02x\n",
  478. OPT3001_CONFIGURATION);
  479. goto err;
  480. }
  481. err:
  482. mutex_unlock(&opt->lock);
  483. return ret;
  484. }
  485. static const struct iio_info opt3001_info = {
  486. .attrs = &opt3001_attribute_group,
  487. .read_raw = opt3001_read_raw,
  488. .write_raw = opt3001_write_raw,
  489. .read_event_value = opt3001_read_event_value,
  490. .write_event_value = opt3001_write_event_value,
  491. .read_event_config = opt3001_read_event_config,
  492. .write_event_config = opt3001_write_event_config,
  493. };
  494. static int opt3001_read_id(struct opt3001 *opt)
  495. {
  496. char manufacturer[2];
  497. u16 device_id;
  498. int ret;
  499. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
  500. if (ret < 0) {
  501. dev_err(opt->dev, "failed to read register %02x\n",
  502. OPT3001_MANUFACTURER_ID);
  503. return ret;
  504. }
  505. manufacturer[0] = ret >> 8;
  506. manufacturer[1] = ret & 0xff;
  507. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
  508. if (ret < 0) {
  509. dev_err(opt->dev, "failed to read register %02x\n",
  510. OPT3001_DEVICE_ID);
  511. return ret;
  512. }
  513. device_id = ret;
  514. dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
  515. manufacturer[1], device_id);
  516. return 0;
  517. }
  518. static int opt3001_configure(struct opt3001 *opt)
  519. {
  520. int ret;
  521. u16 reg;
  522. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  523. if (ret < 0) {
  524. dev_err(opt->dev, "failed to read register %02x\n",
  525. OPT3001_CONFIGURATION);
  526. return ret;
  527. }
  528. reg = ret;
  529. /* Enable automatic full-scale setting mode */
  530. reg &= ~OPT3001_CONFIGURATION_RN_MASK;
  531. reg |= OPT3001_CONFIGURATION_RN_AUTO;
  532. /* Reflect status of the device's integration time setting */
  533. if (reg & OPT3001_CONFIGURATION_CT)
  534. opt->int_time = OPT3001_INT_TIME_LONG;
  535. else
  536. opt->int_time = OPT3001_INT_TIME_SHORT;
  537. /* Ensure device is in shutdown initially */
  538. opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
  539. /* Configure for latched window-style comparison operation */
  540. reg |= OPT3001_CONFIGURATION_L;
  541. reg &= ~OPT3001_CONFIGURATION_POL;
  542. reg &= ~OPT3001_CONFIGURATION_ME;
  543. reg &= ~OPT3001_CONFIGURATION_FC_MASK;
  544. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  545. reg);
  546. if (ret < 0) {
  547. dev_err(opt->dev, "failed to write register %02x\n",
  548. OPT3001_CONFIGURATION);
  549. return ret;
  550. }
  551. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
  552. if (ret < 0) {
  553. dev_err(opt->dev, "failed to read register %02x\n",
  554. OPT3001_LOW_LIMIT);
  555. return ret;
  556. }
  557. opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
  558. opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
  559. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
  560. if (ret < 0) {
  561. dev_err(opt->dev, "failed to read register %02x\n",
  562. OPT3001_HIGH_LIMIT);
  563. return ret;
  564. }
  565. opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
  566. opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
  567. return 0;
  568. }
  569. static irqreturn_t opt3001_irq(int irq, void *_iio)
  570. {
  571. struct iio_dev *iio = _iio;
  572. struct opt3001 *opt = iio_priv(iio);
  573. int ret;
  574. bool wake_result_ready_queue = false;
  575. if (!opt->ok_to_ignore_lock)
  576. mutex_lock(&opt->lock);
  577. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  578. if (ret < 0) {
  579. dev_err(opt->dev, "failed to read register %02x\n",
  580. OPT3001_CONFIGURATION);
  581. goto out;
  582. }
  583. if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
  584. OPT3001_CONFIGURATION_M_CONTINUOUS) {
  585. if (ret & OPT3001_CONFIGURATION_FH)
  586. iio_push_event(iio,
  587. IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
  588. IIO_EV_TYPE_THRESH,
  589. IIO_EV_DIR_RISING),
  590. iio_get_time_ns(iio));
  591. if (ret & OPT3001_CONFIGURATION_FL)
  592. iio_push_event(iio,
  593. IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
  594. IIO_EV_TYPE_THRESH,
  595. IIO_EV_DIR_FALLING),
  596. iio_get_time_ns(iio));
  597. } else if (ret & OPT3001_CONFIGURATION_CRF) {
  598. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
  599. if (ret < 0) {
  600. dev_err(opt->dev, "failed to read register %02x\n",
  601. OPT3001_RESULT);
  602. goto out;
  603. }
  604. opt->result = ret;
  605. opt->result_ready = true;
  606. wake_result_ready_queue = true;
  607. }
  608. out:
  609. if (!opt->ok_to_ignore_lock)
  610. mutex_unlock(&opt->lock);
  611. if (wake_result_ready_queue)
  612. wake_up(&opt->result_ready_queue);
  613. return IRQ_HANDLED;
  614. }
  615. static int opt3001_probe(struct i2c_client *client)
  616. {
  617. struct device *dev = &client->dev;
  618. struct iio_dev *iio;
  619. struct opt3001 *opt;
  620. int irq = client->irq;
  621. int ret;
  622. iio = devm_iio_device_alloc(dev, sizeof(*opt));
  623. if (!iio)
  624. return -ENOMEM;
  625. opt = iio_priv(iio);
  626. opt->client = client;
  627. opt->dev = dev;
  628. mutex_init(&opt->lock);
  629. init_waitqueue_head(&opt->result_ready_queue);
  630. i2c_set_clientdata(client, iio);
  631. ret = opt3001_read_id(opt);
  632. if (ret)
  633. return ret;
  634. ret = opt3001_configure(opt);
  635. if (ret)
  636. return ret;
  637. iio->name = client->name;
  638. iio->channels = opt3001_channels;
  639. iio->num_channels = ARRAY_SIZE(opt3001_channels);
  640. iio->modes = INDIO_DIRECT_MODE;
  641. iio->info = &opt3001_info;
  642. ret = devm_iio_device_register(dev, iio);
  643. if (ret) {
  644. dev_err(dev, "failed to register IIO device\n");
  645. return ret;
  646. }
  647. /* Make use of INT pin only if valid IRQ no. is given */
  648. if (irq > 0) {
  649. ret = request_threaded_irq(irq, NULL, opt3001_irq,
  650. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  651. "opt3001", iio);
  652. if (ret) {
  653. dev_err(dev, "failed to request IRQ #%d\n", irq);
  654. return ret;
  655. }
  656. opt->use_irq = true;
  657. } else {
  658. dev_dbg(opt->dev, "enabling interrupt-less operation\n");
  659. }
  660. return 0;
  661. }
  662. static void opt3001_remove(struct i2c_client *client)
  663. {
  664. struct iio_dev *iio = i2c_get_clientdata(client);
  665. struct opt3001 *opt = iio_priv(iio);
  666. int ret;
  667. u16 reg;
  668. if (opt->use_irq)
  669. free_irq(client->irq, iio);
  670. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  671. if (ret < 0) {
  672. dev_err(opt->dev, "failed to read register %02x\n",
  673. OPT3001_CONFIGURATION);
  674. return;
  675. }
  676. reg = ret;
  677. opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
  678. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  679. reg);
  680. if (ret < 0) {
  681. dev_err(opt->dev, "failed to write register %02x\n",
  682. OPT3001_CONFIGURATION);
  683. }
  684. }
  685. static const struct i2c_device_id opt3001_id[] = {
  686. { "opt3001" },
  687. { } /* Terminating Entry */
  688. };
  689. MODULE_DEVICE_TABLE(i2c, opt3001_id);
  690. static const struct of_device_id opt3001_of_match[] = {
  691. { .compatible = "ti,opt3001" },
  692. { }
  693. };
  694. MODULE_DEVICE_TABLE(of, opt3001_of_match);
  695. static struct i2c_driver opt3001_driver = {
  696. .probe = opt3001_probe,
  697. .remove = opt3001_remove,
  698. .id_table = opt3001_id,
  699. .driver = {
  700. .name = "opt3001",
  701. .of_match_table = opt3001_of_match,
  702. },
  703. };
  704. module_i2c_driver(opt3001_driver);
  705. MODULE_LICENSE("GPL v2");
  706. MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
  707. MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");