rm3100-core.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PNI RM3100 3-axis geomagnetic sensor driver core.
  4. *
  5. * Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com>
  6. *
  7. * User Manual available at
  8. * <https://www.pnicorp.com/download/rm3100-user-manual/>
  9. *
  10. * TODO: event generation, pm.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/slab.h>
  16. #include <linux/iio/buffer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/trigger.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. #include <linux/iio/trigger_consumer.h>
  22. #include <linux/unaligned.h>
  23. #include "rm3100.h"
  24. /* Cycle Count Registers. */
  25. #define RM3100_REG_CC_X 0x05
  26. #define RM3100_REG_CC_Y 0x07
  27. #define RM3100_REG_CC_Z 0x09
  28. /* Poll Measurement Mode register. */
  29. #define RM3100_REG_POLL 0x00
  30. #define RM3100_POLL_X BIT(4)
  31. #define RM3100_POLL_Y BIT(5)
  32. #define RM3100_POLL_Z BIT(6)
  33. /* Continuous Measurement Mode register. */
  34. #define RM3100_REG_CMM 0x01
  35. #define RM3100_CMM_START BIT(0)
  36. #define RM3100_CMM_X BIT(4)
  37. #define RM3100_CMM_Y BIT(5)
  38. #define RM3100_CMM_Z BIT(6)
  39. /* TiMe Rate Configuration register. */
  40. #define RM3100_REG_TMRC 0x0B
  41. #define RM3100_TMRC_OFFSET 0x92
  42. /* Result Status register. */
  43. #define RM3100_REG_STATUS 0x34
  44. #define RM3100_STATUS_DRDY BIT(7)
  45. /* Measurement result registers. */
  46. #define RM3100_REG_MX2 0x24
  47. #define RM3100_REG_MY2 0x27
  48. #define RM3100_REG_MZ2 0x2a
  49. #define RM3100_W_REG_START RM3100_REG_POLL
  50. #define RM3100_W_REG_END RM3100_REG_TMRC
  51. #define RM3100_R_REG_START RM3100_REG_POLL
  52. #define RM3100_R_REG_END RM3100_REG_STATUS
  53. #define RM3100_V_REG_START RM3100_REG_POLL
  54. #define RM3100_V_REG_END RM3100_REG_STATUS
  55. /*
  56. * This is computed by hand, is the sum of channel storage bits and padding
  57. * bits, which is 4+4+4+12=24 in here.
  58. */
  59. #define RM3100_SCAN_BYTES 24
  60. #define RM3100_CMM_AXIS_SHIFT 4
  61. struct rm3100_data {
  62. struct regmap *regmap;
  63. struct completion measuring_done;
  64. bool use_interrupt;
  65. int conversion_time;
  66. int scale;
  67. /* Ensure naturally aligned timestamp */
  68. u8 buffer[RM3100_SCAN_BYTES] __aligned(8);
  69. struct iio_trigger *drdy_trig;
  70. /*
  71. * This lock is for protecting the consistency of series of i2c
  72. * operations, that is, to make sure a measurement process will
  73. * not be interrupted by a set frequency operation, which should
  74. * be taken where a series of i2c operation starts, released where
  75. * the operation ends.
  76. */
  77. struct mutex lock;
  78. };
  79. static const struct regmap_range rm3100_readable_ranges[] = {
  80. regmap_reg_range(RM3100_R_REG_START, RM3100_R_REG_END),
  81. };
  82. const struct regmap_access_table rm3100_readable_table = {
  83. .yes_ranges = rm3100_readable_ranges,
  84. .n_yes_ranges = ARRAY_SIZE(rm3100_readable_ranges),
  85. };
  86. EXPORT_SYMBOL_NS_GPL(rm3100_readable_table, IIO_RM3100);
  87. static const struct regmap_range rm3100_writable_ranges[] = {
  88. regmap_reg_range(RM3100_W_REG_START, RM3100_W_REG_END),
  89. };
  90. const struct regmap_access_table rm3100_writable_table = {
  91. .yes_ranges = rm3100_writable_ranges,
  92. .n_yes_ranges = ARRAY_SIZE(rm3100_writable_ranges),
  93. };
  94. EXPORT_SYMBOL_NS_GPL(rm3100_writable_table, IIO_RM3100);
  95. static const struct regmap_range rm3100_volatile_ranges[] = {
  96. regmap_reg_range(RM3100_V_REG_START, RM3100_V_REG_END),
  97. };
  98. const struct regmap_access_table rm3100_volatile_table = {
  99. .yes_ranges = rm3100_volatile_ranges,
  100. .n_yes_ranges = ARRAY_SIZE(rm3100_volatile_ranges),
  101. };
  102. EXPORT_SYMBOL_NS_GPL(rm3100_volatile_table, IIO_RM3100);
  103. static irqreturn_t rm3100_thread_fn(int irq, void *d)
  104. {
  105. struct iio_dev *indio_dev = d;
  106. struct rm3100_data *data = iio_priv(indio_dev);
  107. /*
  108. * Write operation to any register or read operation
  109. * to first byte of results will clear the interrupt.
  110. */
  111. regmap_write(data->regmap, RM3100_REG_POLL, 0);
  112. return IRQ_HANDLED;
  113. }
  114. static irqreturn_t rm3100_irq_handler(int irq, void *d)
  115. {
  116. struct iio_dev *indio_dev = d;
  117. struct rm3100_data *data = iio_priv(indio_dev);
  118. if (!iio_buffer_enabled(indio_dev))
  119. complete(&data->measuring_done);
  120. else
  121. iio_trigger_poll(data->drdy_trig);
  122. return IRQ_WAKE_THREAD;
  123. }
  124. static int rm3100_wait_measurement(struct rm3100_data *data)
  125. {
  126. struct regmap *regmap = data->regmap;
  127. unsigned int val;
  128. int tries = 20;
  129. int ret;
  130. /*
  131. * A read cycle of 400kbits i2c bus is about 20us, plus the time
  132. * used for scheduling, a read cycle of fast mode of this device
  133. * can reach 1.7ms, it may be possible for data to arrive just
  134. * after we check the RM3100_REG_STATUS. In this case, irq_handler is
  135. * called before measuring_done is reinitialized, it will wait
  136. * forever for data that has already been ready.
  137. * Reinitialize measuring_done before looking up makes sure we
  138. * will always capture interrupt no matter when it happens.
  139. */
  140. if (data->use_interrupt)
  141. reinit_completion(&data->measuring_done);
  142. ret = regmap_read(regmap, RM3100_REG_STATUS, &val);
  143. if (ret < 0)
  144. return ret;
  145. if ((val & RM3100_STATUS_DRDY) != RM3100_STATUS_DRDY) {
  146. if (data->use_interrupt) {
  147. ret = wait_for_completion_timeout(&data->measuring_done,
  148. msecs_to_jiffies(data->conversion_time));
  149. if (!ret)
  150. return -ETIMEDOUT;
  151. } else {
  152. do {
  153. usleep_range(1000, 5000);
  154. ret = regmap_read(regmap, RM3100_REG_STATUS,
  155. &val);
  156. if (ret < 0)
  157. return ret;
  158. if (val & RM3100_STATUS_DRDY)
  159. break;
  160. } while (--tries);
  161. if (!tries)
  162. return -ETIMEDOUT;
  163. }
  164. }
  165. return 0;
  166. }
  167. static int rm3100_read_mag(struct rm3100_data *data, int idx, int *val)
  168. {
  169. struct regmap *regmap = data->regmap;
  170. u8 buffer[3];
  171. int ret;
  172. mutex_lock(&data->lock);
  173. ret = regmap_write(regmap, RM3100_REG_POLL, BIT(4 + idx));
  174. if (ret < 0)
  175. goto unlock_return;
  176. ret = rm3100_wait_measurement(data);
  177. if (ret < 0)
  178. goto unlock_return;
  179. ret = regmap_bulk_read(regmap, RM3100_REG_MX2 + 3 * idx, buffer, 3);
  180. if (ret < 0)
  181. goto unlock_return;
  182. mutex_unlock(&data->lock);
  183. *val = sign_extend32(get_unaligned_be24(&buffer[0]), 23);
  184. return IIO_VAL_INT;
  185. unlock_return:
  186. mutex_unlock(&data->lock);
  187. return ret;
  188. }
  189. #define RM3100_CHANNEL(axis, idx) \
  190. { \
  191. .type = IIO_MAGN, \
  192. .modified = 1, \
  193. .channel2 = IIO_MOD_##axis, \
  194. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  195. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  196. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  197. .scan_index = idx, \
  198. .scan_type = { \
  199. .sign = 's', \
  200. .realbits = 24, \
  201. .storagebits = 32, \
  202. .shift = 8, \
  203. .endianness = IIO_BE, \
  204. }, \
  205. }
  206. static const struct iio_chan_spec rm3100_channels[] = {
  207. RM3100_CHANNEL(X, 0),
  208. RM3100_CHANNEL(Y, 1),
  209. RM3100_CHANNEL(Z, 2),
  210. IIO_CHAN_SOFT_TIMESTAMP(3),
  211. };
  212. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
  213. "600 300 150 75 37 18 9 4.5 2.3 1.2 0.6 0.3 0.015 0.075"
  214. );
  215. static struct attribute *rm3100_attributes[] = {
  216. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  217. NULL,
  218. };
  219. static const struct attribute_group rm3100_attribute_group = {
  220. .attrs = rm3100_attributes,
  221. };
  222. #define RM3100_SAMP_NUM 14
  223. /*
  224. * Frequency : rm3100_samp_rates[][0].rm3100_samp_rates[][1]Hz.
  225. * Time between reading: rm3100_sam_rates[][2]ms.
  226. * The first one is actually 1.7ms.
  227. */
  228. static const int rm3100_samp_rates[RM3100_SAMP_NUM][3] = {
  229. {600, 0, 2}, {300, 0, 3}, {150, 0, 7}, {75, 0, 13}, {37, 0, 27},
  230. {18, 0, 55}, {9, 0, 110}, {4, 500000, 220}, {2, 300000, 440},
  231. {1, 200000, 800}, {0, 600000, 1600}, {0, 300000, 3300},
  232. {0, 15000, 6700}, {0, 75000, 13000}
  233. };
  234. static int rm3100_get_samp_freq(struct rm3100_data *data, int *val, int *val2)
  235. {
  236. unsigned int tmp;
  237. int ret;
  238. mutex_lock(&data->lock);
  239. ret = regmap_read(data->regmap, RM3100_REG_TMRC, &tmp);
  240. mutex_unlock(&data->lock);
  241. if (ret < 0)
  242. return ret;
  243. *val = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][0];
  244. *val2 = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][1];
  245. return IIO_VAL_INT_PLUS_MICRO;
  246. }
  247. static int rm3100_set_cycle_count(struct rm3100_data *data, int val)
  248. {
  249. int ret;
  250. u8 i;
  251. for (i = 0; i < 3; i++) {
  252. ret = regmap_write(data->regmap, RM3100_REG_CC_X + 2 * i, val);
  253. if (ret < 0)
  254. return ret;
  255. }
  256. /*
  257. * The scale of this sensor depends on the cycle count value, these
  258. * three values are corresponding to the cycle count value 50, 100,
  259. * 200. scale = output / gain * 10^4.
  260. */
  261. switch (val) {
  262. case 50:
  263. data->scale = 500;
  264. break;
  265. case 100:
  266. data->scale = 263;
  267. break;
  268. /*
  269. * case 200:
  270. * This function will never be called by users' code, so here we
  271. * assume that it will never get a wrong parameter.
  272. */
  273. default:
  274. data->scale = 133;
  275. }
  276. return 0;
  277. }
  278. static int rm3100_set_samp_freq(struct iio_dev *indio_dev, int val, int val2)
  279. {
  280. struct rm3100_data *data = iio_priv(indio_dev);
  281. struct regmap *regmap = data->regmap;
  282. unsigned int cycle_count;
  283. int ret;
  284. int i;
  285. mutex_lock(&data->lock);
  286. /* All cycle count registers use the same value. */
  287. ret = regmap_read(regmap, RM3100_REG_CC_X, &cycle_count);
  288. if (ret < 0)
  289. goto unlock_return;
  290. for (i = 0; i < RM3100_SAMP_NUM; i++) {
  291. if (val == rm3100_samp_rates[i][0] &&
  292. val2 == rm3100_samp_rates[i][1])
  293. break;
  294. }
  295. if (i == RM3100_SAMP_NUM) {
  296. ret = -EINVAL;
  297. goto unlock_return;
  298. }
  299. ret = regmap_write(regmap, RM3100_REG_TMRC, i + RM3100_TMRC_OFFSET);
  300. if (ret < 0)
  301. goto unlock_return;
  302. /* Checking if cycle count registers need changing. */
  303. if (val == 600 && cycle_count == 200) {
  304. ret = rm3100_set_cycle_count(data, 100);
  305. if (ret < 0)
  306. goto unlock_return;
  307. } else if (val != 600 && cycle_count == 100) {
  308. ret = rm3100_set_cycle_count(data, 200);
  309. if (ret < 0)
  310. goto unlock_return;
  311. }
  312. if (iio_buffer_enabled(indio_dev)) {
  313. /* Writing TMRC registers requires CMM reset. */
  314. ret = regmap_write(regmap, RM3100_REG_CMM, 0);
  315. if (ret < 0)
  316. goto unlock_return;
  317. ret = regmap_write(data->regmap, RM3100_REG_CMM,
  318. (*indio_dev->active_scan_mask & 0x7) <<
  319. RM3100_CMM_AXIS_SHIFT | RM3100_CMM_START);
  320. if (ret < 0)
  321. goto unlock_return;
  322. }
  323. mutex_unlock(&data->lock);
  324. data->conversion_time = rm3100_samp_rates[i][2] * 2;
  325. return 0;
  326. unlock_return:
  327. mutex_unlock(&data->lock);
  328. return ret;
  329. }
  330. static int rm3100_read_raw(struct iio_dev *indio_dev,
  331. const struct iio_chan_spec *chan,
  332. int *val, int *val2, long mask)
  333. {
  334. struct rm3100_data *data = iio_priv(indio_dev);
  335. int ret;
  336. switch (mask) {
  337. case IIO_CHAN_INFO_RAW:
  338. ret = iio_device_claim_direct_mode(indio_dev);
  339. if (ret < 0)
  340. return ret;
  341. ret = rm3100_read_mag(data, chan->scan_index, val);
  342. iio_device_release_direct_mode(indio_dev);
  343. return ret;
  344. case IIO_CHAN_INFO_SCALE:
  345. *val = 0;
  346. *val2 = data->scale;
  347. return IIO_VAL_INT_PLUS_MICRO;
  348. case IIO_CHAN_INFO_SAMP_FREQ:
  349. return rm3100_get_samp_freq(data, val, val2);
  350. default:
  351. return -EINVAL;
  352. }
  353. }
  354. static int rm3100_write_raw(struct iio_dev *indio_dev,
  355. struct iio_chan_spec const *chan,
  356. int val, int val2, long mask)
  357. {
  358. switch (mask) {
  359. case IIO_CHAN_INFO_SAMP_FREQ:
  360. return rm3100_set_samp_freq(indio_dev, val, val2);
  361. default:
  362. return -EINVAL;
  363. }
  364. }
  365. static const struct iio_info rm3100_info = {
  366. .attrs = &rm3100_attribute_group,
  367. .read_raw = rm3100_read_raw,
  368. .write_raw = rm3100_write_raw,
  369. };
  370. static int rm3100_buffer_preenable(struct iio_dev *indio_dev)
  371. {
  372. struct rm3100_data *data = iio_priv(indio_dev);
  373. /* Starting channels enabled. */
  374. return regmap_write(data->regmap, RM3100_REG_CMM,
  375. (*indio_dev->active_scan_mask & 0x7) << RM3100_CMM_AXIS_SHIFT |
  376. RM3100_CMM_START);
  377. }
  378. static int rm3100_buffer_postdisable(struct iio_dev *indio_dev)
  379. {
  380. struct rm3100_data *data = iio_priv(indio_dev);
  381. return regmap_write(data->regmap, RM3100_REG_CMM, 0);
  382. }
  383. static const struct iio_buffer_setup_ops rm3100_buffer_ops = {
  384. .preenable = rm3100_buffer_preenable,
  385. .postdisable = rm3100_buffer_postdisable,
  386. };
  387. static irqreturn_t rm3100_trigger_handler(int irq, void *p)
  388. {
  389. struct iio_poll_func *pf = p;
  390. struct iio_dev *indio_dev = pf->indio_dev;
  391. unsigned long scan_mask = *indio_dev->active_scan_mask;
  392. unsigned int mask_len = iio_get_masklength(indio_dev);
  393. struct rm3100_data *data = iio_priv(indio_dev);
  394. struct regmap *regmap = data->regmap;
  395. int ret, i, bit;
  396. mutex_lock(&data->lock);
  397. switch (scan_mask) {
  398. case BIT(0) | BIT(1) | BIT(2):
  399. ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 9);
  400. mutex_unlock(&data->lock);
  401. if (ret < 0)
  402. goto done;
  403. /* Convert XXXYYYZZZxxx to XXXxYYYxZZZx. x for paddings. */
  404. for (i = 2; i > 0; i--)
  405. memmove(data->buffer + i * 4, data->buffer + i * 3, 3);
  406. break;
  407. case BIT(0) | BIT(1):
  408. ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 6);
  409. mutex_unlock(&data->lock);
  410. if (ret < 0)
  411. goto done;
  412. memmove(data->buffer + 4, data->buffer + 3, 3);
  413. break;
  414. case BIT(1) | BIT(2):
  415. ret = regmap_bulk_read(regmap, RM3100_REG_MY2, data->buffer, 6);
  416. mutex_unlock(&data->lock);
  417. if (ret < 0)
  418. goto done;
  419. memmove(data->buffer + 4, data->buffer + 3, 3);
  420. break;
  421. case BIT(0) | BIT(2):
  422. ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 9);
  423. mutex_unlock(&data->lock);
  424. if (ret < 0)
  425. goto done;
  426. memmove(data->buffer + 4, data->buffer + 6, 3);
  427. break;
  428. default:
  429. for_each_set_bit(bit, &scan_mask, mask_len) {
  430. ret = regmap_bulk_read(regmap, RM3100_REG_MX2 + 3 * bit,
  431. data->buffer, 3);
  432. if (ret < 0) {
  433. mutex_unlock(&data->lock);
  434. goto done;
  435. }
  436. }
  437. mutex_unlock(&data->lock);
  438. }
  439. /*
  440. * Always using the same buffer so that we wouldn't need to set the
  441. * paddings to 0 in case of leaking any data.
  442. */
  443. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  444. pf->timestamp);
  445. done:
  446. iio_trigger_notify_done(indio_dev->trig);
  447. return IRQ_HANDLED;
  448. }
  449. int rm3100_common_probe(struct device *dev, struct regmap *regmap, int irq)
  450. {
  451. struct iio_dev *indio_dev;
  452. struct rm3100_data *data;
  453. unsigned int tmp;
  454. int ret;
  455. int samp_rate_index;
  456. indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
  457. if (!indio_dev)
  458. return -ENOMEM;
  459. data = iio_priv(indio_dev);
  460. data->regmap = regmap;
  461. mutex_init(&data->lock);
  462. indio_dev->name = "rm3100";
  463. indio_dev->info = &rm3100_info;
  464. indio_dev->channels = rm3100_channels;
  465. indio_dev->num_channels = ARRAY_SIZE(rm3100_channels);
  466. indio_dev->modes = INDIO_DIRECT_MODE;
  467. if (!irq)
  468. data->use_interrupt = false;
  469. else {
  470. data->use_interrupt = true;
  471. init_completion(&data->measuring_done);
  472. ret = devm_request_threaded_irq(dev,
  473. irq,
  474. rm3100_irq_handler,
  475. rm3100_thread_fn,
  476. IRQF_TRIGGER_HIGH |
  477. IRQF_ONESHOT,
  478. indio_dev->name,
  479. indio_dev);
  480. if (ret < 0) {
  481. dev_err(dev, "request irq line failed.\n");
  482. return ret;
  483. }
  484. data->drdy_trig = devm_iio_trigger_alloc(dev, "%s-drdy%d",
  485. indio_dev->name,
  486. iio_device_id(indio_dev));
  487. if (!data->drdy_trig)
  488. return -ENOMEM;
  489. ret = devm_iio_trigger_register(dev, data->drdy_trig);
  490. if (ret < 0)
  491. return ret;
  492. }
  493. ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
  494. &iio_pollfunc_store_time,
  495. rm3100_trigger_handler,
  496. &rm3100_buffer_ops);
  497. if (ret < 0)
  498. return ret;
  499. ret = regmap_read(regmap, RM3100_REG_TMRC, &tmp);
  500. if (ret < 0)
  501. return ret;
  502. samp_rate_index = tmp - RM3100_TMRC_OFFSET;
  503. if (samp_rate_index < 0 || samp_rate_index >= RM3100_SAMP_NUM) {
  504. dev_err(dev, "The value read from RM3100_REG_TMRC is invalid!\n");
  505. return -EINVAL;
  506. }
  507. /* Initializing max wait time, which is double conversion time. */
  508. data->conversion_time = rm3100_samp_rates[samp_rate_index][2] * 2;
  509. /* Cycle count values may not be what we want. */
  510. if ((tmp - RM3100_TMRC_OFFSET) == 0)
  511. rm3100_set_cycle_count(data, 100);
  512. else
  513. rm3100_set_cycle_count(data, 200);
  514. return devm_iio_device_register(dev, indio_dev);
  515. }
  516. EXPORT_SYMBOL_NS_GPL(rm3100_common_probe, IIO_RM3100);
  517. MODULE_AUTHOR("Song Qiang <songqiang1304521@gmail.com>");
  518. MODULE_DESCRIPTION("PNI RM3100 3-axis magnetometer i2c driver");
  519. MODULE_LICENSE("GPL v2");