ics932s401.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * A driver for the Integrated Circuits ICS932S401
  4. * Copyright (C) 2008 IBM
  5. *
  6. * Author: Darrick J. Wong <darrick.wong@oracle.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/i2c.h>
  11. #include <linux/err.h>
  12. #include <linux/mutex.h>
  13. #include <linux/delay.h>
  14. #include <linux/log2.h>
  15. #include <linux/slab.h>
  16. /* Addresses to scan */
  17. static const unsigned short normal_i2c[] = { 0x69, I2C_CLIENT_END };
  18. /* ICS932S401 registers */
  19. #define ICS932S401_REG_CFG2 0x01
  20. #define ICS932S401_CFG1_SPREAD 0x01
  21. #define ICS932S401_REG_CFG7 0x06
  22. #define ICS932S401_FS_MASK 0x07
  23. #define ICS932S401_REG_VENDOR_REV 0x07
  24. #define ICS932S401_VENDOR 1
  25. #define ICS932S401_VENDOR_MASK 0x0F
  26. #define ICS932S401_REV 4
  27. #define ICS932S401_REV_SHIFT 4
  28. #define ICS932S401_REG_DEVICE 0x09
  29. #define ICS932S401_DEVICE 11
  30. #define ICS932S401_REG_CTRL 0x0A
  31. #define ICS932S401_MN_ENABLED 0x80
  32. #define ICS932S401_CPU_ALT 0x04
  33. #define ICS932S401_SRC_ALT 0x08
  34. #define ICS932S401_REG_CPU_M_CTRL 0x0B
  35. #define ICS932S401_M_MASK 0x3F
  36. #define ICS932S401_REG_CPU_N_CTRL 0x0C
  37. #define ICS932S401_REG_CPU_SPREAD1 0x0D
  38. #define ICS932S401_REG_CPU_SPREAD2 0x0E
  39. #define ICS932S401_SPREAD_MASK 0x7FFF
  40. #define ICS932S401_REG_SRC_M_CTRL 0x0F
  41. #define ICS932S401_REG_SRC_N_CTRL 0x10
  42. #define ICS932S401_REG_SRC_SPREAD1 0x11
  43. #define ICS932S401_REG_SRC_SPREAD2 0x12
  44. #define ICS932S401_REG_CPU_DIVISOR 0x13
  45. #define ICS932S401_CPU_DIVISOR_SHIFT 4
  46. #define ICS932S401_REG_PCISRC_DIVISOR 0x14
  47. #define ICS932S401_SRC_DIVISOR_MASK 0x0F
  48. #define ICS932S401_PCI_DIVISOR_SHIFT 4
  49. /* Base clock is 14.318MHz */
  50. #define BASE_CLOCK 14318
  51. #define NUM_REGS 21
  52. #define NUM_MIRRORED_REGS 15
  53. static int regs_to_copy[NUM_MIRRORED_REGS] = {
  54. ICS932S401_REG_CFG2,
  55. ICS932S401_REG_CFG7,
  56. ICS932S401_REG_VENDOR_REV,
  57. ICS932S401_REG_DEVICE,
  58. ICS932S401_REG_CTRL,
  59. ICS932S401_REG_CPU_M_CTRL,
  60. ICS932S401_REG_CPU_N_CTRL,
  61. ICS932S401_REG_CPU_SPREAD1,
  62. ICS932S401_REG_CPU_SPREAD2,
  63. ICS932S401_REG_SRC_M_CTRL,
  64. ICS932S401_REG_SRC_N_CTRL,
  65. ICS932S401_REG_SRC_SPREAD1,
  66. ICS932S401_REG_SRC_SPREAD2,
  67. ICS932S401_REG_CPU_DIVISOR,
  68. ICS932S401_REG_PCISRC_DIVISOR,
  69. };
  70. /* How often do we reread sensors values? (In jiffies) */
  71. #define SENSOR_REFRESH_INTERVAL (2 * HZ)
  72. /* How often do we reread sensor limit values? (In jiffies) */
  73. #define LIMIT_REFRESH_INTERVAL (60 * HZ)
  74. struct ics932s401_data {
  75. struct attribute_group attrs;
  76. struct mutex lock;
  77. char sensors_valid;
  78. unsigned long sensors_last_updated; /* In jiffies */
  79. u8 regs[NUM_REGS];
  80. };
  81. static int ics932s401_probe(struct i2c_client *client);
  82. static int ics932s401_detect(struct i2c_client *client,
  83. struct i2c_board_info *info);
  84. static void ics932s401_remove(struct i2c_client *client);
  85. static const struct i2c_device_id ics932s401_id[] = {
  86. { "ics932s401" },
  87. { }
  88. };
  89. MODULE_DEVICE_TABLE(i2c, ics932s401_id);
  90. static struct i2c_driver ics932s401_driver = {
  91. .class = I2C_CLASS_HWMON,
  92. .driver = {
  93. .name = "ics932s401",
  94. },
  95. .probe = ics932s401_probe,
  96. .remove = ics932s401_remove,
  97. .id_table = ics932s401_id,
  98. .detect = ics932s401_detect,
  99. .address_list = normal_i2c,
  100. };
  101. static struct ics932s401_data *ics932s401_update_device(struct device *dev)
  102. {
  103. struct i2c_client *client = to_i2c_client(dev);
  104. struct ics932s401_data *data = i2c_get_clientdata(client);
  105. unsigned long local_jiffies = jiffies;
  106. int i, temp;
  107. mutex_lock(&data->lock);
  108. if (time_before(local_jiffies, data->sensors_last_updated +
  109. SENSOR_REFRESH_INTERVAL)
  110. && data->sensors_valid)
  111. goto out;
  112. /*
  113. * Each register must be read as a word and then right shifted 8 bits.
  114. * Not really sure why this is; setting the "byte count programming"
  115. * register to 1 does not fix this problem.
  116. */
  117. for (i = 0; i < NUM_MIRRORED_REGS; i++) {
  118. temp = i2c_smbus_read_word_data(client, regs_to_copy[i]);
  119. if (temp < 0)
  120. temp = 0;
  121. data->regs[regs_to_copy[i]] = temp >> 8;
  122. }
  123. data->sensors_last_updated = local_jiffies;
  124. data->sensors_valid = 1;
  125. out:
  126. mutex_unlock(&data->lock);
  127. return data;
  128. }
  129. static ssize_t show_spread_enabled(struct device *dev,
  130. struct device_attribute *devattr,
  131. char *buf)
  132. {
  133. struct ics932s401_data *data = ics932s401_update_device(dev);
  134. if (data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD)
  135. return sprintf(buf, "1\n");
  136. return sprintf(buf, "0\n");
  137. }
  138. /* bit to cpu khz map */
  139. static const int fs_speeds[] = {
  140. 266666,
  141. 133333,
  142. 200000,
  143. 166666,
  144. 333333,
  145. 100000,
  146. 400000,
  147. 0,
  148. };
  149. /* clock divisor map */
  150. static const int divisors[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16,
  151. 24, 40, 120};
  152. /* Calculate CPU frequency from the M/N registers. */
  153. static int calculate_cpu_freq(struct ics932s401_data *data)
  154. {
  155. int m, n, freq;
  156. m = data->regs[ICS932S401_REG_CPU_M_CTRL] & ICS932S401_M_MASK;
  157. n = data->regs[ICS932S401_REG_CPU_N_CTRL];
  158. /* Pull in bits 8 & 9 from the M register */
  159. n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x80) << 1;
  160. n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x40) << 3;
  161. freq = BASE_CLOCK * (n + 8) / (m + 2);
  162. freq /= divisors[data->regs[ICS932S401_REG_CPU_DIVISOR] >>
  163. ICS932S401_CPU_DIVISOR_SHIFT];
  164. return freq;
  165. }
  166. static ssize_t show_cpu_clock(struct device *dev,
  167. struct device_attribute *devattr,
  168. char *buf)
  169. {
  170. struct ics932s401_data *data = ics932s401_update_device(dev);
  171. return sprintf(buf, "%d\n", calculate_cpu_freq(data));
  172. }
  173. static ssize_t show_cpu_clock_sel(struct device *dev,
  174. struct device_attribute *devattr,
  175. char *buf)
  176. {
  177. struct ics932s401_data *data = ics932s401_update_device(dev);
  178. int freq;
  179. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
  180. freq = calculate_cpu_freq(data);
  181. else {
  182. /* Freq is neatly wrapped up for us */
  183. int fid = data->regs[ICS932S401_REG_CFG7] & ICS932S401_FS_MASK;
  184. freq = fs_speeds[fid];
  185. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT) {
  186. switch (freq) {
  187. case 166666:
  188. freq = 160000;
  189. break;
  190. case 333333:
  191. freq = 320000;
  192. break;
  193. }
  194. }
  195. }
  196. return sprintf(buf, "%d\n", freq);
  197. }
  198. /* Calculate SRC frequency from the M/N registers. */
  199. static int calculate_src_freq(struct ics932s401_data *data)
  200. {
  201. int m, n, freq;
  202. m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK;
  203. n = data->regs[ICS932S401_REG_SRC_N_CTRL];
  204. /* Pull in bits 8 & 9 from the M register */
  205. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1;
  206. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3;
  207. freq = BASE_CLOCK * (n + 8) / (m + 2);
  208. freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] &
  209. ICS932S401_SRC_DIVISOR_MASK];
  210. return freq;
  211. }
  212. static ssize_t show_src_clock(struct device *dev,
  213. struct device_attribute *devattr,
  214. char *buf)
  215. {
  216. struct ics932s401_data *data = ics932s401_update_device(dev);
  217. return sprintf(buf, "%d\n", calculate_src_freq(data));
  218. }
  219. static ssize_t show_src_clock_sel(struct device *dev,
  220. struct device_attribute *devattr,
  221. char *buf)
  222. {
  223. struct ics932s401_data *data = ics932s401_update_device(dev);
  224. int freq;
  225. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
  226. freq = calculate_src_freq(data);
  227. else
  228. /* Freq is neatly wrapped up for us */
  229. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT &&
  230. data->regs[ICS932S401_REG_CTRL] & ICS932S401_SRC_ALT)
  231. freq = 96000;
  232. else
  233. freq = 100000;
  234. return sprintf(buf, "%d\n", freq);
  235. }
  236. /* Calculate PCI frequency from the SRC M/N registers. */
  237. static int calculate_pci_freq(struct ics932s401_data *data)
  238. {
  239. int m, n, freq;
  240. m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK;
  241. n = data->regs[ICS932S401_REG_SRC_N_CTRL];
  242. /* Pull in bits 8 & 9 from the M register */
  243. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1;
  244. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3;
  245. freq = BASE_CLOCK * (n + 8) / (m + 2);
  246. freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] >>
  247. ICS932S401_PCI_DIVISOR_SHIFT];
  248. return freq;
  249. }
  250. static ssize_t show_pci_clock(struct device *dev,
  251. struct device_attribute *devattr,
  252. char *buf)
  253. {
  254. struct ics932s401_data *data = ics932s401_update_device(dev);
  255. return sprintf(buf, "%d\n", calculate_pci_freq(data));
  256. }
  257. static ssize_t show_pci_clock_sel(struct device *dev,
  258. struct device_attribute *devattr,
  259. char *buf)
  260. {
  261. struct ics932s401_data *data = ics932s401_update_device(dev);
  262. int freq;
  263. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
  264. freq = calculate_pci_freq(data);
  265. else
  266. freq = 33333;
  267. return sprintf(buf, "%d\n", freq);
  268. }
  269. static ssize_t show_value(struct device *dev,
  270. struct device_attribute *devattr,
  271. char *buf);
  272. static ssize_t show_spread(struct device *dev,
  273. struct device_attribute *devattr,
  274. char *buf);
  275. static DEVICE_ATTR(spread_enabled, S_IRUGO, show_spread_enabled, NULL);
  276. static DEVICE_ATTR(cpu_clock_selection, S_IRUGO, show_cpu_clock_sel, NULL);
  277. static DEVICE_ATTR(cpu_clock, S_IRUGO, show_cpu_clock, NULL);
  278. static DEVICE_ATTR(src_clock_selection, S_IRUGO, show_src_clock_sel, NULL);
  279. static DEVICE_ATTR(src_clock, S_IRUGO, show_src_clock, NULL);
  280. static DEVICE_ATTR(pci_clock_selection, S_IRUGO, show_pci_clock_sel, NULL);
  281. static DEVICE_ATTR(pci_clock, S_IRUGO, show_pci_clock, NULL);
  282. static DEVICE_ATTR(usb_clock, S_IRUGO, show_value, NULL);
  283. static DEVICE_ATTR(ref_clock, S_IRUGO, show_value, NULL);
  284. static DEVICE_ATTR(cpu_spread, S_IRUGO, show_spread, NULL);
  285. static DEVICE_ATTR(src_spread, S_IRUGO, show_spread, NULL);
  286. static struct attribute *ics932s401_attr[] = {
  287. &dev_attr_spread_enabled.attr,
  288. &dev_attr_cpu_clock_selection.attr,
  289. &dev_attr_cpu_clock.attr,
  290. &dev_attr_src_clock_selection.attr,
  291. &dev_attr_src_clock.attr,
  292. &dev_attr_pci_clock_selection.attr,
  293. &dev_attr_pci_clock.attr,
  294. &dev_attr_usb_clock.attr,
  295. &dev_attr_ref_clock.attr,
  296. &dev_attr_cpu_spread.attr,
  297. &dev_attr_src_spread.attr,
  298. NULL
  299. };
  300. static ssize_t show_value(struct device *dev,
  301. struct device_attribute *devattr,
  302. char *buf)
  303. {
  304. int x;
  305. if (devattr == &dev_attr_usb_clock)
  306. x = 48000;
  307. else if (devattr == &dev_attr_ref_clock)
  308. x = BASE_CLOCK;
  309. else
  310. BUG();
  311. return sprintf(buf, "%d\n", x);
  312. }
  313. static ssize_t show_spread(struct device *dev,
  314. struct device_attribute *devattr,
  315. char *buf)
  316. {
  317. struct ics932s401_data *data = ics932s401_update_device(dev);
  318. int reg;
  319. unsigned long val;
  320. if (!(data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD))
  321. return sprintf(buf, "0%%\n");
  322. if (devattr == &dev_attr_src_spread)
  323. reg = ICS932S401_REG_SRC_SPREAD1;
  324. else if (devattr == &dev_attr_cpu_spread)
  325. reg = ICS932S401_REG_CPU_SPREAD1;
  326. else
  327. BUG();
  328. val = data->regs[reg] | (data->regs[reg + 1] << 8);
  329. val &= ICS932S401_SPREAD_MASK;
  330. /* Scale 0..2^14 to -0.5. */
  331. val = 500000 * val / 16384;
  332. return sprintf(buf, "-0.%lu%%\n", val);
  333. }
  334. /* Return 0 if detection is successful, -ENODEV otherwise */
  335. static int ics932s401_detect(struct i2c_client *client,
  336. struct i2c_board_info *info)
  337. {
  338. struct i2c_adapter *adapter = client->adapter;
  339. int vendor, device, revision;
  340. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  341. return -ENODEV;
  342. vendor = i2c_smbus_read_word_data(client, ICS932S401_REG_VENDOR_REV);
  343. vendor >>= 8;
  344. revision = vendor >> ICS932S401_REV_SHIFT;
  345. vendor &= ICS932S401_VENDOR_MASK;
  346. if (vendor != ICS932S401_VENDOR)
  347. return -ENODEV;
  348. device = i2c_smbus_read_word_data(client, ICS932S401_REG_DEVICE);
  349. device >>= 8;
  350. if (device != ICS932S401_DEVICE)
  351. return -ENODEV;
  352. if (revision != ICS932S401_REV)
  353. dev_info(&adapter->dev, "Unknown revision %d\n", revision);
  354. strscpy(info->type, "ics932s401", I2C_NAME_SIZE);
  355. return 0;
  356. }
  357. static int ics932s401_probe(struct i2c_client *client)
  358. {
  359. struct ics932s401_data *data;
  360. int err;
  361. data = kzalloc(sizeof(struct ics932s401_data), GFP_KERNEL);
  362. if (!data) {
  363. err = -ENOMEM;
  364. goto exit;
  365. }
  366. i2c_set_clientdata(client, data);
  367. mutex_init(&data->lock);
  368. dev_info(&client->dev, "%s chip found\n", client->name);
  369. /* Register sysfs hooks */
  370. data->attrs.attrs = ics932s401_attr;
  371. err = sysfs_create_group(&client->dev.kobj, &data->attrs);
  372. if (err)
  373. goto exit_free;
  374. return 0;
  375. exit_free:
  376. kfree(data);
  377. exit:
  378. return err;
  379. }
  380. static void ics932s401_remove(struct i2c_client *client)
  381. {
  382. struct ics932s401_data *data = i2c_get_clientdata(client);
  383. sysfs_remove_group(&client->dev.kobj, &data->attrs);
  384. kfree(data);
  385. }
  386. module_i2c_driver(ics932s401_driver);
  387. MODULE_AUTHOR("Darrick J. Wong <darrick.wong@oracle.com>");
  388. MODULE_DESCRIPTION("ICS932S401 driver");
  389. MODULE_LICENSE("GPL");
  390. /* IBM IntelliStation Z30 */
  391. MODULE_ALIAS("dmi:bvnIBM:*:rn9228:*");
  392. MODULE_ALIAS("dmi:bvnIBM:*:rn9232:*");
  393. /* IBM x3650/x3550 */
  394. MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3650*");
  395. MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3550*");