rtsx_usb_sdmmc.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Realtek USB SD/MMC Card Interface driver
  3. *
  4. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  5. *
  6. * Author:
  7. * Roger Tseng <rogerable@realtek.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include <linux/delay.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/usb.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/mmc/mmc.h>
  16. #include <linux/mmc/sd.h>
  17. #include <linux/mmc/card.h>
  18. #include <linux/scatterlist.h>
  19. #include <linux/pm.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/rtsx_usb.h>
  22. #include <linux/unaligned.h>
  23. #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  24. defined(CONFIG_MMC_REALTEK_USB_MODULE))
  25. #include <linux/leds.h>
  26. #include <linux/workqueue.h>
  27. #define RTSX_USB_USE_LEDS_CLASS
  28. #endif
  29. struct rtsx_usb_sdmmc {
  30. struct platform_device *pdev;
  31. struct rtsx_ucr *ucr;
  32. struct mmc_host *mmc;
  33. struct mmc_request *mrq;
  34. struct mutex host_mutex;
  35. u8 ssc_depth;
  36. unsigned int clock;
  37. bool vpclk;
  38. bool double_clk;
  39. bool host_removal;
  40. bool card_exist;
  41. bool initial_mode;
  42. bool ddr_mode;
  43. unsigned char power_mode;
  44. #ifdef RTSX_USB_USE_LEDS_CLASS
  45. struct led_classdev led;
  46. char led_name[32];
  47. struct work_struct led_work;
  48. #endif
  49. };
  50. static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
  51. {
  52. return &(host->pdev->dev);
  53. }
  54. static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
  55. {
  56. struct rtsx_ucr *ucr = host->ucr;
  57. rtsx_usb_ep0_write_register(ucr, CARD_STOP,
  58. SD_STOP | SD_CLR_ERR,
  59. SD_STOP | SD_CLR_ERR);
  60. rtsx_usb_clear_dma_err(ucr);
  61. rtsx_usb_clear_fsm_err(ucr);
  62. }
  63. #ifdef DEBUG
  64. static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
  65. {
  66. struct rtsx_ucr *ucr = host->ucr;
  67. u8 val = 0;
  68. rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
  69. dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
  70. rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
  71. dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
  72. rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
  73. dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
  74. }
  75. #else
  76. #define sd_print_debug_regs(host)
  77. #endif /* DEBUG */
  78. static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  79. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  80. {
  81. struct rtsx_ucr *ucr = host->ucr;
  82. int err;
  83. u8 trans_mode;
  84. if (!buf)
  85. buf_len = 0;
  86. rtsx_usb_init_cmd(ucr);
  87. if (cmd != NULL) {
  88. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
  89. , cmd->opcode);
  90. if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
  91. trans_mode = SD_TM_AUTO_TUNING;
  92. else
  93. trans_mode = SD_TM_NORMAL_READ;
  94. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  95. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  96. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  97. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  98. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  99. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  100. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  101. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  102. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  103. SD_CMD4, 0xFF, (u8)cmd->arg);
  104. } else {
  105. trans_mode = SD_TM_AUTO_READ_3;
  106. }
  107. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  108. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  109. 0xFF, (u8)(byte_cnt >> 8));
  110. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  111. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  112. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  113. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  114. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  115. if (trans_mode != SD_TM_AUTO_TUNING)
  116. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  117. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  118. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  119. 0xFF, trans_mode | SD_TRANSFER_START);
  120. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  121. SD_TRANSFER_END, SD_TRANSFER_END);
  122. if (cmd != NULL) {
  123. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  124. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  125. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  126. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  127. }
  128. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  129. if (err) {
  130. dev_dbg(sdmmc_dev(host),
  131. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  132. return err;
  133. }
  134. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  135. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  136. sd_print_debug_regs(host);
  137. if (!err) {
  138. dev_dbg(sdmmc_dev(host),
  139. "Transfer failed (SD_TRANSFER = %02x)\n",
  140. ucr->rsp_buf[0]);
  141. err = -EIO;
  142. } else {
  143. dev_dbg(sdmmc_dev(host),
  144. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  145. }
  146. return err;
  147. }
  148. if (cmd != NULL) {
  149. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  150. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  151. cmd->resp[0]);
  152. }
  153. if (buf && buf_len) {
  154. /* 2-byte aligned part */
  155. err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
  156. if (err) {
  157. dev_dbg(sdmmc_dev(host),
  158. "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
  159. return err;
  160. }
  161. /* unaligned byte */
  162. if (byte_cnt % 2)
  163. return rtsx_usb_read_register(ucr,
  164. PPBUF_BASE2 + byte_cnt,
  165. buf + byte_cnt - 1);
  166. }
  167. return 0;
  168. }
  169. static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  170. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  171. {
  172. struct rtsx_ucr *ucr = host->ucr;
  173. int err;
  174. u8 trans_mode;
  175. if (!buf)
  176. buf_len = 0;
  177. if (buf && buf_len) {
  178. err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
  179. if (err) {
  180. dev_dbg(sdmmc_dev(host),
  181. "rtsx_usb_write_ppbuf failed (err = %d)\n",
  182. err);
  183. return err;
  184. }
  185. }
  186. trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
  187. rtsx_usb_init_cmd(ucr);
  188. if (cmd != NULL) {
  189. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
  190. cmd->opcode);
  191. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  192. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  193. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  194. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  195. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  196. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  197. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  198. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  199. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  200. SD_CMD4, 0xFF, (u8)cmd->arg);
  201. }
  202. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  203. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  204. 0xFF, (u8)(byte_cnt >> 8));
  205. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  206. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  207. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  208. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  209. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  210. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  211. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  212. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  213. trans_mode | SD_TRANSFER_START);
  214. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  215. SD_TRANSFER_END, SD_TRANSFER_END);
  216. if (cmd != NULL) {
  217. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  218. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  219. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  220. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  221. }
  222. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  223. if (err) {
  224. dev_dbg(sdmmc_dev(host),
  225. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  226. return err;
  227. }
  228. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  229. if (err) {
  230. sd_print_debug_regs(host);
  231. dev_dbg(sdmmc_dev(host),
  232. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  233. return err;
  234. }
  235. if (cmd != NULL) {
  236. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  237. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  238. cmd->resp[0]);
  239. }
  240. return 0;
  241. }
  242. static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
  243. struct mmc_command *cmd)
  244. {
  245. struct rtsx_ucr *ucr = host->ucr;
  246. u8 cmd_idx = (u8)cmd->opcode;
  247. u32 arg = cmd->arg;
  248. int err = 0;
  249. int timeout = 100;
  250. int i;
  251. u8 *ptr;
  252. int stat_idx = 0;
  253. int len = 2;
  254. u8 rsp_type;
  255. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
  256. __func__, cmd_idx, arg);
  257. /* Response type:
  258. * R0
  259. * R1, R5, R6, R7
  260. * R1b
  261. * R2
  262. * R3, R4
  263. */
  264. switch (mmc_resp_type(cmd)) {
  265. case MMC_RSP_NONE:
  266. rsp_type = SD_RSP_TYPE_R0;
  267. break;
  268. case MMC_RSP_R1:
  269. rsp_type = SD_RSP_TYPE_R1;
  270. break;
  271. case MMC_RSP_R1_NO_CRC:
  272. rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
  273. break;
  274. case MMC_RSP_R1B:
  275. rsp_type = SD_RSP_TYPE_R1b;
  276. break;
  277. case MMC_RSP_R2:
  278. rsp_type = SD_RSP_TYPE_R2;
  279. break;
  280. case MMC_RSP_R3:
  281. rsp_type = SD_RSP_TYPE_R3;
  282. break;
  283. default:
  284. dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
  285. err = -EINVAL;
  286. goto out;
  287. }
  288. if (rsp_type == SD_RSP_TYPE_R1b)
  289. timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
  290. if (cmd->opcode == SD_SWITCH_VOLTAGE) {
  291. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  292. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  293. SD_CLK_TOGGLE_EN);
  294. if (err)
  295. goto out;
  296. }
  297. rtsx_usb_init_cmd(ucr);
  298. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
  299. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
  300. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
  301. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
  302. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
  303. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
  304. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  305. 0x01, PINGPONG_BUFFER);
  306. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  307. 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
  308. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  309. SD_TRANSFER_END | SD_STAT_IDLE,
  310. SD_TRANSFER_END | SD_STAT_IDLE);
  311. if (rsp_type == SD_RSP_TYPE_R2) {
  312. /* Read data from ping-pong buffer */
  313. for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
  314. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  315. stat_idx = 16;
  316. } else if (rsp_type != SD_RSP_TYPE_R0) {
  317. /* Read data from SD_CMDx registers */
  318. for (i = SD_CMD0; i <= SD_CMD4; i++)
  319. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  320. stat_idx = 5;
  321. }
  322. len += stat_idx;
  323. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
  324. err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
  325. if (err) {
  326. dev_dbg(sdmmc_dev(host),
  327. "rtsx_usb_send_cmd error (err = %d)\n", err);
  328. goto out;
  329. }
  330. err = rtsx_usb_get_rsp(ucr, len, timeout);
  331. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  332. sd_print_debug_regs(host);
  333. sd_clear_error(host);
  334. if (!err) {
  335. dev_dbg(sdmmc_dev(host),
  336. "Transfer failed (SD_TRANSFER = %02x)\n",
  337. ucr->rsp_buf[0]);
  338. err = -EIO;
  339. } else {
  340. dev_dbg(sdmmc_dev(host),
  341. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  342. }
  343. goto out;
  344. }
  345. if (rsp_type == SD_RSP_TYPE_R0) {
  346. err = 0;
  347. goto out;
  348. }
  349. /* Skip result of CHECK_REG_CMD */
  350. ptr = ucr->rsp_buf + 1;
  351. /* Check (Start,Transmission) bit of Response */
  352. if ((ptr[0] & 0xC0) != 0) {
  353. err = -EILSEQ;
  354. dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
  355. goto out;
  356. }
  357. /* Check CRC7 */
  358. if (!(rsp_type & SD_NO_CHECK_CRC7)) {
  359. if (ptr[stat_idx] & SD_CRC7_ERR) {
  360. err = -EILSEQ;
  361. dev_dbg(sdmmc_dev(host), "CRC7 error\n");
  362. goto out;
  363. }
  364. }
  365. if (rsp_type == SD_RSP_TYPE_R2) {
  366. /*
  367. * The controller offloads the last byte {CRC-7, end bit 1'b1}
  368. * of response type R2. Assign dummy CRC, 0, and end bit to the
  369. * byte(ptr[16], goes into the LSB of resp[3] later).
  370. */
  371. ptr[16] = 1;
  372. for (i = 0; i < 4; i++) {
  373. cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
  374. dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
  375. i, cmd->resp[i]);
  376. }
  377. } else {
  378. cmd->resp[0] = get_unaligned_be32(ptr + 1);
  379. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  380. cmd->resp[0]);
  381. }
  382. out:
  383. cmd->error = err;
  384. }
  385. static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
  386. {
  387. struct rtsx_ucr *ucr = host->ucr;
  388. struct mmc_data *data = mrq->data;
  389. int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
  390. u8 cfg2, trans_mode;
  391. int err;
  392. u8 flag;
  393. size_t data_len = data->blksz * data->blocks;
  394. unsigned int pipe;
  395. if (read) {
  396. dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
  397. __func__, data_len);
  398. cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  399. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
  400. trans_mode = SD_TM_AUTO_READ_3;
  401. } else {
  402. dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
  403. __func__, data_len);
  404. cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  405. SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
  406. trans_mode = SD_TM_AUTO_WRITE_3;
  407. }
  408. rtsx_usb_init_cmd(ucr);
  409. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
  410. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
  411. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
  412. 0xFF, (u8)data->blocks);
  413. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
  414. 0xFF, (u8)(data->blocks >> 8));
  415. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  416. 0x01, RING_BUFFER);
  417. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
  418. 0xFF, (u8)(data_len >> 24));
  419. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
  420. 0xFF, (u8)(data_len >> 16));
  421. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
  422. 0xFF, (u8)(data_len >> 8));
  423. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
  424. 0xFF, (u8)data_len);
  425. if (read) {
  426. flag = MODE_CDIR;
  427. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  428. 0x03 | DMA_PACK_SIZE_MASK,
  429. DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
  430. } else {
  431. flag = MODE_CDOR;
  432. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  433. 0x03 | DMA_PACK_SIZE_MASK,
  434. DMA_DIR_TO_CARD | DMA_EN | DMA_512);
  435. }
  436. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
  437. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  438. trans_mode | SD_TRANSFER_START);
  439. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  440. SD_TRANSFER_END, SD_TRANSFER_END);
  441. err = rtsx_usb_send_cmd(ucr, flag, 100);
  442. if (err)
  443. return err;
  444. if (read)
  445. pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
  446. else
  447. pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
  448. err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
  449. data->sg_len, NULL, 10000);
  450. if (err) {
  451. dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
  452. , err);
  453. sd_clear_error(host);
  454. return err;
  455. }
  456. return rtsx_usb_get_rsp(ucr, 1, 2000);
  457. }
  458. static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
  459. {
  460. rtsx_usb_write_register(host->ucr, SD_CFG1,
  461. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
  462. }
  463. static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
  464. {
  465. rtsx_usb_write_register(host->ucr, SD_CFG1,
  466. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
  467. }
  468. static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
  469. struct mmc_request *mrq)
  470. {
  471. struct mmc_command *cmd = mrq->cmd;
  472. struct mmc_data *data = mrq->data;
  473. u8 *buf;
  474. buf = kzalloc(data->blksz, GFP_NOIO);
  475. if (!buf) {
  476. cmd->error = -ENOMEM;
  477. return;
  478. }
  479. if (data->flags & MMC_DATA_READ) {
  480. if (host->initial_mode)
  481. sd_disable_initial_mode(host);
  482. cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
  483. data->blksz, 200);
  484. if (host->initial_mode)
  485. sd_enable_initial_mode(host);
  486. sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
  487. } else {
  488. sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
  489. cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
  490. data->blksz, 200);
  491. }
  492. kfree(buf);
  493. }
  494. static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
  495. {
  496. struct rtsx_ucr *ucr = host->ucr;
  497. dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
  498. __func__, tx ? "TX" : "RX", sample_point);
  499. rtsx_usb_init_cmd(ucr);
  500. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
  501. if (tx)
  502. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  503. 0x0F, sample_point);
  504. else
  505. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
  506. 0x0F, sample_point);
  507. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
  508. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  509. PHASE_NOT_RESET, PHASE_NOT_RESET);
  510. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
  511. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
  512. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  513. }
  514. static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
  515. {
  516. idx &= MAX_PHASE;
  517. return phase_map & (1 << idx);
  518. }
  519. static int get_phase_len(u32 phase_map, unsigned int idx)
  520. {
  521. int i;
  522. for (i = 0; i < MAX_PHASE + 1; i++) {
  523. if (get_phase_point(phase_map, idx + i) == 0)
  524. return i;
  525. }
  526. return MAX_PHASE + 1;
  527. }
  528. static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
  529. {
  530. int start = 0, len = 0;
  531. int start_final = 0, len_final = 0;
  532. u8 final_phase = 0xFF;
  533. if (phase_map == 0) {
  534. dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
  535. return final_phase;
  536. }
  537. while (start < MAX_PHASE + 1) {
  538. len = get_phase_len(phase_map, start);
  539. if (len_final < len) {
  540. start_final = start;
  541. len_final = len;
  542. }
  543. start += len ? len : 1;
  544. }
  545. final_phase = (start_final + len_final / 2) & MAX_PHASE;
  546. dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
  547. phase_map, len_final, final_phase);
  548. return final_phase;
  549. }
  550. static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
  551. {
  552. int i;
  553. u8 val = 0;
  554. for (i = 0; i < 100; i++) {
  555. rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val);
  556. if (val & SD_DATA_IDLE)
  557. return;
  558. usleep_range(100, 1000);
  559. }
  560. }
  561. static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
  562. u8 opcode, u8 sample_point)
  563. {
  564. int err;
  565. struct mmc_command cmd = {};
  566. err = sd_change_phase(host, sample_point, 0);
  567. if (err)
  568. return err;
  569. cmd.opcode = MMC_SEND_TUNING_BLOCK;
  570. err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
  571. if (err) {
  572. /* Wait till SD DATA IDLE */
  573. sd_wait_data_idle(host);
  574. sd_clear_error(host);
  575. return err;
  576. }
  577. return 0;
  578. }
  579. static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
  580. u8 opcode, u16 *phase_map)
  581. {
  582. int err, i;
  583. u16 raw_phase_map = 0;
  584. for (i = MAX_PHASE; i >= 0; i--) {
  585. err = sd_tuning_rx_cmd(host, opcode, (u8)i);
  586. if (!err)
  587. raw_phase_map |= 1 << i;
  588. }
  589. if (phase_map)
  590. *phase_map = raw_phase_map;
  591. }
  592. static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
  593. {
  594. int err, i;
  595. u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
  596. u8 final_phase;
  597. /* setting fixed default TX phase */
  598. err = sd_change_phase(host, 0x01, 1);
  599. if (err) {
  600. dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
  601. return err;
  602. }
  603. /* tuning RX phase */
  604. for (i = 0; i < RX_TUNING_CNT; i++) {
  605. sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
  606. if (raw_phase_map[i] == 0)
  607. break;
  608. }
  609. phase_map = 0xFFFF;
  610. for (i = 0; i < RX_TUNING_CNT; i++) {
  611. dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
  612. i, raw_phase_map[i]);
  613. phase_map &= raw_phase_map[i];
  614. }
  615. dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
  616. if (phase_map) {
  617. final_phase = sd_search_final_phase(host, phase_map);
  618. if (final_phase == 0xFF)
  619. return -EINVAL;
  620. err = sd_change_phase(host, final_phase, 0);
  621. if (err)
  622. return err;
  623. } else {
  624. return -EINVAL;
  625. }
  626. return 0;
  627. }
  628. static int sdmmc_get_ro(struct mmc_host *mmc)
  629. {
  630. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  631. struct rtsx_ucr *ucr = host->ucr;
  632. int err;
  633. u16 val;
  634. if (host->host_removal)
  635. return -ENOMEDIUM;
  636. mutex_lock(&ucr->dev_mutex);
  637. /* Check SD card detect */
  638. err = rtsx_usb_get_card_status(ucr, &val);
  639. mutex_unlock(&ucr->dev_mutex);
  640. /* Treat failed detection as non-ro */
  641. if (err)
  642. return 0;
  643. if (val & SD_WP)
  644. return 1;
  645. return 0;
  646. }
  647. static int sdmmc_get_cd(struct mmc_host *mmc)
  648. {
  649. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  650. struct rtsx_ucr *ucr = host->ucr;
  651. int err;
  652. u16 val;
  653. if (host->host_removal)
  654. return -ENOMEDIUM;
  655. mutex_lock(&ucr->dev_mutex);
  656. /* Check SD card detect */
  657. err = rtsx_usb_get_card_status(ucr, &val);
  658. mutex_unlock(&ucr->dev_mutex);
  659. /* Treat failed detection as non-exist */
  660. if (err)
  661. goto no_card;
  662. if (val & SD_CD) {
  663. host->card_exist = true;
  664. return 1;
  665. }
  666. no_card:
  667. host->card_exist = false;
  668. return 0;
  669. }
  670. static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  671. {
  672. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  673. struct rtsx_ucr *ucr = host->ucr;
  674. struct mmc_command *cmd = mrq->cmd;
  675. struct mmc_data *data = mrq->data;
  676. unsigned int data_size = 0;
  677. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  678. if (host->host_removal) {
  679. cmd->error = -ENOMEDIUM;
  680. goto finish;
  681. }
  682. if ((!host->card_exist)) {
  683. cmd->error = -ENOMEDIUM;
  684. goto finish_detect_card;
  685. }
  686. mutex_lock(&ucr->dev_mutex);
  687. mutex_lock(&host->host_mutex);
  688. host->mrq = mrq;
  689. mutex_unlock(&host->host_mutex);
  690. if (mrq->data)
  691. data_size = data->blocks * data->blksz;
  692. if (!data_size) {
  693. sd_send_cmd_get_rsp(host, cmd);
  694. } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
  695. mmc_op_multi(cmd->opcode)) {
  696. sd_send_cmd_get_rsp(host, cmd);
  697. if (!cmd->error) {
  698. sd_rw_multi(host, mrq);
  699. if (mmc_op_multi(cmd->opcode) && mrq->stop) {
  700. sd_send_cmd_get_rsp(host, mrq->stop);
  701. rtsx_usb_write_register(ucr, MC_FIFO_CTL,
  702. FIFO_FLUSH, FIFO_FLUSH);
  703. }
  704. }
  705. } else {
  706. sd_normal_rw(host, mrq);
  707. }
  708. if (mrq->data) {
  709. if (cmd->error || data->error)
  710. data->bytes_xfered = 0;
  711. else
  712. data->bytes_xfered = data->blocks * data->blksz;
  713. }
  714. mutex_unlock(&ucr->dev_mutex);
  715. finish_detect_card:
  716. if (cmd->error) {
  717. /*
  718. * detect card when fail to update card existence state and
  719. * speed up card removal when retry
  720. */
  721. sdmmc_get_cd(mmc);
  722. dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
  723. }
  724. finish:
  725. mutex_lock(&host->host_mutex);
  726. host->mrq = NULL;
  727. mutex_unlock(&host->host_mutex);
  728. mmc_request_done(mmc, mrq);
  729. }
  730. static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
  731. unsigned char bus_width)
  732. {
  733. int err = 0;
  734. static const u8 width[] = {
  735. [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
  736. [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
  737. [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
  738. };
  739. if (bus_width <= MMC_BUS_WIDTH_8)
  740. err = rtsx_usb_write_register(host->ucr, SD_CFG1,
  741. 0x03, width[bus_width]);
  742. return err;
  743. }
  744. static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
  745. {
  746. rtsx_usb_init_cmd(ucr);
  747. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
  748. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  749. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  750. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  751. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  752. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  753. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  754. }
  755. static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
  756. {
  757. rtsx_usb_init_cmd(ucr);
  758. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
  759. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  760. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  761. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  762. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
  763. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
  764. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  765. }
  766. static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
  767. {
  768. rtsx_usb_init_cmd(ucr);
  769. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
  770. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
  771. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
  772. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  773. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  774. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  775. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  776. }
  777. static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
  778. {
  779. rtsx_usb_init_cmd(ucr);
  780. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
  781. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
  782. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
  783. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
  784. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
  785. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
  786. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  787. }
  788. static int sd_power_on(struct rtsx_usb_sdmmc *host)
  789. {
  790. struct rtsx_ucr *ucr = host->ucr;
  791. int err;
  792. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  793. rtsx_usb_init_cmd(ucr);
  794. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
  795. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
  796. CARD_SHARE_MASK, CARD_SHARE_SD);
  797. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
  798. SD_CLK_EN, SD_CLK_EN);
  799. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  800. if (err)
  801. return err;
  802. if (CHECK_PKG(ucr, LQFP48))
  803. err = sd_pull_ctl_enable_lqfp48(ucr);
  804. else
  805. err = sd_pull_ctl_enable_qfn24(ucr);
  806. if (err)
  807. return err;
  808. err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
  809. POWER_MASK, PARTIAL_POWER_ON);
  810. if (err)
  811. return err;
  812. usleep_range(800, 1000);
  813. rtsx_usb_init_cmd(ucr);
  814. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  815. POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
  816. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
  817. SD_OUTPUT_EN, SD_OUTPUT_EN);
  818. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  819. }
  820. static int sd_power_off(struct rtsx_usb_sdmmc *host)
  821. {
  822. struct rtsx_ucr *ucr = host->ucr;
  823. int err;
  824. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  825. rtsx_usb_init_cmd(ucr);
  826. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
  827. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
  828. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  829. POWER_MASK, POWER_OFF);
  830. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  831. POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
  832. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  833. if (err)
  834. return err;
  835. if (CHECK_PKG(ucr, LQFP48))
  836. return sd_pull_ctl_disable_lqfp48(ucr);
  837. return sd_pull_ctl_disable_qfn24(ucr);
  838. }
  839. static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
  840. unsigned char power_mode)
  841. {
  842. int err;
  843. if (power_mode != MMC_POWER_OFF)
  844. power_mode = MMC_POWER_ON;
  845. if (power_mode == host->power_mode)
  846. return 0;
  847. if (power_mode == MMC_POWER_OFF) {
  848. err = sd_power_off(host);
  849. pm_runtime_put_noidle(sdmmc_dev(host));
  850. } else {
  851. pm_runtime_get_noresume(sdmmc_dev(host));
  852. err = sd_power_on(host);
  853. }
  854. if (!err)
  855. host->power_mode = power_mode;
  856. return err;
  857. }
  858. static int sd_set_timing(struct rtsx_usb_sdmmc *host,
  859. unsigned char timing, bool *ddr_mode)
  860. {
  861. struct rtsx_ucr *ucr = host->ucr;
  862. *ddr_mode = false;
  863. rtsx_usb_init_cmd(ucr);
  864. switch (timing) {
  865. case MMC_TIMING_UHS_SDR104:
  866. case MMC_TIMING_UHS_SDR50:
  867. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  868. 0x0C | SD_ASYNC_FIFO_RST,
  869. SD_30_MODE | SD_ASYNC_FIFO_RST);
  870. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  871. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  872. break;
  873. case MMC_TIMING_UHS_DDR50:
  874. *ddr_mode = true;
  875. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  876. 0x0C | SD_ASYNC_FIFO_RST,
  877. SD_DDR_MODE | SD_ASYNC_FIFO_RST);
  878. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  879. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  880. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  881. DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
  882. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  883. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
  884. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
  885. break;
  886. case MMC_TIMING_MMC_HS:
  887. case MMC_TIMING_SD_HS:
  888. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  889. 0x0C, SD_20_MODE);
  890. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  891. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  892. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  893. SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
  894. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  895. SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
  896. break;
  897. default:
  898. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  899. SD_CFG1, 0x0C, SD_20_MODE);
  900. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  901. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  902. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  903. SD_PUSH_POINT_CTL, 0xFF, 0);
  904. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  905. SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
  906. break;
  907. }
  908. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  909. }
  910. static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  911. {
  912. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  913. struct rtsx_ucr *ucr = host->ucr;
  914. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  915. mutex_lock(&ucr->dev_mutex);
  916. sd_set_power_mode(host, ios->power_mode);
  917. sd_set_bus_width(host, ios->bus_width);
  918. sd_set_timing(host, ios->timing, &host->ddr_mode);
  919. host->vpclk = false;
  920. host->double_clk = true;
  921. switch (ios->timing) {
  922. case MMC_TIMING_UHS_SDR104:
  923. case MMC_TIMING_UHS_SDR50:
  924. host->ssc_depth = SSC_DEPTH_2M;
  925. host->vpclk = true;
  926. host->double_clk = false;
  927. break;
  928. case MMC_TIMING_UHS_DDR50:
  929. case MMC_TIMING_UHS_SDR25:
  930. host->ssc_depth = SSC_DEPTH_1M;
  931. break;
  932. default:
  933. host->ssc_depth = SSC_DEPTH_512K;
  934. break;
  935. }
  936. host->initial_mode = (ios->clock <= 1000000) ? true : false;
  937. host->clock = ios->clock;
  938. rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
  939. host->initial_mode, host->double_clk, host->vpclk);
  940. mutex_unlock(&ucr->dev_mutex);
  941. dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
  942. }
  943. static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
  944. {
  945. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  946. struct rtsx_ucr *ucr = host->ucr;
  947. int err = 0;
  948. dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
  949. __func__, ios->signal_voltage);
  950. if (host->host_removal)
  951. return -ENOMEDIUM;
  952. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
  953. return -EPERM;
  954. mutex_lock(&ucr->dev_mutex);
  955. err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
  956. if (err) {
  957. mutex_unlock(&ucr->dev_mutex);
  958. return err;
  959. }
  960. /* Let mmc core do the busy checking, simply stop the forced-toggle
  961. * clock(while issuing CMD11) and switch voltage.
  962. */
  963. rtsx_usb_init_cmd(ucr);
  964. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
  965. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  966. SD_IO_USING_1V8, SD_IO_USING_3V3);
  967. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  968. TUNE_SD18_MASK, TUNE_SD18_3V3);
  969. } else {
  970. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
  971. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  972. SD_CLK_FORCE_STOP);
  973. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  974. SD_IO_USING_1V8, SD_IO_USING_1V8);
  975. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  976. TUNE_SD18_MASK, TUNE_SD18_1V8);
  977. }
  978. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  979. mutex_unlock(&ucr->dev_mutex);
  980. return err;
  981. }
  982. static int sdmmc_card_busy(struct mmc_host *mmc)
  983. {
  984. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  985. struct rtsx_ucr *ucr = host->ucr;
  986. int err;
  987. u8 stat;
  988. u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
  989. | SD_DAT0_STATUS;
  990. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  991. mutex_lock(&ucr->dev_mutex);
  992. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  993. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  994. SD_CLK_TOGGLE_EN);
  995. if (err)
  996. goto out;
  997. mdelay(1);
  998. err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
  999. if (err)
  1000. goto out;
  1001. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1002. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
  1003. out:
  1004. mutex_unlock(&ucr->dev_mutex);
  1005. if (err)
  1006. return err;
  1007. /* check if any pin between dat[0:3] is low */
  1008. if ((stat & mask) != mask)
  1009. return 1;
  1010. else
  1011. return 0;
  1012. }
  1013. static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
  1014. {
  1015. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1016. struct rtsx_ucr *ucr = host->ucr;
  1017. int err = 0;
  1018. if (host->host_removal)
  1019. return -ENOMEDIUM;
  1020. mutex_lock(&ucr->dev_mutex);
  1021. if (!host->ddr_mode)
  1022. err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
  1023. mutex_unlock(&ucr->dev_mutex);
  1024. return err;
  1025. }
  1026. static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
  1027. .request = sdmmc_request,
  1028. .set_ios = sdmmc_set_ios,
  1029. .get_ro = sdmmc_get_ro,
  1030. .get_cd = sdmmc_get_cd,
  1031. .start_signal_voltage_switch = sdmmc_switch_voltage,
  1032. .card_busy = sdmmc_card_busy,
  1033. .execute_tuning = sdmmc_execute_tuning,
  1034. };
  1035. #ifdef RTSX_USB_USE_LEDS_CLASS
  1036. static void rtsx_usb_led_control(struct led_classdev *led,
  1037. enum led_brightness brightness)
  1038. {
  1039. struct rtsx_usb_sdmmc *host = container_of(led,
  1040. struct rtsx_usb_sdmmc, led);
  1041. if (host->host_removal)
  1042. return;
  1043. host->led.brightness = brightness;
  1044. schedule_work(&host->led_work);
  1045. }
  1046. static void rtsx_usb_update_led(struct work_struct *work)
  1047. {
  1048. struct rtsx_usb_sdmmc *host =
  1049. container_of(work, struct rtsx_usb_sdmmc, led_work);
  1050. struct rtsx_ucr *ucr = host->ucr;
  1051. pm_runtime_get_noresume(sdmmc_dev(host));
  1052. mutex_lock(&ucr->dev_mutex);
  1053. if (host->power_mode == MMC_POWER_OFF)
  1054. goto out;
  1055. if (host->led.brightness == LED_OFF)
  1056. rtsx_usb_turn_off_led(ucr);
  1057. else
  1058. rtsx_usb_turn_on_led(ucr);
  1059. out:
  1060. mutex_unlock(&ucr->dev_mutex);
  1061. pm_runtime_put_sync_suspend(sdmmc_dev(host));
  1062. }
  1063. #endif
  1064. static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
  1065. {
  1066. struct mmc_host *mmc = host->mmc;
  1067. mmc->f_min = 250000;
  1068. mmc->f_max = 208000000;
  1069. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  1070. mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
  1071. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
  1072. MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
  1073. MMC_CAP_SYNC_RUNTIME_PM;
  1074. mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
  1075. MMC_CAP2_NO_SDIO;
  1076. mmc->max_current_330 = 400;
  1077. mmc->max_current_180 = 800;
  1078. mmc->ops = &rtsx_usb_sdmmc_ops;
  1079. mmc->max_segs = 256;
  1080. mmc->max_seg_size = 65536;
  1081. mmc->max_blk_size = 512;
  1082. mmc->max_blk_count = 65535;
  1083. mmc->max_req_size = 524288;
  1084. host->power_mode = MMC_POWER_OFF;
  1085. }
  1086. static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
  1087. {
  1088. struct mmc_host *mmc;
  1089. struct rtsx_usb_sdmmc *host;
  1090. struct rtsx_ucr *ucr;
  1091. #ifdef RTSX_USB_USE_LEDS_CLASS
  1092. int err;
  1093. #endif
  1094. int ret;
  1095. ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
  1096. if (!ucr)
  1097. return -ENXIO;
  1098. dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
  1099. mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
  1100. if (!mmc)
  1101. return -ENOMEM;
  1102. host = mmc_priv(mmc);
  1103. host->ucr = ucr;
  1104. host->mmc = mmc;
  1105. host->pdev = pdev;
  1106. platform_set_drvdata(pdev, host);
  1107. mutex_init(&host->host_mutex);
  1108. rtsx_usb_init_host(host);
  1109. pm_runtime_enable(&pdev->dev);
  1110. #ifdef RTSX_USB_USE_LEDS_CLASS
  1111. snprintf(host->led_name, sizeof(host->led_name),
  1112. "%s::", mmc_hostname(mmc));
  1113. host->led.name = host->led_name;
  1114. host->led.brightness = LED_OFF;
  1115. host->led.default_trigger = mmc_hostname(mmc);
  1116. host->led.brightness_set = rtsx_usb_led_control;
  1117. err = led_classdev_register(mmc_dev(mmc), &host->led);
  1118. if (err)
  1119. dev_err(&(pdev->dev),
  1120. "Failed to register LED device: %d\n", err);
  1121. INIT_WORK(&host->led_work, rtsx_usb_update_led);
  1122. #endif
  1123. ret = mmc_add_host(mmc);
  1124. if (ret) {
  1125. #ifdef RTSX_USB_USE_LEDS_CLASS
  1126. led_classdev_unregister(&host->led);
  1127. #endif
  1128. mmc_free_host(mmc);
  1129. pm_runtime_disable(&pdev->dev);
  1130. return ret;
  1131. }
  1132. return 0;
  1133. }
  1134. static void rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
  1135. {
  1136. struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
  1137. struct mmc_host *mmc;
  1138. if (!host)
  1139. return;
  1140. mmc = host->mmc;
  1141. host->host_removal = true;
  1142. mutex_lock(&host->host_mutex);
  1143. if (host->mrq) {
  1144. dev_dbg(&(pdev->dev),
  1145. "%s: Controller removed during transfer\n",
  1146. mmc_hostname(mmc));
  1147. host->mrq->cmd->error = -ENOMEDIUM;
  1148. if (host->mrq->stop)
  1149. host->mrq->stop->error = -ENOMEDIUM;
  1150. mmc_request_done(mmc, host->mrq);
  1151. }
  1152. mutex_unlock(&host->host_mutex);
  1153. mmc_remove_host(mmc);
  1154. #ifdef RTSX_USB_USE_LEDS_CLASS
  1155. cancel_work_sync(&host->led_work);
  1156. led_classdev_unregister(&host->led);
  1157. #endif
  1158. mmc_free_host(mmc);
  1159. pm_runtime_disable(&pdev->dev);
  1160. platform_set_drvdata(pdev, NULL);
  1161. dev_dbg(&(pdev->dev),
  1162. ": Realtek USB SD/MMC module has been removed\n");
  1163. }
  1164. #ifdef CONFIG_PM
  1165. static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev)
  1166. {
  1167. struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
  1168. host->mmc->caps &= ~MMC_CAP_NEEDS_POLL;
  1169. return 0;
  1170. }
  1171. static int rtsx_usb_sdmmc_runtime_resume(struct device *dev)
  1172. {
  1173. struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
  1174. host->mmc->caps |= MMC_CAP_NEEDS_POLL;
  1175. if (sdmmc_get_cd(host->mmc) == 1)
  1176. mmc_detect_change(host->mmc, 0);
  1177. return 0;
  1178. }
  1179. #endif
  1180. static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = {
  1181. SET_RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend,
  1182. rtsx_usb_sdmmc_runtime_resume, NULL)
  1183. };
  1184. static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
  1185. {
  1186. .name = "rtsx_usb_sdmmc",
  1187. }, {
  1188. /* sentinel */
  1189. }
  1190. };
  1191. MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
  1192. static struct platform_driver rtsx_usb_sdmmc_driver = {
  1193. .probe = rtsx_usb_sdmmc_drv_probe,
  1194. .remove_new = rtsx_usb_sdmmc_drv_remove,
  1195. .id_table = rtsx_usb_sdmmc_ids,
  1196. .driver = {
  1197. .name = "rtsx_usb_sdmmc",
  1198. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  1199. .pm = &rtsx_usb_sdmmc_dev_pm_ops,
  1200. },
  1201. };
  1202. module_platform_driver(rtsx_usb_sdmmc_driver);
  1203. MODULE_LICENSE("GPL v2");
  1204. MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
  1205. MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");