pmc551.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PMC551 PCI Mezzanine Ram Device
  4. *
  5. * Author:
  6. * Mark Ferrell <mferrell@mvista.com>
  7. * Copyright 1999,2000 Nortel Networks
  8. *
  9. * Description:
  10. * This driver is intended to support the PMC551 PCI Ram device
  11. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  12. * cPCI embedded systems. The device contains a single SROM
  13. * that initially programs the V370PDC chipset onboard the
  14. * device, and various banks of DRAM/SDRAM onboard. This driver
  15. * implements this PCI Ram device as an MTD (Memory Technology
  16. * Device) so that it can be used to hold a file system, or for
  17. * added swap space in embedded systems. Since the memory on
  18. * this board isn't as fast as main memory we do not try to hook
  19. * it into main memory as that would simply reduce performance
  20. * on the system. Using it as a block device allows us to use
  21. * it as high speed swap or for a high speed disk device of some
  22. * sort. Which becomes very useful on diskless systems in the
  23. * embedded market I might add.
  24. *
  25. * Notes:
  26. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  27. * have available claims that all 4 of its DRAM banks have 64MiB
  28. * of ram configured (making a grand total of 256MiB onboard).
  29. * This is slightly annoying since the BAR0 size reflects the
  30. * aperture size, not the dram size, and the V370PDC supplies no
  31. * other method for memory size discovery. This problem is
  32. * mostly only relevant when compiled as a module, as the
  33. * unloading of the module with an aperture size smaller than
  34. * the ram will cause the driver to detect the onboard memory
  35. * size to be equal to the aperture size when the module is
  36. * reloaded. Soooo, to help, the module supports an msize
  37. * option to allow the specification of the onboard memory, and
  38. * an asize option, to allow the specification of the aperture
  39. * size. The aperture must be equal to or less then the memory
  40. * size, the driver will correct this if you screw it up. This
  41. * problem is not relevant for compiled in drivers as compiled
  42. * in drivers only init once.
  43. *
  44. * Credits:
  45. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  46. * initial example code of how to initialize this device and for
  47. * help with questions I had concerning operation of the device.
  48. *
  49. * Most of the MTD code for this driver was originally written
  50. * for the slram.o module in the MTD drivers package which
  51. * allows the mapping of system memory into an MTD device.
  52. * Since the PMC551 memory module is accessed in the same
  53. * fashion as system memory, the slram.c code became a very nice
  54. * fit to the needs of this driver. All we added was PCI
  55. * detection/initialization to the driver and automatically figure
  56. * out the size via the PCI detection.o, later changes by Corey
  57. * Minyard set up the card to utilize a 1M sliding apature.
  58. *
  59. * Corey Minyard <minyard@nortelnetworks.com>
  60. * * Modified driver to utilize a sliding aperture instead of
  61. * mapping all memory into kernel space which turned out to
  62. * be very wasteful.
  63. * * Located a bug in the SROM's initialization sequence that
  64. * made the memory unusable, added a fix to code to touch up
  65. * the DRAM some.
  66. *
  67. * Bugs/FIXMEs:
  68. * * MUST fix the init function to not spin on a register
  69. * waiting for it to set .. this does not safely handle busted
  70. * devices that never reset the register correctly which will
  71. * cause the system to hang w/ a reboot being the only chance at
  72. * recover. [sort of fixed, could be better]
  73. * * Add I2C handling of the SROM so we can read the SROM's information
  74. * about the aperture size. This should always accurately reflect the
  75. * onboard memory size.
  76. * * Comb the init routine. It's still a bit cludgy on a few things.
  77. */
  78. #include <linux/kernel.h>
  79. #include <linux/module.h>
  80. #include <linux/uaccess.h>
  81. #include <linux/types.h>
  82. #include <linux/init.h>
  83. #include <linux/ptrace.h>
  84. #include <linux/slab.h>
  85. #include <linux/string.h>
  86. #include <linux/timer.h>
  87. #include <linux/major.h>
  88. #include <linux/fs.h>
  89. #include <linux/ioctl.h>
  90. #include <asm/io.h>
  91. #include <linux/pci.h>
  92. #include <linux/mtd/mtd.h>
  93. #define PMC551_VERSION \
  94. "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
  95. #define PCI_VENDOR_ID_V3_SEMI 0x11b0
  96. #define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
  97. #define PMC551_PCI_MEM_MAP0 0x50
  98. #define PMC551_PCI_MEM_MAP1 0x54
  99. #define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
  100. #define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
  101. #define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
  102. #define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
  103. #define PMC551_SDRAM_MA 0x60
  104. #define PMC551_SDRAM_CMD 0x62
  105. #define PMC551_DRAM_CFG 0x64
  106. #define PMC551_SYS_CTRL_REG 0x78
  107. #define PMC551_DRAM_BLK0 0x68
  108. #define PMC551_DRAM_BLK1 0x6c
  109. #define PMC551_DRAM_BLK2 0x70
  110. #define PMC551_DRAM_BLK3 0x74
  111. #define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
  112. #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
  113. #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
  114. struct mypriv {
  115. struct pci_dev *dev;
  116. u_char *start;
  117. u32 base_map0;
  118. u32 curr_map0;
  119. u32 asize;
  120. struct mtd_info *nextpmc551;
  121. };
  122. static struct mtd_info *pmc551list;
  123. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  124. size_t *retlen, void **virt, resource_size_t *phys);
  125. static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
  126. {
  127. struct mypriv *priv = mtd->priv;
  128. u32 soff_hi; /* start address offset hi */
  129. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  130. unsigned long end;
  131. u_char *ptr;
  132. size_t retlen;
  133. #ifdef CONFIG_MTD_PMC551_DEBUG
  134. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
  135. (long)instr->len);
  136. #endif
  137. end = instr->addr + instr->len - 1;
  138. eoff_hi = end & ~(priv->asize - 1);
  139. soff_hi = instr->addr & ~(priv->asize - 1);
  140. eoff_lo = end & (priv->asize - 1);
  141. pmc551_point(mtd, instr->addr, instr->len, &retlen,
  142. (void **)&ptr, NULL);
  143. if (soff_hi == eoff_hi || mtd->size == priv->asize) {
  144. /* The whole thing fits within one access, so just one shot
  145. will do it. */
  146. memset(ptr, 0xff, instr->len);
  147. } else {
  148. /* We have to do multiple writes to get all the data
  149. written. */
  150. while (soff_hi != eoff_hi) {
  151. #ifdef CONFIG_MTD_PMC551_DEBUG
  152. printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
  153. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  154. #endif
  155. memset(ptr, 0xff, priv->asize);
  156. if (soff_hi + priv->asize >= mtd->size) {
  157. goto out;
  158. }
  159. soff_hi += priv->asize;
  160. pmc551_point(mtd, (priv->base_map0 | soff_hi),
  161. priv->asize, &retlen,
  162. (void **)&ptr, NULL);
  163. }
  164. memset(ptr, 0xff, eoff_lo);
  165. }
  166. out:
  167. #ifdef CONFIG_MTD_PMC551_DEBUG
  168. printk(KERN_DEBUG "pmc551_erase() done\n");
  169. #endif
  170. return 0;
  171. }
  172. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  173. size_t *retlen, void **virt, resource_size_t *phys)
  174. {
  175. struct mypriv *priv = mtd->priv;
  176. u32 soff_hi;
  177. u32 soff_lo;
  178. #ifdef CONFIG_MTD_PMC551_DEBUG
  179. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  180. #endif
  181. soff_hi = from & ~(priv->asize - 1);
  182. soff_lo = from & (priv->asize - 1);
  183. /* Cheap hack optimization */
  184. if (priv->curr_map0 != from) {
  185. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  186. (priv->base_map0 | soff_hi));
  187. priv->curr_map0 = soff_hi;
  188. }
  189. *virt = priv->start + soff_lo;
  190. *retlen = len;
  191. return 0;
  192. }
  193. static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
  194. {
  195. #ifdef CONFIG_MTD_PMC551_DEBUG
  196. printk(KERN_DEBUG "pmc551_unpoint()\n");
  197. #endif
  198. return 0;
  199. }
  200. static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
  201. size_t * retlen, u_char * buf)
  202. {
  203. struct mypriv *priv = mtd->priv;
  204. u32 soff_hi; /* start address offset hi */
  205. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  206. unsigned long end;
  207. u_char *ptr;
  208. u_char *copyto = buf;
  209. #ifdef CONFIG_MTD_PMC551_DEBUG
  210. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
  211. (long)from, (long)len, (long)priv->asize);
  212. #endif
  213. end = from + len - 1;
  214. soff_hi = from & ~(priv->asize - 1);
  215. eoff_hi = end & ~(priv->asize - 1);
  216. eoff_lo = end & (priv->asize - 1);
  217. pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
  218. if (soff_hi == eoff_hi) {
  219. /* The whole thing fits within one access, so just one shot
  220. will do it. */
  221. memcpy(copyto, ptr, len);
  222. copyto += len;
  223. } else {
  224. /* We have to do multiple writes to get all the data
  225. written. */
  226. while (soff_hi != eoff_hi) {
  227. #ifdef CONFIG_MTD_PMC551_DEBUG
  228. printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
  229. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  230. #endif
  231. memcpy(copyto, ptr, priv->asize);
  232. copyto += priv->asize;
  233. if (soff_hi + priv->asize >= mtd->size) {
  234. goto out;
  235. }
  236. soff_hi += priv->asize;
  237. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  238. (void **)&ptr, NULL);
  239. }
  240. memcpy(copyto, ptr, eoff_lo);
  241. copyto += eoff_lo;
  242. }
  243. out:
  244. #ifdef CONFIG_MTD_PMC551_DEBUG
  245. printk(KERN_DEBUG "pmc551_read() done\n");
  246. #endif
  247. *retlen = copyto - buf;
  248. return 0;
  249. }
  250. static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
  251. size_t * retlen, const u_char * buf)
  252. {
  253. struct mypriv *priv = mtd->priv;
  254. u32 soff_hi; /* start address offset hi */
  255. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  256. unsigned long end;
  257. u_char *ptr;
  258. const u_char *copyfrom = buf;
  259. #ifdef CONFIG_MTD_PMC551_DEBUG
  260. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
  261. (long)to, (long)len, (long)priv->asize);
  262. #endif
  263. end = to + len - 1;
  264. soff_hi = to & ~(priv->asize - 1);
  265. eoff_hi = end & ~(priv->asize - 1);
  266. eoff_lo = end & (priv->asize - 1);
  267. pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
  268. if (soff_hi == eoff_hi) {
  269. /* The whole thing fits within one access, so just one shot
  270. will do it. */
  271. memcpy(ptr, copyfrom, len);
  272. copyfrom += len;
  273. } else {
  274. /* We have to do multiple writes to get all the data
  275. written. */
  276. while (soff_hi != eoff_hi) {
  277. #ifdef CONFIG_MTD_PMC551_DEBUG
  278. printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
  279. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  280. #endif
  281. memcpy(ptr, copyfrom, priv->asize);
  282. copyfrom += priv->asize;
  283. if (soff_hi >= mtd->size) {
  284. goto out;
  285. }
  286. soff_hi += priv->asize;
  287. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  288. (void **)&ptr, NULL);
  289. }
  290. memcpy(ptr, copyfrom, eoff_lo);
  291. copyfrom += eoff_lo;
  292. }
  293. out:
  294. #ifdef CONFIG_MTD_PMC551_DEBUG
  295. printk(KERN_DEBUG "pmc551_write() done\n");
  296. #endif
  297. *retlen = copyfrom - buf;
  298. return 0;
  299. }
  300. /*
  301. * Fixup routines for the V370PDC
  302. * PCI device ID 0x020011b0
  303. *
  304. * This function basically kick starts the DRAM oboard the card and gets it
  305. * ready to be used. Before this is done the device reads VERY erratic, so
  306. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  307. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  308. * register. FIXME: stop spinning on registers .. must implement a timeout
  309. * mechanism
  310. * returns the size of the memory region found.
  311. */
  312. static int __init fixup_pmc551(struct pci_dev *dev)
  313. {
  314. #ifdef CONFIG_MTD_PMC551_BUGFIX
  315. u32 dram_data;
  316. #endif
  317. u32 size, dcmd, cfg, dtmp;
  318. u16 cmd, tmp, i;
  319. u8 bcmd, counter;
  320. /* Sanity Check */
  321. if (!dev) {
  322. return -ENODEV;
  323. }
  324. /*
  325. * Attempt to reset the card
  326. * FIXME: Stop Spinning registers
  327. */
  328. counter = 0;
  329. /* unlock registers */
  330. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
  331. /* read in old data */
  332. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  333. /* bang the reset line up and down for a few */
  334. for (i = 0; i < 10; i++) {
  335. counter = 0;
  336. bcmd &= ~0x80;
  337. while (counter++ < 100) {
  338. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  339. }
  340. counter = 0;
  341. bcmd |= 0x80;
  342. while (counter++ < 100) {
  343. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  344. }
  345. }
  346. bcmd |= (0x40 | 0x20);
  347. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  348. /*
  349. * Take care and turn off the memory on the device while we
  350. * tweak the configurations
  351. */
  352. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  353. tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  354. pci_write_config_word(dev, PCI_COMMAND, tmp);
  355. /*
  356. * Disable existing aperture before probing memory size
  357. */
  358. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  359. dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
  360. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  361. /*
  362. * Grab old BAR0 config so that we can figure out memory size
  363. * This is another bit of kludge going on. The reason for the
  364. * redundancy is I am hoping to retain the original configuration
  365. * previously assigned to the card by the BIOS or some previous
  366. * fixup routine in the kernel. So we read the old config into cfg,
  367. * then write all 1's to the memory space, read back the result into
  368. * "size", and then write back all the old config.
  369. */
  370. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
  371. #ifndef CONFIG_MTD_PMC551_BUGFIX
  372. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
  373. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
  374. size = (size & PCI_BASE_ADDRESS_MEM_MASK);
  375. size &= ~(size - 1);
  376. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
  377. #else
  378. /*
  379. * Get the size of the memory by reading all the DRAM size values
  380. * and adding them up.
  381. *
  382. * KLUDGE ALERT: the boards we are using have invalid column and
  383. * row mux values. We fix them here, but this will break other
  384. * memory configurations.
  385. */
  386. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  387. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  388. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  389. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  390. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  391. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  392. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  393. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  394. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  395. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  396. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  397. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  398. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  399. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  400. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  401. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  402. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  403. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  404. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  405. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  406. /*
  407. * Oops .. something went wrong
  408. */
  409. if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  410. return -ENODEV;
  411. }
  412. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  413. if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  414. return -ENODEV;
  415. }
  416. /*
  417. * Precharge Dram
  418. */
  419. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
  420. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
  421. /*
  422. * Wait until command has gone through
  423. * FIXME: register spinning issue
  424. */
  425. do {
  426. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  427. if (counter++ > 100)
  428. break;
  429. } while ((PCI_COMMAND_IO) & cmd);
  430. /*
  431. * Turn on auto refresh
  432. * The loop is taken directly from Ramix's example code. I assume that
  433. * this must be held high for some duration of time, but I can find no
  434. * documentation refrencing the reasons why.
  435. */
  436. for (i = 1; i <= 8; i++) {
  437. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
  438. /*
  439. * Make certain command has gone through
  440. * FIXME: register spinning issue
  441. */
  442. counter = 0;
  443. do {
  444. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  445. if (counter++ > 100)
  446. break;
  447. } while ((PCI_COMMAND_IO) & cmd);
  448. }
  449. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
  450. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
  451. /*
  452. * Wait until command completes
  453. * FIXME: register spinning issue
  454. */
  455. counter = 0;
  456. do {
  457. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  458. if (counter++ > 100)
  459. break;
  460. } while ((PCI_COMMAND_IO) & cmd);
  461. pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
  462. dcmd |= 0x02000000;
  463. pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
  464. /*
  465. * Check to make certain fast back-to-back, if not
  466. * then set it so
  467. */
  468. pci_read_config_word(dev, PCI_STATUS, &cmd);
  469. if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
  470. cmd |= PCI_COMMAND_FAST_BACK;
  471. pci_write_config_word(dev, PCI_STATUS, cmd);
  472. }
  473. /*
  474. * Check to make certain the DEVSEL is set correctly, this device
  475. * has a tendency to assert DEVSEL and TRDY when a write is performed
  476. * to the memory when memory is read-only
  477. */
  478. if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
  479. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  480. pci_write_config_word(dev, PCI_STATUS, cmd);
  481. }
  482. /*
  483. * Set to be prefetchable and put everything back based on old cfg.
  484. * it's possible that the reset of the V370PDC nuked the original
  485. * setup
  486. */
  487. /*
  488. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  489. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  490. */
  491. /*
  492. * Turn PCI memory and I/O bus access back on
  493. */
  494. pci_write_config_word(dev, PCI_COMMAND,
  495. PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
  496. #ifdef CONFIG_MTD_PMC551_DEBUG
  497. /*
  498. * Some screen fun
  499. */
  500. printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
  501. "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
  502. size >> 10 : size >> 20,
  503. (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
  504. ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
  505. (unsigned long long)pci_resource_start(dev, 0));
  506. /*
  507. * Check to see the state of the memory
  508. */
  509. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
  510. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  511. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  512. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  513. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  514. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  515. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  516. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  517. ((dcmd >> 9) & 0xF));
  518. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
  519. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  520. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  521. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  522. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  523. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  524. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  525. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  526. ((dcmd >> 9) & 0xF));
  527. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
  528. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  529. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  530. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  531. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  532. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  533. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  534. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  535. ((dcmd >> 9) & 0xF));
  536. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
  537. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  538. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  539. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  540. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  541. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  542. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  543. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  544. ((dcmd >> 9) & 0xF));
  545. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  546. printk(KERN_DEBUG "pmc551: Memory Access %s\n",
  547. (((0x1 << 1) & cmd) == 0) ? "off" : "on");
  548. printk(KERN_DEBUG "pmc551: I/O Access %s\n",
  549. (((0x1 << 0) & cmd) == 0) ? "off" : "on");
  550. pci_read_config_word(dev, PCI_STATUS, &cmd);
  551. printk(KERN_DEBUG "pmc551: Devsel %s\n",
  552. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
  553. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
  554. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
  555. printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  556. ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
  557. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  558. printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  559. "pmc551: System Control Register is %slocked to PCI access\n"
  560. "pmc551: System Control Register is %slocked to EEPROM access\n",
  561. (bcmd & 0x1) ? "software" : "hardware",
  562. (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
  563. #endif
  564. return size;
  565. }
  566. /*
  567. * Kernel version specific module stuffages
  568. */
  569. MODULE_LICENSE("GPL");
  570. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  571. MODULE_DESCRIPTION(PMC551_VERSION);
  572. /*
  573. * Stuff these outside the ifdef so as to not bust compiled in driver support
  574. */
  575. static int msize = 0;
  576. static int asize = 0;
  577. module_param(msize, int, 0);
  578. MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
  579. module_param(asize, int, 0);
  580. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  581. /*
  582. * PMC551 Card Initialization
  583. */
  584. static int __init init_pmc551(void)
  585. {
  586. struct pci_dev *PCI_Device = NULL;
  587. struct mypriv *priv;
  588. int found = 0;
  589. struct mtd_info *mtd;
  590. int length = 0;
  591. if (msize) {
  592. msize = (1 << (ffs(msize) - 1)) << 20;
  593. if (msize > (1 << 30)) {
  594. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
  595. msize);
  596. return -EINVAL;
  597. }
  598. }
  599. if (asize) {
  600. asize = (1 << (ffs(asize) - 1)) << 20;
  601. if (asize > (1 << 30)) {
  602. printk(KERN_NOTICE "pmc551: Invalid aperture size "
  603. "[%d]\n", asize);
  604. return -EINVAL;
  605. }
  606. }
  607. printk(KERN_INFO PMC551_VERSION);
  608. /*
  609. * PCU-bus chipset probe.
  610. */
  611. for (;;) {
  612. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  613. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  614. PCI_Device)) == NULL) {
  615. break;
  616. }
  617. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  618. (unsigned long long)pci_resource_start(PCI_Device, 0));
  619. /*
  620. * The PMC551 device acts VERY weird if you don't init it
  621. * first. i.e. it will not correctly report devsel. If for
  622. * some reason the sdram is in a wrote-protected state the
  623. * device will DEVSEL when it is written to causing problems
  624. * with the oldproc.c driver in
  625. * some kernels (2.2.*)
  626. */
  627. if ((length = fixup_pmc551(PCI_Device)) <= 0) {
  628. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  629. break;
  630. }
  631. /*
  632. * This is needed until the driver is capable of reading the
  633. * onboard I2C SROM to discover the "real" memory size.
  634. */
  635. if (msize) {
  636. length = msize;
  637. printk(KERN_NOTICE "pmc551: Using specified memory "
  638. "size 0x%x\n", length);
  639. } else {
  640. msize = length;
  641. }
  642. mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
  643. if (!mtd)
  644. break;
  645. priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
  646. if (!priv) {
  647. kfree(mtd);
  648. break;
  649. }
  650. mtd->priv = priv;
  651. priv->dev = PCI_Device;
  652. if (asize > length) {
  653. printk(KERN_NOTICE "pmc551: reducing aperture size to "
  654. "fit %dM\n", length >> 20);
  655. priv->asize = asize = length;
  656. } else if (asize == 0 || asize == length) {
  657. printk(KERN_NOTICE "pmc551: Using existing aperture "
  658. "size %dM\n", length >> 20);
  659. priv->asize = asize = length;
  660. } else {
  661. printk(KERN_NOTICE "pmc551: Using specified aperture "
  662. "size %dM\n", asize >> 20);
  663. priv->asize = asize;
  664. }
  665. priv->start = pci_iomap(PCI_Device, 0, priv->asize);
  666. if (!priv->start) {
  667. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  668. kfree(mtd->priv);
  669. kfree(mtd);
  670. break;
  671. }
  672. #ifdef CONFIG_MTD_PMC551_DEBUG
  673. printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
  674. ffs(priv->asize >> 20) - 1);
  675. #endif
  676. priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
  677. | PMC551_PCI_MEM_MAP_ENABLE
  678. | (ffs(priv->asize >> 20) - 1) << 4);
  679. priv->curr_map0 = priv->base_map0;
  680. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  681. priv->curr_map0);
  682. #ifdef CONFIG_MTD_PMC551_DEBUG
  683. printk(KERN_DEBUG "pmc551: aperture set to %d\n",
  684. (priv->base_map0 & 0xF0) >> 4);
  685. #endif
  686. mtd->size = msize;
  687. mtd->flags = MTD_CAP_RAM;
  688. mtd->_erase = pmc551_erase;
  689. mtd->_read = pmc551_read;
  690. mtd->_write = pmc551_write;
  691. mtd->_point = pmc551_point;
  692. mtd->_unpoint = pmc551_unpoint;
  693. mtd->type = MTD_RAM;
  694. mtd->name = "PMC551 RAM board";
  695. mtd->erasesize = 0x10000;
  696. mtd->writesize = 1;
  697. mtd->owner = THIS_MODULE;
  698. if (mtd_device_register(mtd, NULL, 0)) {
  699. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  700. pci_iounmap(PCI_Device, priv->start);
  701. kfree(mtd->priv);
  702. kfree(mtd);
  703. break;
  704. }
  705. /* Keep a reference as the mtd_device_register worked */
  706. pci_dev_get(PCI_Device);
  707. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  708. printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
  709. priv->asize >> 20,
  710. priv->start, priv->start + priv->asize);
  711. printk(KERN_NOTICE "Total memory is %d%sB\n",
  712. (length < 1024) ? length :
  713. (length < 1048576) ? length >> 10 : length >> 20,
  714. (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
  715. priv->nextpmc551 = pmc551list;
  716. pmc551list = mtd;
  717. found++;
  718. }
  719. /* Exited early, reference left over */
  720. pci_dev_put(PCI_Device);
  721. if (!pmc551list) {
  722. printk(KERN_NOTICE "pmc551: not detected\n");
  723. return -ENODEV;
  724. } else {
  725. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  726. return 0;
  727. }
  728. }
  729. /*
  730. * PMC551 Card Cleanup
  731. */
  732. static void __exit cleanup_pmc551(void)
  733. {
  734. int found = 0;
  735. struct mtd_info *mtd;
  736. struct mypriv *priv;
  737. while ((mtd = pmc551list)) {
  738. priv = mtd->priv;
  739. pmc551list = priv->nextpmc551;
  740. if (priv->start) {
  741. printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
  742. "0x%p\n", priv->asize >> 20, priv->start);
  743. pci_iounmap(priv->dev, priv->start);
  744. }
  745. pci_dev_put(priv->dev);
  746. kfree(mtd->priv);
  747. mtd_device_unregister(mtd);
  748. kfree(mtd);
  749. found++;
  750. }
  751. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  752. }
  753. module_init(init_pmc551);
  754. module_exit(cleanup_pmc551);