esmt.c 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Author:
  4. * Chuanhong Guo <gch981213@gmail.com> - the main driver logic
  5. * Martin Kurbanov <mmkurbanov@sberdevices.ru> - OOB layout
  6. */
  7. #include <linux/device.h>
  8. #include <linux/kernel.h>
  9. #include <linux/mtd/spinand.h>
  10. /* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
  11. #define SPINAND_MFR_ESMT_C8 0xc8
  12. static SPINAND_OP_VARIANTS(read_cache_variants,
  13. SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
  14. SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
  15. SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
  16. SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
  17. static SPINAND_OP_VARIANTS(write_cache_variants,
  18. SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
  19. SPINAND_PROG_LOAD(true, 0, NULL, 0));
  20. static SPINAND_OP_VARIANTS(update_cache_variants,
  21. SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
  22. SPINAND_PROG_LOAD(false, 0, NULL, 0));
  23. /*
  24. * OOB spare area map (64 bytes)
  25. *
  26. * Bad Block Markers
  27. * filled by HW and kernel Reserved
  28. * | +-----------------------+-----------------------+
  29. * | | | |
  30. * | | OOB free data Area |non ECC protected |
  31. * | +-------------|-----+-----------------|-----+-----------------|-----+
  32. * | | | | | | | |
  33. * +-|---|----------+--|-----|--------------+--|-----|--------------+--|-----|--------------+
  34. * | | | section0 | | | section1 | | | section2 | | | section3 |
  35. * +-v-+-v-+---+----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+
  36. * | | | | | | | | | | | | | | | | |
  37. * |0:1|2:3|4:7|8:15|16:17|18:19|20:23|24:31|32:33|34:35|36:39|40:47|48:49|50:51|52:55|56:63|
  38. * | | | | | | | | | | | | | | | | |
  39. * +---+---+-^-+--^-+-----+-----+--^--+--^--+-----+-----+--^--+--^--+-----+-----+--^--+--^--+
  40. * | | | | | | | |
  41. * | +----------------|-----+-----------------|-----+-----------------|-----+
  42. * | ECC Area|(Main + Spare) - filled|by ESMT NAND HW |
  43. * | | | |
  44. * +---------------------+-----------------------+-----------------------+
  45. * OOB ECC protected Area - not used due to
  46. * partial programming from some filesystems
  47. * (like JFFS2 with cleanmarkers)
  48. */
  49. #define ESMT_OOB_SECTION_COUNT 4
  50. #define ESMT_OOB_SECTION_SIZE(nand) \
  51. (nanddev_per_page_oobsize(nand) / ESMT_OOB_SECTION_COUNT)
  52. #define ESMT_OOB_FREE_SIZE(nand) \
  53. (ESMT_OOB_SECTION_SIZE(nand) / 2)
  54. #define ESMT_OOB_ECC_SIZE(nand) \
  55. (ESMT_OOB_SECTION_SIZE(nand) - ESMT_OOB_FREE_SIZE(nand))
  56. #define ESMT_OOB_BBM_SIZE 2
  57. static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
  58. struct mtd_oob_region *region)
  59. {
  60. struct nand_device *nand = mtd_to_nanddev(mtd);
  61. if (section >= ESMT_OOB_SECTION_COUNT)
  62. return -ERANGE;
  63. region->offset = section * ESMT_OOB_SECTION_SIZE(nand) +
  64. ESMT_OOB_FREE_SIZE(nand);
  65. region->length = ESMT_OOB_ECC_SIZE(nand);
  66. return 0;
  67. }
  68. static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
  69. struct mtd_oob_region *region)
  70. {
  71. struct nand_device *nand = mtd_to_nanddev(mtd);
  72. if (section >= ESMT_OOB_SECTION_COUNT)
  73. return -ERANGE;
  74. /*
  75. * Reserve space for bad blocks markers (section0) and
  76. * reserved bytes (sections 1-3)
  77. */
  78. region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + 2;
  79. /* Use only 2 non-protected ECC bytes per each OOB section */
  80. region->length = 2;
  81. return 0;
  82. }
  83. static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
  84. .ecc = f50l1g41lb_ooblayout_ecc,
  85. .free = f50l1g41lb_ooblayout_free,
  86. };
  87. static const struct spinand_info esmt_c8_spinand_table[] = {
  88. SPINAND_INFO("F50L1G41LB",
  89. SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
  90. 0x7f, 0x7f),
  91. NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
  92. NAND_ECCREQ(1, 512),
  93. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  94. &write_cache_variants,
  95. &update_cache_variants),
  96. 0,
  97. SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
  98. SPINAND_INFO("F50D1G41LB",
  99. SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
  100. 0x7f, 0x7f),
  101. NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
  102. NAND_ECCREQ(1, 512),
  103. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  104. &write_cache_variants,
  105. &update_cache_variants),
  106. 0,
  107. SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
  108. SPINAND_INFO("F50D2G41KA",
  109. SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51, 0x7f,
  110. 0x7f, 0x7f),
  111. NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
  112. NAND_ECCREQ(8, 512),
  113. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  114. &write_cache_variants,
  115. &update_cache_variants),
  116. 0,
  117. SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
  118. };
  119. static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
  120. };
  121. const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
  122. .id = SPINAND_MFR_ESMT_C8,
  123. .name = "ESMT",
  124. .chips = esmt_c8_spinand_table,
  125. .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
  126. .ops = &esmt_spinand_manuf_ops,
  127. };