ntb_transport.c 62 KB

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  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2012 Intel Corporation. All rights reserved.
  8. * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * BSD LICENSE
  15. *
  16. * Copyright(c) 2012 Intel Corporation. All rights reserved.
  17. * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions
  21. * are met:
  22. *
  23. * * Redistributions of source code must retain the above copyright
  24. * notice, this list of conditions and the following disclaimer.
  25. * * Redistributions in binary form must reproduce the above copy
  26. * notice, this list of conditions and the following disclaimer in
  27. * the documentation and/or other materials provided with the
  28. * distribution.
  29. * * Neither the name of Intel Corporation nor the names of its
  30. * contributors may be used to endorse or promote products derived
  31. * from this software without specific prior written permission.
  32. *
  33. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  34. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  35. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  36. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  37. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  38. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  39. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  40. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  41. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  42. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  43. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  44. *
  45. * PCIe NTB Transport Linux driver
  46. *
  47. * Contact Information:
  48. * Jon Mason <jon.mason@intel.com>
  49. */
  50. #include <linux/debugfs.h>
  51. #include <linux/delay.h>
  52. #include <linux/dmaengine.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/errno.h>
  55. #include <linux/export.h>
  56. #include <linux/interrupt.h>
  57. #include <linux/module.h>
  58. #include <linux/pci.h>
  59. #include <linux/slab.h>
  60. #include <linux/types.h>
  61. #include <linux/uaccess.h>
  62. #include "linux/ntb.h"
  63. #include "linux/ntb_transport.h"
  64. #define NTB_TRANSPORT_VERSION 4
  65. #define NTB_TRANSPORT_VER "4"
  66. #define NTB_TRANSPORT_NAME "ntb_transport"
  67. #define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB"
  68. #define NTB_TRANSPORT_MIN_SPADS (MW0_SZ_HIGH + 2)
  69. MODULE_DESCRIPTION(NTB_TRANSPORT_DESC);
  70. MODULE_VERSION(NTB_TRANSPORT_VER);
  71. MODULE_LICENSE("Dual BSD/GPL");
  72. MODULE_AUTHOR("Intel Corporation");
  73. static unsigned long max_mw_size;
  74. module_param(max_mw_size, ulong, 0644);
  75. MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
  76. static unsigned int transport_mtu = 0x10000;
  77. module_param(transport_mtu, uint, 0644);
  78. MODULE_PARM_DESC(transport_mtu, "Maximum size of NTB transport packets");
  79. static unsigned char max_num_clients;
  80. module_param(max_num_clients, byte, 0644);
  81. MODULE_PARM_DESC(max_num_clients, "Maximum number of NTB transport clients");
  82. static unsigned int copy_bytes = 1024;
  83. module_param(copy_bytes, uint, 0644);
  84. MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA");
  85. static bool use_dma;
  86. module_param(use_dma, bool, 0644);
  87. MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy");
  88. static bool use_msi;
  89. #ifdef CONFIG_NTB_MSI
  90. module_param(use_msi, bool, 0644);
  91. MODULE_PARM_DESC(use_msi, "Use MSI interrupts instead of doorbells");
  92. #endif
  93. static struct dentry *nt_debugfs_dir;
  94. /* Only two-ports NTB devices are supported */
  95. #define PIDX NTB_DEF_PEER_IDX
  96. struct ntb_queue_entry {
  97. /* ntb_queue list reference */
  98. struct list_head entry;
  99. /* pointers to data to be transferred */
  100. void *cb_data;
  101. void *buf;
  102. unsigned int len;
  103. unsigned int flags;
  104. int retries;
  105. int errors;
  106. unsigned int tx_index;
  107. unsigned int rx_index;
  108. struct ntb_transport_qp *qp;
  109. union {
  110. struct ntb_payload_header __iomem *tx_hdr;
  111. struct ntb_payload_header *rx_hdr;
  112. };
  113. };
  114. struct ntb_rx_info {
  115. unsigned int entry;
  116. };
  117. struct ntb_transport_qp {
  118. struct ntb_transport_ctx *transport;
  119. struct ntb_dev *ndev;
  120. void *cb_data;
  121. struct dma_chan *tx_dma_chan;
  122. struct dma_chan *rx_dma_chan;
  123. bool client_ready;
  124. bool link_is_up;
  125. bool active;
  126. u8 qp_num; /* Only 64 QP's are allowed. 0-63 */
  127. u64 qp_bit;
  128. struct ntb_rx_info __iomem *rx_info;
  129. struct ntb_rx_info *remote_rx_info;
  130. void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data,
  131. void *data, int len);
  132. struct list_head tx_free_q;
  133. spinlock_t ntb_tx_free_q_lock;
  134. void __iomem *tx_mw;
  135. phys_addr_t tx_mw_phys;
  136. size_t tx_mw_size;
  137. dma_addr_t tx_mw_dma_addr;
  138. unsigned int tx_index;
  139. unsigned int tx_max_entry;
  140. unsigned int tx_max_frame;
  141. void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data,
  142. void *data, int len);
  143. struct list_head rx_post_q;
  144. struct list_head rx_pend_q;
  145. struct list_head rx_free_q;
  146. /* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
  147. spinlock_t ntb_rx_q_lock;
  148. void *rx_buff;
  149. unsigned int rx_index;
  150. unsigned int rx_max_entry;
  151. unsigned int rx_max_frame;
  152. unsigned int rx_alloc_entry;
  153. dma_cookie_t last_cookie;
  154. struct tasklet_struct rxc_db_work;
  155. void (*event_handler)(void *data, int status);
  156. struct delayed_work link_work;
  157. struct work_struct link_cleanup;
  158. struct dentry *debugfs_dir;
  159. struct dentry *debugfs_stats;
  160. /* Stats */
  161. u64 rx_bytes;
  162. u64 rx_pkts;
  163. u64 rx_ring_empty;
  164. u64 rx_err_no_buf;
  165. u64 rx_err_oflow;
  166. u64 rx_err_ver;
  167. u64 rx_memcpy;
  168. u64 rx_async;
  169. u64 tx_bytes;
  170. u64 tx_pkts;
  171. u64 tx_ring_full;
  172. u64 tx_err_no_buf;
  173. u64 tx_memcpy;
  174. u64 tx_async;
  175. bool use_msi;
  176. int msi_irq;
  177. struct ntb_msi_desc msi_desc;
  178. struct ntb_msi_desc peer_msi_desc;
  179. };
  180. struct ntb_transport_mw {
  181. phys_addr_t phys_addr;
  182. resource_size_t phys_size;
  183. void __iomem *vbase;
  184. size_t xlat_size;
  185. size_t buff_size;
  186. size_t alloc_size;
  187. void *alloc_addr;
  188. void *virt_addr;
  189. dma_addr_t dma_addr;
  190. };
  191. struct ntb_transport_client_dev {
  192. struct list_head entry;
  193. struct ntb_transport_ctx *nt;
  194. struct device dev;
  195. };
  196. struct ntb_transport_ctx {
  197. struct list_head entry;
  198. struct list_head client_devs;
  199. struct ntb_dev *ndev;
  200. struct ntb_transport_mw *mw_vec;
  201. struct ntb_transport_qp *qp_vec;
  202. unsigned int mw_count;
  203. unsigned int qp_count;
  204. u64 qp_bitmap;
  205. u64 qp_bitmap_free;
  206. bool use_msi;
  207. unsigned int msi_spad_offset;
  208. u64 msi_db_mask;
  209. bool link_is_up;
  210. struct delayed_work link_work;
  211. struct work_struct link_cleanup;
  212. struct dentry *debugfs_node_dir;
  213. };
  214. enum {
  215. DESC_DONE_FLAG = BIT(0),
  216. LINK_DOWN_FLAG = BIT(1),
  217. };
  218. struct ntb_payload_header {
  219. unsigned int ver;
  220. unsigned int len;
  221. unsigned int flags;
  222. };
  223. enum {
  224. VERSION = 0,
  225. QP_LINKS,
  226. NUM_QPS,
  227. NUM_MWS,
  228. MW0_SZ_HIGH,
  229. MW0_SZ_LOW,
  230. };
  231. #define dev_client_dev(__dev) \
  232. container_of((__dev), struct ntb_transport_client_dev, dev)
  233. #define drv_client(__drv) \
  234. container_of((__drv), struct ntb_transport_client, driver)
  235. #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count)
  236. #define NTB_QP_DEF_NUM_ENTRIES 100
  237. #define NTB_LINK_DOWN_TIMEOUT 10
  238. static void ntb_transport_rxc_db(unsigned long data);
  239. static const struct ntb_ctx_ops ntb_transport_ops;
  240. static struct ntb_client ntb_transport_client;
  241. static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
  242. struct ntb_queue_entry *entry);
  243. static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset);
  244. static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset);
  245. static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset);
  246. static int ntb_transport_bus_match(struct device *dev,
  247. const struct device_driver *drv)
  248. {
  249. return !strncmp(dev_name(dev), drv->name, strlen(drv->name));
  250. }
  251. static int ntb_transport_bus_probe(struct device *dev)
  252. {
  253. const struct ntb_transport_client *client;
  254. int rc;
  255. get_device(dev);
  256. client = drv_client(dev->driver);
  257. rc = client->probe(dev);
  258. if (rc)
  259. put_device(dev);
  260. return rc;
  261. }
  262. static void ntb_transport_bus_remove(struct device *dev)
  263. {
  264. const struct ntb_transport_client *client;
  265. client = drv_client(dev->driver);
  266. client->remove(dev);
  267. put_device(dev);
  268. }
  269. static const struct bus_type ntb_transport_bus = {
  270. .name = "ntb_transport",
  271. .match = ntb_transport_bus_match,
  272. .probe = ntb_transport_bus_probe,
  273. .remove = ntb_transport_bus_remove,
  274. };
  275. static LIST_HEAD(ntb_transport_list);
  276. static int ntb_bus_init(struct ntb_transport_ctx *nt)
  277. {
  278. list_add_tail(&nt->entry, &ntb_transport_list);
  279. return 0;
  280. }
  281. static void ntb_bus_remove(struct ntb_transport_ctx *nt)
  282. {
  283. struct ntb_transport_client_dev *client_dev, *cd;
  284. list_for_each_entry_safe(client_dev, cd, &nt->client_devs, entry) {
  285. dev_err(client_dev->dev.parent, "%s still attached to bus, removing\n",
  286. dev_name(&client_dev->dev));
  287. list_del(&client_dev->entry);
  288. device_unregister(&client_dev->dev);
  289. }
  290. list_del(&nt->entry);
  291. }
  292. static void ntb_transport_client_release(struct device *dev)
  293. {
  294. struct ntb_transport_client_dev *client_dev;
  295. client_dev = dev_client_dev(dev);
  296. kfree(client_dev);
  297. }
  298. /**
  299. * ntb_transport_unregister_client_dev - Unregister NTB client device
  300. * @device_name: Name of NTB client device
  301. *
  302. * Unregister an NTB client device with the NTB transport layer
  303. */
  304. void ntb_transport_unregister_client_dev(char *device_name)
  305. {
  306. struct ntb_transport_client_dev *client, *cd;
  307. struct ntb_transport_ctx *nt;
  308. list_for_each_entry(nt, &ntb_transport_list, entry)
  309. list_for_each_entry_safe(client, cd, &nt->client_devs, entry)
  310. if (!strncmp(dev_name(&client->dev), device_name,
  311. strlen(device_name))) {
  312. list_del(&client->entry);
  313. device_unregister(&client->dev);
  314. }
  315. }
  316. EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev);
  317. /**
  318. * ntb_transport_register_client_dev - Register NTB client device
  319. * @device_name: Name of NTB client device
  320. *
  321. * Register an NTB client device with the NTB transport layer
  322. *
  323. * Returns: %0 on success or -errno code on error
  324. */
  325. int ntb_transport_register_client_dev(char *device_name)
  326. {
  327. struct ntb_transport_client_dev *client_dev;
  328. struct ntb_transport_ctx *nt;
  329. int node;
  330. int rc, i = 0;
  331. if (list_empty(&ntb_transport_list))
  332. return -ENODEV;
  333. list_for_each_entry(nt, &ntb_transport_list, entry) {
  334. struct device *dev;
  335. node = dev_to_node(&nt->ndev->dev);
  336. client_dev = kzalloc_node(sizeof(*client_dev),
  337. GFP_KERNEL, node);
  338. if (!client_dev) {
  339. rc = -ENOMEM;
  340. goto err;
  341. }
  342. dev = &client_dev->dev;
  343. /* setup and register client devices */
  344. dev_set_name(dev, "%s%d", device_name, i);
  345. dev->bus = &ntb_transport_bus;
  346. dev->release = ntb_transport_client_release;
  347. dev->parent = &nt->ndev->dev;
  348. rc = device_register(dev);
  349. if (rc) {
  350. put_device(dev);
  351. goto err;
  352. }
  353. list_add_tail(&client_dev->entry, &nt->client_devs);
  354. i++;
  355. }
  356. return 0;
  357. err:
  358. ntb_transport_unregister_client_dev(device_name);
  359. return rc;
  360. }
  361. EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev);
  362. /**
  363. * ntb_transport_register_client - Register NTB client driver
  364. * @drv: NTB client driver to be registered
  365. *
  366. * Register an NTB client driver with the NTB transport layer
  367. *
  368. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  369. */
  370. int ntb_transport_register_client(struct ntb_transport_client *drv)
  371. {
  372. drv->driver.bus = &ntb_transport_bus;
  373. if (list_empty(&ntb_transport_list))
  374. return -ENODEV;
  375. return driver_register(&drv->driver);
  376. }
  377. EXPORT_SYMBOL_GPL(ntb_transport_register_client);
  378. /**
  379. * ntb_transport_unregister_client - Unregister NTB client driver
  380. * @drv: NTB client driver to be unregistered
  381. *
  382. * Unregister an NTB client driver with the NTB transport layer
  383. *
  384. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  385. */
  386. void ntb_transport_unregister_client(struct ntb_transport_client *drv)
  387. {
  388. driver_unregister(&drv->driver);
  389. }
  390. EXPORT_SYMBOL_GPL(ntb_transport_unregister_client);
  391. static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count,
  392. loff_t *offp)
  393. {
  394. struct ntb_transport_qp *qp;
  395. char *buf;
  396. ssize_t ret, out_offset, out_count;
  397. qp = filp->private_data;
  398. if (!qp || !qp->link_is_up)
  399. return 0;
  400. out_count = 1000;
  401. buf = kmalloc(out_count, GFP_KERNEL);
  402. if (!buf)
  403. return -ENOMEM;
  404. out_offset = 0;
  405. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  406. "\nNTB QP stats:\n\n");
  407. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  408. "rx_bytes - \t%llu\n", qp->rx_bytes);
  409. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  410. "rx_pkts - \t%llu\n", qp->rx_pkts);
  411. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  412. "rx_memcpy - \t%llu\n", qp->rx_memcpy);
  413. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  414. "rx_async - \t%llu\n", qp->rx_async);
  415. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  416. "rx_ring_empty - %llu\n", qp->rx_ring_empty);
  417. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  418. "rx_err_no_buf - %llu\n", qp->rx_err_no_buf);
  419. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  420. "rx_err_oflow - \t%llu\n", qp->rx_err_oflow);
  421. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  422. "rx_err_ver - \t%llu\n", qp->rx_err_ver);
  423. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  424. "rx_buff - \t0x%p\n", qp->rx_buff);
  425. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  426. "rx_index - \t%u\n", qp->rx_index);
  427. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  428. "rx_max_entry - \t%u\n", qp->rx_max_entry);
  429. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  430. "rx_alloc_entry - \t%u\n\n", qp->rx_alloc_entry);
  431. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  432. "tx_bytes - \t%llu\n", qp->tx_bytes);
  433. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  434. "tx_pkts - \t%llu\n", qp->tx_pkts);
  435. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  436. "tx_memcpy - \t%llu\n", qp->tx_memcpy);
  437. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  438. "tx_async - \t%llu\n", qp->tx_async);
  439. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  440. "tx_ring_full - \t%llu\n", qp->tx_ring_full);
  441. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  442. "tx_err_no_buf - %llu\n", qp->tx_err_no_buf);
  443. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  444. "tx_mw - \t0x%p\n", qp->tx_mw);
  445. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  446. "tx_index (H) - \t%u\n", qp->tx_index);
  447. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  448. "RRI (T) - \t%u\n",
  449. qp->remote_rx_info->entry);
  450. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  451. "tx_max_entry - \t%u\n", qp->tx_max_entry);
  452. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  453. "free tx - \t%u\n",
  454. ntb_transport_tx_free_entry(qp));
  455. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  456. "\n");
  457. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  458. "Using TX DMA - \t%s\n",
  459. qp->tx_dma_chan ? "Yes" : "No");
  460. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  461. "Using RX DMA - \t%s\n",
  462. qp->rx_dma_chan ? "Yes" : "No");
  463. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  464. "QP Link - \t%s\n",
  465. qp->link_is_up ? "Up" : "Down");
  466. out_offset += scnprintf(buf + out_offset, out_count - out_offset,
  467. "\n");
  468. if (out_offset > out_count)
  469. out_offset = out_count;
  470. ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
  471. kfree(buf);
  472. return ret;
  473. }
  474. static const struct file_operations ntb_qp_debugfs_stats = {
  475. .owner = THIS_MODULE,
  476. .open = simple_open,
  477. .read = debugfs_read,
  478. };
  479. static void ntb_list_add(spinlock_t *lock, struct list_head *entry,
  480. struct list_head *list)
  481. {
  482. unsigned long flags;
  483. spin_lock_irqsave(lock, flags);
  484. list_add_tail(entry, list);
  485. spin_unlock_irqrestore(lock, flags);
  486. }
  487. static struct ntb_queue_entry *ntb_list_rm(spinlock_t *lock,
  488. struct list_head *list)
  489. {
  490. struct ntb_queue_entry *entry;
  491. unsigned long flags;
  492. spin_lock_irqsave(lock, flags);
  493. if (list_empty(list)) {
  494. entry = NULL;
  495. goto out;
  496. }
  497. entry = list_first_entry(list, struct ntb_queue_entry, entry);
  498. list_del(&entry->entry);
  499. out:
  500. spin_unlock_irqrestore(lock, flags);
  501. return entry;
  502. }
  503. static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock,
  504. struct list_head *list,
  505. struct list_head *to_list)
  506. {
  507. struct ntb_queue_entry *entry;
  508. unsigned long flags;
  509. spin_lock_irqsave(lock, flags);
  510. if (list_empty(list)) {
  511. entry = NULL;
  512. } else {
  513. entry = list_first_entry(list, struct ntb_queue_entry, entry);
  514. list_move_tail(&entry->entry, to_list);
  515. }
  516. spin_unlock_irqrestore(lock, flags);
  517. return entry;
  518. }
  519. static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
  520. unsigned int qp_num)
  521. {
  522. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  523. struct ntb_transport_mw *mw;
  524. struct ntb_dev *ndev = nt->ndev;
  525. struct ntb_queue_entry *entry;
  526. unsigned int rx_size, num_qps_mw;
  527. unsigned int mw_num, mw_count, qp_count;
  528. unsigned int i;
  529. int node;
  530. mw_count = nt->mw_count;
  531. qp_count = nt->qp_count;
  532. mw_num = QP_TO_MW(nt, qp_num);
  533. mw = &nt->mw_vec[mw_num];
  534. if (!mw->virt_addr)
  535. return -ENOMEM;
  536. if (mw_num < qp_count % mw_count)
  537. num_qps_mw = qp_count / mw_count + 1;
  538. else
  539. num_qps_mw = qp_count / mw_count;
  540. rx_size = (unsigned int)mw->xlat_size / num_qps_mw;
  541. qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);
  542. rx_size -= sizeof(struct ntb_rx_info);
  543. qp->remote_rx_info = qp->rx_buff + rx_size;
  544. /* Due to housekeeping, there must be atleast 2 buffs */
  545. qp->rx_max_frame = min(transport_mtu, rx_size / 2);
  546. qp->rx_max_entry = rx_size / qp->rx_max_frame;
  547. qp->rx_index = 0;
  548. /*
  549. * Checking to see if we have more entries than the default.
  550. * We should add additional entries if that is the case so we
  551. * can be in sync with the transport frames.
  552. */
  553. node = dev_to_node(&ndev->dev);
  554. for (i = qp->rx_alloc_entry; i < qp->rx_max_entry; i++) {
  555. entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
  556. if (!entry)
  557. return -ENOMEM;
  558. entry->qp = qp;
  559. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
  560. &qp->rx_free_q);
  561. qp->rx_alloc_entry++;
  562. }
  563. qp->remote_rx_info->entry = qp->rx_max_entry - 1;
  564. /* setup the hdr offsets with 0's */
  565. for (i = 0; i < qp->rx_max_entry; i++) {
  566. void *offset = (qp->rx_buff + qp->rx_max_frame * (i + 1) -
  567. sizeof(struct ntb_payload_header));
  568. memset(offset, 0, sizeof(struct ntb_payload_header));
  569. }
  570. qp->rx_pkts = 0;
  571. qp->tx_pkts = 0;
  572. qp->tx_index = 0;
  573. return 0;
  574. }
  575. static irqreturn_t ntb_transport_isr(int irq, void *dev)
  576. {
  577. struct ntb_transport_qp *qp = dev;
  578. tasklet_schedule(&qp->rxc_db_work);
  579. return IRQ_HANDLED;
  580. }
  581. static void ntb_transport_setup_qp_peer_msi(struct ntb_transport_ctx *nt,
  582. unsigned int qp_num)
  583. {
  584. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  585. int spad = qp_num * 2 + nt->msi_spad_offset;
  586. if (!nt->use_msi)
  587. return;
  588. if (spad >= ntb_spad_count(nt->ndev))
  589. return;
  590. qp->peer_msi_desc.addr_offset =
  591. ntb_peer_spad_read(qp->ndev, PIDX, spad);
  592. qp->peer_msi_desc.data =
  593. ntb_peer_spad_read(qp->ndev, PIDX, spad + 1);
  594. dev_dbg(&qp->ndev->pdev->dev, "QP%d Peer MSI addr=%x data=%x\n",
  595. qp_num, qp->peer_msi_desc.addr_offset, qp->peer_msi_desc.data);
  596. if (qp->peer_msi_desc.addr_offset) {
  597. qp->use_msi = true;
  598. dev_info(&qp->ndev->pdev->dev,
  599. "Using MSI interrupts for QP%d\n", qp_num);
  600. }
  601. }
  602. static void ntb_transport_setup_qp_msi(struct ntb_transport_ctx *nt,
  603. unsigned int qp_num)
  604. {
  605. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  606. int spad = qp_num * 2 + nt->msi_spad_offset;
  607. int rc;
  608. if (!nt->use_msi)
  609. return;
  610. if (spad >= ntb_spad_count(nt->ndev)) {
  611. dev_warn_once(&qp->ndev->pdev->dev,
  612. "Not enough SPADS to use MSI interrupts\n");
  613. return;
  614. }
  615. ntb_spad_write(qp->ndev, spad, 0);
  616. ntb_spad_write(qp->ndev, spad + 1, 0);
  617. if (!qp->msi_irq) {
  618. qp->msi_irq = ntbm_msi_request_irq(qp->ndev, ntb_transport_isr,
  619. KBUILD_MODNAME, qp,
  620. &qp->msi_desc);
  621. if (qp->msi_irq < 0) {
  622. dev_warn(&qp->ndev->pdev->dev,
  623. "Unable to allocate MSI interrupt for qp%d\n",
  624. qp_num);
  625. return;
  626. }
  627. }
  628. rc = ntb_spad_write(qp->ndev, spad, qp->msi_desc.addr_offset);
  629. if (rc)
  630. goto err_free_interrupt;
  631. rc = ntb_spad_write(qp->ndev, spad + 1, qp->msi_desc.data);
  632. if (rc)
  633. goto err_free_interrupt;
  634. dev_dbg(&qp->ndev->pdev->dev, "QP%d MSI %d addr=%x data=%x\n",
  635. qp_num, qp->msi_irq, qp->msi_desc.addr_offset,
  636. qp->msi_desc.data);
  637. return;
  638. err_free_interrupt:
  639. devm_free_irq(&nt->ndev->dev, qp->msi_irq, qp);
  640. }
  641. static void ntb_transport_msi_peer_desc_changed(struct ntb_transport_ctx *nt)
  642. {
  643. int i;
  644. dev_dbg(&nt->ndev->pdev->dev, "Peer MSI descriptors changed");
  645. for (i = 0; i < nt->qp_count; i++)
  646. ntb_transport_setup_qp_peer_msi(nt, i);
  647. }
  648. static void ntb_transport_msi_desc_changed(void *data)
  649. {
  650. struct ntb_transport_ctx *nt = data;
  651. int i;
  652. dev_dbg(&nt->ndev->pdev->dev, "MSI descriptors changed");
  653. for (i = 0; i < nt->qp_count; i++)
  654. ntb_transport_setup_qp_msi(nt, i);
  655. ntb_peer_db_set(nt->ndev, nt->msi_db_mask);
  656. }
  657. static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw)
  658. {
  659. struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
  660. struct pci_dev *pdev = nt->ndev->pdev;
  661. if (!mw->virt_addr)
  662. return;
  663. ntb_mw_clear_trans(nt->ndev, PIDX, num_mw);
  664. dma_free_coherent(&pdev->dev, mw->alloc_size,
  665. mw->alloc_addr, mw->dma_addr);
  666. mw->xlat_size = 0;
  667. mw->buff_size = 0;
  668. mw->alloc_size = 0;
  669. mw->alloc_addr = NULL;
  670. mw->virt_addr = NULL;
  671. }
  672. static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,
  673. struct device *ntb_dev, size_t align)
  674. {
  675. dma_addr_t dma_addr;
  676. void *alloc_addr, *virt_addr;
  677. int rc;
  678. /*
  679. * The buffer here is allocated against the NTB device. The reason to
  680. * use dma_alloc_*() call is to allocate a large IOVA contiguous buffer
  681. * backing the NTB BAR for the remote host to write to. During receive
  682. * processing, the data is being copied out of the receive buffer to
  683. * the kernel skbuff. When a DMA device is being used, dma_map_page()
  684. * is called on the kvaddr of the receive buffer (from dma_alloc_*())
  685. * and remapped against the DMA device. It appears to be a double
  686. * DMA mapping of buffers, but first is mapped to the NTB device and
  687. * second is to the DMA device. DMA_ATTR_FORCE_CONTIGUOUS is necessary
  688. * in order for the later dma_map_page() to not fail.
  689. */
  690. alloc_addr = dma_alloc_attrs(ntb_dev, mw->alloc_size,
  691. &dma_addr, GFP_KERNEL,
  692. DMA_ATTR_FORCE_CONTIGUOUS);
  693. if (!alloc_addr) {
  694. dev_err(ntb_dev, "Unable to alloc MW buff of size %zu\n",
  695. mw->alloc_size);
  696. return -ENOMEM;
  697. }
  698. virt_addr = alloc_addr;
  699. /*
  700. * we must ensure that the memory address allocated is BAR size
  701. * aligned in order for the XLAT register to take the value. This
  702. * is a requirement of the hardware. It is recommended to setup CMA
  703. * for BAR sizes equal or greater than 4MB.
  704. */
  705. if (!IS_ALIGNED(dma_addr, align)) {
  706. if (mw->alloc_size > mw->buff_size) {
  707. virt_addr = PTR_ALIGN(alloc_addr, align);
  708. dma_addr = ALIGN(dma_addr, align);
  709. } else {
  710. rc = -ENOMEM;
  711. goto err;
  712. }
  713. }
  714. mw->alloc_addr = alloc_addr;
  715. mw->virt_addr = virt_addr;
  716. mw->dma_addr = dma_addr;
  717. return 0;
  718. err:
  719. dma_free_coherent(ntb_dev, mw->alloc_size, alloc_addr, dma_addr);
  720. return rc;
  721. }
  722. static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
  723. resource_size_t size)
  724. {
  725. struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
  726. struct pci_dev *pdev = nt->ndev->pdev;
  727. size_t xlat_size, buff_size;
  728. resource_size_t xlat_align;
  729. resource_size_t xlat_align_size;
  730. int rc;
  731. if (!size)
  732. return -EINVAL;
  733. rc = ntb_mw_get_align(nt->ndev, PIDX, num_mw, &xlat_align,
  734. &xlat_align_size, NULL);
  735. if (rc)
  736. return rc;
  737. xlat_size = round_up(size, xlat_align_size);
  738. buff_size = round_up(size, xlat_align);
  739. /* No need to re-setup */
  740. if (mw->xlat_size == xlat_size)
  741. return 0;
  742. if (mw->buff_size)
  743. ntb_free_mw(nt, num_mw);
  744. /* Alloc memory for receiving data. Must be aligned */
  745. mw->xlat_size = xlat_size;
  746. mw->buff_size = buff_size;
  747. mw->alloc_size = buff_size;
  748. rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
  749. if (rc) {
  750. mw->alloc_size *= 2;
  751. rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
  752. if (rc) {
  753. dev_err(&pdev->dev,
  754. "Unable to alloc aligned MW buff\n");
  755. mw->xlat_size = 0;
  756. mw->buff_size = 0;
  757. mw->alloc_size = 0;
  758. return rc;
  759. }
  760. }
  761. /* Notify HW the memory location of the receive buffer */
  762. rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,
  763. mw->xlat_size);
  764. if (rc) {
  765. dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);
  766. ntb_free_mw(nt, num_mw);
  767. return -EIO;
  768. }
  769. return 0;
  770. }
  771. static void ntb_qp_link_context_reset(struct ntb_transport_qp *qp)
  772. {
  773. qp->link_is_up = false;
  774. qp->active = false;
  775. qp->tx_index = 0;
  776. qp->rx_index = 0;
  777. qp->rx_bytes = 0;
  778. qp->rx_pkts = 0;
  779. qp->rx_ring_empty = 0;
  780. qp->rx_err_no_buf = 0;
  781. qp->rx_err_oflow = 0;
  782. qp->rx_err_ver = 0;
  783. qp->rx_memcpy = 0;
  784. qp->rx_async = 0;
  785. qp->tx_bytes = 0;
  786. qp->tx_pkts = 0;
  787. qp->tx_ring_full = 0;
  788. qp->tx_err_no_buf = 0;
  789. qp->tx_memcpy = 0;
  790. qp->tx_async = 0;
  791. }
  792. static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp)
  793. {
  794. ntb_qp_link_context_reset(qp);
  795. if (qp->remote_rx_info)
  796. qp->remote_rx_info->entry = qp->rx_max_entry - 1;
  797. }
  798. static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp)
  799. {
  800. struct ntb_transport_ctx *nt = qp->transport;
  801. struct pci_dev *pdev = nt->ndev->pdev;
  802. dev_info(&pdev->dev, "qp %d: Link Cleanup\n", qp->qp_num);
  803. cancel_delayed_work_sync(&qp->link_work);
  804. ntb_qp_link_down_reset(qp);
  805. if (qp->event_handler)
  806. qp->event_handler(qp->cb_data, qp->link_is_up);
  807. }
  808. static void ntb_qp_link_cleanup_work(struct work_struct *work)
  809. {
  810. struct ntb_transport_qp *qp = container_of(work,
  811. struct ntb_transport_qp,
  812. link_cleanup);
  813. struct ntb_transport_ctx *nt = qp->transport;
  814. ntb_qp_link_cleanup(qp);
  815. if (nt->link_is_up)
  816. schedule_delayed_work(&qp->link_work,
  817. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  818. }
  819. static void ntb_qp_link_down(struct ntb_transport_qp *qp)
  820. {
  821. schedule_work(&qp->link_cleanup);
  822. }
  823. static void ntb_transport_link_cleanup(struct ntb_transport_ctx *nt)
  824. {
  825. struct ntb_transport_qp *qp;
  826. u64 qp_bitmap_alloc;
  827. unsigned int i, count;
  828. qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
  829. /* Pass along the info to any clients */
  830. for (i = 0; i < nt->qp_count; i++)
  831. if (qp_bitmap_alloc & BIT_ULL(i)) {
  832. qp = &nt->qp_vec[i];
  833. ntb_qp_link_cleanup(qp);
  834. cancel_work_sync(&qp->link_cleanup);
  835. cancel_delayed_work_sync(&qp->link_work);
  836. }
  837. if (!nt->link_is_up)
  838. cancel_delayed_work_sync(&nt->link_work);
  839. for (i = 0; i < nt->mw_count; i++)
  840. ntb_free_mw(nt, i);
  841. /* The scratchpad registers keep the values if the remote side
  842. * goes down, blast them now to give them a sane value the next
  843. * time they are accessed
  844. */
  845. count = ntb_spad_count(nt->ndev);
  846. for (i = 0; i < count; i++)
  847. ntb_spad_write(nt->ndev, i, 0);
  848. }
  849. static void ntb_transport_link_cleanup_work(struct work_struct *work)
  850. {
  851. struct ntb_transport_ctx *nt =
  852. container_of(work, struct ntb_transport_ctx, link_cleanup);
  853. ntb_transport_link_cleanup(nt);
  854. }
  855. static void ntb_transport_event_callback(void *data)
  856. {
  857. struct ntb_transport_ctx *nt = data;
  858. if (ntb_link_is_up(nt->ndev, NULL, NULL) == 1)
  859. schedule_delayed_work(&nt->link_work, 0);
  860. else
  861. schedule_work(&nt->link_cleanup);
  862. }
  863. static void ntb_transport_link_work(struct work_struct *work)
  864. {
  865. struct ntb_transport_ctx *nt =
  866. container_of(work, struct ntb_transport_ctx, link_work.work);
  867. struct ntb_dev *ndev = nt->ndev;
  868. struct pci_dev *pdev = ndev->pdev;
  869. resource_size_t size;
  870. u32 val;
  871. int rc = 0, i, spad;
  872. /* send the local info, in the opposite order of the way we read it */
  873. if (nt->use_msi) {
  874. rc = ntb_msi_setup_mws(ndev);
  875. if (rc) {
  876. dev_warn(&pdev->dev,
  877. "Failed to register MSI memory window: %d\n",
  878. rc);
  879. nt->use_msi = false;
  880. }
  881. }
  882. for (i = 0; i < nt->qp_count; i++)
  883. ntb_transport_setup_qp_msi(nt, i);
  884. for (i = 0; i < nt->mw_count; i++) {
  885. size = nt->mw_vec[i].phys_size;
  886. if (max_mw_size && size > max_mw_size)
  887. size = max_mw_size;
  888. spad = MW0_SZ_HIGH + (i * 2);
  889. ntb_peer_spad_write(ndev, PIDX, spad, upper_32_bits(size));
  890. spad = MW0_SZ_LOW + (i * 2);
  891. ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size));
  892. }
  893. ntb_peer_spad_write(ndev, PIDX, NUM_MWS, nt->mw_count);
  894. ntb_peer_spad_write(ndev, PIDX, NUM_QPS, nt->qp_count);
  895. ntb_peer_spad_write(ndev, PIDX, VERSION, NTB_TRANSPORT_VERSION);
  896. /* Query the remote side for its info */
  897. val = ntb_spad_read(ndev, VERSION);
  898. dev_dbg(&pdev->dev, "Remote version = %d\n", val);
  899. if (val != NTB_TRANSPORT_VERSION)
  900. goto out;
  901. val = ntb_spad_read(ndev, NUM_QPS);
  902. dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val);
  903. if (val != nt->qp_count)
  904. goto out;
  905. val = ntb_spad_read(ndev, NUM_MWS);
  906. dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val);
  907. if (val != nt->mw_count)
  908. goto out;
  909. for (i = 0; i < nt->mw_count; i++) {
  910. u64 val64;
  911. val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2));
  912. val64 = (u64)val << 32;
  913. val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2));
  914. val64 |= val;
  915. dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);
  916. rc = ntb_set_mw(nt, i, val64);
  917. if (rc)
  918. goto out1;
  919. }
  920. nt->link_is_up = true;
  921. for (i = 0; i < nt->qp_count; i++) {
  922. struct ntb_transport_qp *qp = &nt->qp_vec[i];
  923. ntb_transport_setup_qp_mw(nt, i);
  924. ntb_transport_setup_qp_peer_msi(nt, i);
  925. if (qp->client_ready)
  926. schedule_delayed_work(&qp->link_work, 0);
  927. }
  928. return;
  929. out1:
  930. for (i = 0; i < nt->mw_count; i++)
  931. ntb_free_mw(nt, i);
  932. /* if there's an actual failure, we should just bail */
  933. if (rc < 0)
  934. return;
  935. out:
  936. if (ntb_link_is_up(ndev, NULL, NULL) == 1)
  937. schedule_delayed_work(&nt->link_work,
  938. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  939. }
  940. static void ntb_qp_link_work(struct work_struct *work)
  941. {
  942. struct ntb_transport_qp *qp = container_of(work,
  943. struct ntb_transport_qp,
  944. link_work.work);
  945. struct pci_dev *pdev = qp->ndev->pdev;
  946. struct ntb_transport_ctx *nt = qp->transport;
  947. int val;
  948. WARN_ON(!nt->link_is_up);
  949. val = ntb_spad_read(nt->ndev, QP_LINKS);
  950. ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val | BIT(qp->qp_num));
  951. /* query remote spad for qp ready bits */
  952. dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val);
  953. /* See if the remote side is up */
  954. if (val & BIT(qp->qp_num)) {
  955. dev_info(&pdev->dev, "qp %d: Link Up\n", qp->qp_num);
  956. qp->link_is_up = true;
  957. qp->active = true;
  958. if (qp->event_handler)
  959. qp->event_handler(qp->cb_data, qp->link_is_up);
  960. if (qp->active)
  961. tasklet_schedule(&qp->rxc_db_work);
  962. } else if (nt->link_is_up)
  963. schedule_delayed_work(&qp->link_work,
  964. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  965. }
  966. static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
  967. unsigned int qp_num)
  968. {
  969. struct ntb_transport_qp *qp;
  970. phys_addr_t mw_base;
  971. resource_size_t mw_size;
  972. unsigned int num_qps_mw, tx_size;
  973. unsigned int mw_num, mw_count, qp_count;
  974. u64 qp_offset;
  975. mw_count = nt->mw_count;
  976. qp_count = nt->qp_count;
  977. mw_num = QP_TO_MW(nt, qp_num);
  978. qp = &nt->qp_vec[qp_num];
  979. qp->qp_num = qp_num;
  980. qp->transport = nt;
  981. qp->ndev = nt->ndev;
  982. qp->client_ready = false;
  983. qp->event_handler = NULL;
  984. ntb_qp_link_context_reset(qp);
  985. if (mw_num < qp_count % mw_count)
  986. num_qps_mw = qp_count / mw_count + 1;
  987. else
  988. num_qps_mw = qp_count / mw_count;
  989. mw_base = nt->mw_vec[mw_num].phys_addr;
  990. mw_size = nt->mw_vec[mw_num].phys_size;
  991. if (max_mw_size && mw_size > max_mw_size)
  992. mw_size = max_mw_size;
  993. tx_size = (unsigned int)mw_size / num_qps_mw;
  994. qp_offset = tx_size * (qp_num / mw_count);
  995. qp->tx_mw_size = tx_size;
  996. qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;
  997. if (!qp->tx_mw)
  998. return -EINVAL;
  999. qp->tx_mw_phys = mw_base + qp_offset;
  1000. if (!qp->tx_mw_phys)
  1001. return -EINVAL;
  1002. tx_size -= sizeof(struct ntb_rx_info);
  1003. qp->rx_info = qp->tx_mw + tx_size;
  1004. /* Due to housekeeping, there must be atleast 2 buffs */
  1005. qp->tx_max_frame = min(transport_mtu, tx_size / 2);
  1006. qp->tx_max_entry = tx_size / qp->tx_max_frame;
  1007. if (nt->debugfs_node_dir) {
  1008. char debugfs_name[4];
  1009. snprintf(debugfs_name, 4, "qp%d", qp_num);
  1010. qp->debugfs_dir = debugfs_create_dir(debugfs_name,
  1011. nt->debugfs_node_dir);
  1012. qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
  1013. qp->debugfs_dir, qp,
  1014. &ntb_qp_debugfs_stats);
  1015. } else {
  1016. qp->debugfs_dir = NULL;
  1017. qp->debugfs_stats = NULL;
  1018. }
  1019. INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
  1020. INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
  1021. spin_lock_init(&qp->ntb_rx_q_lock);
  1022. spin_lock_init(&qp->ntb_tx_free_q_lock);
  1023. INIT_LIST_HEAD(&qp->rx_post_q);
  1024. INIT_LIST_HEAD(&qp->rx_pend_q);
  1025. INIT_LIST_HEAD(&qp->rx_free_q);
  1026. INIT_LIST_HEAD(&qp->tx_free_q);
  1027. tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
  1028. (unsigned long)qp);
  1029. return 0;
  1030. }
  1031. static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
  1032. {
  1033. struct ntb_transport_ctx *nt;
  1034. struct ntb_transport_mw *mw;
  1035. unsigned int mw_count, qp_count, spad_count, max_mw_count_for_spads;
  1036. u64 qp_bitmap;
  1037. int node;
  1038. int rc, i;
  1039. mw_count = ntb_peer_mw_count(ndev);
  1040. if (!ndev->ops->mw_set_trans) {
  1041. dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");
  1042. return -EINVAL;
  1043. }
  1044. if (ntb_db_is_unsafe(ndev))
  1045. dev_dbg(&ndev->dev,
  1046. "doorbell is unsafe, proceed anyway...\n");
  1047. if (ntb_spad_is_unsafe(ndev))
  1048. dev_dbg(&ndev->dev,
  1049. "scratchpad is unsafe, proceed anyway...\n");
  1050. if (ntb_peer_port_count(ndev) != NTB_DEF_PEER_CNT)
  1051. dev_warn(&ndev->dev, "Multi-port NTB devices unsupported\n");
  1052. node = dev_to_node(&ndev->dev);
  1053. nt = kzalloc_node(sizeof(*nt), GFP_KERNEL, node);
  1054. if (!nt)
  1055. return -ENOMEM;
  1056. nt->ndev = ndev;
  1057. /*
  1058. * If we are using MSI, and have at least one extra memory window,
  1059. * we will reserve the last MW for the MSI window.
  1060. */
  1061. if (use_msi && mw_count > 1) {
  1062. rc = ntb_msi_init(ndev, ntb_transport_msi_desc_changed);
  1063. if (!rc) {
  1064. mw_count -= 1;
  1065. nt->use_msi = true;
  1066. }
  1067. }
  1068. spad_count = ntb_spad_count(ndev);
  1069. /* Limit the MW's based on the availability of scratchpads */
  1070. if (spad_count < NTB_TRANSPORT_MIN_SPADS) {
  1071. nt->mw_count = 0;
  1072. rc = -EINVAL;
  1073. goto err;
  1074. }
  1075. max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2;
  1076. nt->mw_count = min(mw_count, max_mw_count_for_spads);
  1077. nt->msi_spad_offset = nt->mw_count * 2 + MW0_SZ_HIGH;
  1078. nt->mw_vec = kcalloc_node(mw_count, sizeof(*nt->mw_vec),
  1079. GFP_KERNEL, node);
  1080. if (!nt->mw_vec) {
  1081. rc = -ENOMEM;
  1082. goto err;
  1083. }
  1084. for (i = 0; i < mw_count; i++) {
  1085. mw = &nt->mw_vec[i];
  1086. rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,
  1087. &mw->phys_size);
  1088. if (rc)
  1089. goto err1;
  1090. mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
  1091. if (!mw->vbase) {
  1092. rc = -ENOMEM;
  1093. goto err1;
  1094. }
  1095. mw->buff_size = 0;
  1096. mw->xlat_size = 0;
  1097. mw->virt_addr = NULL;
  1098. mw->dma_addr = 0;
  1099. }
  1100. qp_bitmap = ntb_db_valid_mask(ndev);
  1101. qp_count = ilog2(qp_bitmap);
  1102. if (nt->use_msi) {
  1103. qp_count -= 1;
  1104. nt->msi_db_mask = 1 << qp_count;
  1105. ntb_db_clear_mask(ndev, nt->msi_db_mask);
  1106. }
  1107. if (max_num_clients && max_num_clients < qp_count)
  1108. qp_count = max_num_clients;
  1109. else if (nt->mw_count < qp_count)
  1110. qp_count = nt->mw_count;
  1111. qp_bitmap &= BIT_ULL(qp_count) - 1;
  1112. nt->qp_count = qp_count;
  1113. nt->qp_bitmap = qp_bitmap;
  1114. nt->qp_bitmap_free = qp_bitmap;
  1115. nt->qp_vec = kcalloc_node(qp_count, sizeof(*nt->qp_vec),
  1116. GFP_KERNEL, node);
  1117. if (!nt->qp_vec) {
  1118. rc = -ENOMEM;
  1119. goto err1;
  1120. }
  1121. if (nt_debugfs_dir) {
  1122. nt->debugfs_node_dir =
  1123. debugfs_create_dir(pci_name(ndev->pdev),
  1124. nt_debugfs_dir);
  1125. }
  1126. for (i = 0; i < qp_count; i++) {
  1127. rc = ntb_transport_init_queue(nt, i);
  1128. if (rc)
  1129. goto err2;
  1130. }
  1131. INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work);
  1132. INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work);
  1133. rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops);
  1134. if (rc)
  1135. goto err2;
  1136. INIT_LIST_HEAD(&nt->client_devs);
  1137. rc = ntb_bus_init(nt);
  1138. if (rc)
  1139. goto err3;
  1140. nt->link_is_up = false;
  1141. ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
  1142. ntb_link_event(ndev);
  1143. return 0;
  1144. err3:
  1145. ntb_clear_ctx(ndev);
  1146. err2:
  1147. kfree(nt->qp_vec);
  1148. err1:
  1149. while (i--) {
  1150. mw = &nt->mw_vec[i];
  1151. iounmap(mw->vbase);
  1152. }
  1153. kfree(nt->mw_vec);
  1154. err:
  1155. kfree(nt);
  1156. return rc;
  1157. }
  1158. static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev)
  1159. {
  1160. struct ntb_transport_ctx *nt = ndev->ctx;
  1161. struct ntb_transport_qp *qp;
  1162. u64 qp_bitmap_alloc;
  1163. int i;
  1164. ntb_transport_link_cleanup(nt);
  1165. cancel_work_sync(&nt->link_cleanup);
  1166. cancel_delayed_work_sync(&nt->link_work);
  1167. qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
  1168. /* verify that all the qp's are freed */
  1169. for (i = 0; i < nt->qp_count; i++) {
  1170. qp = &nt->qp_vec[i];
  1171. if (qp_bitmap_alloc & BIT_ULL(i))
  1172. ntb_transport_free_queue(qp);
  1173. debugfs_remove_recursive(qp->debugfs_dir);
  1174. }
  1175. ntb_link_disable(ndev);
  1176. ntb_clear_ctx(ndev);
  1177. ntb_bus_remove(nt);
  1178. for (i = nt->mw_count; i--; ) {
  1179. ntb_free_mw(nt, i);
  1180. iounmap(nt->mw_vec[i].vbase);
  1181. }
  1182. kfree(nt->qp_vec);
  1183. kfree(nt->mw_vec);
  1184. kfree(nt);
  1185. }
  1186. static void ntb_complete_rxc(struct ntb_transport_qp *qp)
  1187. {
  1188. struct ntb_queue_entry *entry;
  1189. void *cb_data;
  1190. unsigned int len;
  1191. unsigned long irqflags;
  1192. spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
  1193. while (!list_empty(&qp->rx_post_q)) {
  1194. entry = list_first_entry(&qp->rx_post_q,
  1195. struct ntb_queue_entry, entry);
  1196. if (!(entry->flags & DESC_DONE_FLAG))
  1197. break;
  1198. entry->rx_hdr->flags = 0;
  1199. iowrite32(entry->rx_index, &qp->rx_info->entry);
  1200. cb_data = entry->cb_data;
  1201. len = entry->len;
  1202. list_move_tail(&entry->entry, &qp->rx_free_q);
  1203. spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
  1204. if (qp->rx_handler && qp->client_ready)
  1205. qp->rx_handler(qp, qp->cb_data, cb_data, len);
  1206. spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
  1207. }
  1208. spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
  1209. }
  1210. static void ntb_rx_copy_callback(void *data,
  1211. const struct dmaengine_result *res)
  1212. {
  1213. struct ntb_queue_entry *entry = data;
  1214. /* we need to check DMA results if we are using DMA */
  1215. if (res) {
  1216. enum dmaengine_tx_result dma_err = res->result;
  1217. switch (dma_err) {
  1218. case DMA_TRANS_READ_FAILED:
  1219. case DMA_TRANS_WRITE_FAILED:
  1220. entry->errors++;
  1221. fallthrough;
  1222. case DMA_TRANS_ABORTED:
  1223. {
  1224. struct ntb_transport_qp *qp = entry->qp;
  1225. void *offset = qp->rx_buff + qp->rx_max_frame *
  1226. qp->rx_index;
  1227. ntb_memcpy_rx(entry, offset);
  1228. qp->rx_memcpy++;
  1229. return;
  1230. }
  1231. case DMA_TRANS_NOERROR:
  1232. default:
  1233. break;
  1234. }
  1235. }
  1236. entry->flags |= DESC_DONE_FLAG;
  1237. ntb_complete_rxc(entry->qp);
  1238. }
  1239. static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset)
  1240. {
  1241. void *buf = entry->buf;
  1242. size_t len = entry->len;
  1243. memcpy(buf, offset, len);
  1244. /* Ensure that the data is fully copied out before clearing the flag */
  1245. wmb();
  1246. ntb_rx_copy_callback(entry, NULL);
  1247. }
  1248. static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset)
  1249. {
  1250. struct dma_async_tx_descriptor *txd;
  1251. struct ntb_transport_qp *qp = entry->qp;
  1252. struct dma_chan *chan = qp->rx_dma_chan;
  1253. struct dma_device *device;
  1254. size_t pay_off, buff_off, len;
  1255. struct dmaengine_unmap_data *unmap;
  1256. dma_cookie_t cookie;
  1257. void *buf = entry->buf;
  1258. len = entry->len;
  1259. device = chan->device;
  1260. pay_off = (size_t)offset & ~PAGE_MASK;
  1261. buff_off = (size_t)buf & ~PAGE_MASK;
  1262. if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
  1263. goto err;
  1264. unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
  1265. if (!unmap)
  1266. goto err;
  1267. unmap->len = len;
  1268. unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
  1269. pay_off, len, DMA_TO_DEVICE);
  1270. if (dma_mapping_error(device->dev, unmap->addr[0]))
  1271. goto err_get_unmap;
  1272. unmap->to_cnt = 1;
  1273. unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
  1274. buff_off, len, DMA_FROM_DEVICE);
  1275. if (dma_mapping_error(device->dev, unmap->addr[1]))
  1276. goto err_get_unmap;
  1277. unmap->from_cnt = 1;
  1278. txd = device->device_prep_dma_memcpy(chan, unmap->addr[1],
  1279. unmap->addr[0], len,
  1280. DMA_PREP_INTERRUPT);
  1281. if (!txd)
  1282. goto err_get_unmap;
  1283. txd->callback_result = ntb_rx_copy_callback;
  1284. txd->callback_param = entry;
  1285. dma_set_unmap(txd, unmap);
  1286. cookie = dmaengine_submit(txd);
  1287. if (dma_submit_error(cookie))
  1288. goto err_set_unmap;
  1289. dmaengine_unmap_put(unmap);
  1290. qp->last_cookie = cookie;
  1291. qp->rx_async++;
  1292. return 0;
  1293. err_set_unmap:
  1294. dmaengine_unmap_put(unmap);
  1295. err_get_unmap:
  1296. dmaengine_unmap_put(unmap);
  1297. err:
  1298. return -ENXIO;
  1299. }
  1300. static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset)
  1301. {
  1302. struct ntb_transport_qp *qp = entry->qp;
  1303. struct dma_chan *chan = qp->rx_dma_chan;
  1304. int res;
  1305. if (!chan)
  1306. goto err;
  1307. if (entry->len < copy_bytes)
  1308. goto err;
  1309. res = ntb_async_rx_submit(entry, offset);
  1310. if (res < 0)
  1311. goto err;
  1312. if (!entry->retries)
  1313. qp->rx_async++;
  1314. return;
  1315. err:
  1316. ntb_memcpy_rx(entry, offset);
  1317. qp->rx_memcpy++;
  1318. }
  1319. static int ntb_process_rxc(struct ntb_transport_qp *qp)
  1320. {
  1321. struct ntb_payload_header *hdr;
  1322. struct ntb_queue_entry *entry;
  1323. void *offset;
  1324. offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
  1325. hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
  1326. dev_dbg(&qp->ndev->pdev->dev, "qp %d: RX ver %u len %d flags %x\n",
  1327. qp->qp_num, hdr->ver, hdr->len, hdr->flags);
  1328. if (!(hdr->flags & DESC_DONE_FLAG)) {
  1329. dev_dbg(&qp->ndev->pdev->dev, "done flag not set\n");
  1330. qp->rx_ring_empty++;
  1331. return -EAGAIN;
  1332. }
  1333. if (hdr->flags & LINK_DOWN_FLAG) {
  1334. dev_dbg(&qp->ndev->pdev->dev, "link down flag set\n");
  1335. ntb_qp_link_down(qp);
  1336. hdr->flags = 0;
  1337. return -EAGAIN;
  1338. }
  1339. if (hdr->ver != (u32)qp->rx_pkts) {
  1340. dev_dbg(&qp->ndev->pdev->dev,
  1341. "version mismatch, expected %llu - got %u\n",
  1342. qp->rx_pkts, hdr->ver);
  1343. qp->rx_err_ver++;
  1344. return -EIO;
  1345. }
  1346. entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
  1347. if (!entry) {
  1348. dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
  1349. qp->rx_err_no_buf++;
  1350. return -EAGAIN;
  1351. }
  1352. entry->rx_hdr = hdr;
  1353. entry->rx_index = qp->rx_index;
  1354. if (hdr->len > entry->len) {
  1355. dev_dbg(&qp->ndev->pdev->dev,
  1356. "receive buffer overflow! Wanted %d got %d\n",
  1357. hdr->len, entry->len);
  1358. qp->rx_err_oflow++;
  1359. entry->len = -EIO;
  1360. entry->flags |= DESC_DONE_FLAG;
  1361. ntb_complete_rxc(qp);
  1362. } else {
  1363. dev_dbg(&qp->ndev->pdev->dev,
  1364. "RX OK index %u ver %u size %d into buf size %d\n",
  1365. qp->rx_index, hdr->ver, hdr->len, entry->len);
  1366. qp->rx_bytes += hdr->len;
  1367. qp->rx_pkts++;
  1368. entry->len = hdr->len;
  1369. ntb_async_rx(entry, offset);
  1370. }
  1371. qp->rx_index++;
  1372. qp->rx_index %= qp->rx_max_entry;
  1373. return 0;
  1374. }
  1375. static void ntb_transport_rxc_db(unsigned long data)
  1376. {
  1377. struct ntb_transport_qp *qp = (void *)data;
  1378. int rc, i;
  1379. dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
  1380. __func__, qp->qp_num);
  1381. /* Limit the number of packets processed in a single interrupt to
  1382. * provide fairness to others
  1383. */
  1384. for (i = 0; i < qp->rx_max_entry; i++) {
  1385. rc = ntb_process_rxc(qp);
  1386. if (rc)
  1387. break;
  1388. }
  1389. if (i && qp->rx_dma_chan)
  1390. dma_async_issue_pending(qp->rx_dma_chan);
  1391. if (i == qp->rx_max_entry) {
  1392. /* there is more work to do */
  1393. if (qp->active)
  1394. tasklet_schedule(&qp->rxc_db_work);
  1395. } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) {
  1396. /* the doorbell bit is set: clear it */
  1397. ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num));
  1398. /* ntb_db_read ensures ntb_db_clear write is committed */
  1399. ntb_db_read(qp->ndev);
  1400. /* an interrupt may have arrived between finishing
  1401. * ntb_process_rxc and clearing the doorbell bit:
  1402. * there might be some more work to do.
  1403. */
  1404. if (qp->active)
  1405. tasklet_schedule(&qp->rxc_db_work);
  1406. }
  1407. }
  1408. static void ntb_tx_copy_callback(void *data,
  1409. const struct dmaengine_result *res)
  1410. {
  1411. struct ntb_queue_entry *entry = data;
  1412. struct ntb_transport_qp *qp = entry->qp;
  1413. struct ntb_payload_header __iomem *hdr = entry->tx_hdr;
  1414. /* we need to check DMA results if we are using DMA */
  1415. if (res) {
  1416. enum dmaengine_tx_result dma_err = res->result;
  1417. switch (dma_err) {
  1418. case DMA_TRANS_READ_FAILED:
  1419. case DMA_TRANS_WRITE_FAILED:
  1420. entry->errors++;
  1421. fallthrough;
  1422. case DMA_TRANS_ABORTED:
  1423. {
  1424. void __iomem *offset =
  1425. qp->tx_mw + qp->tx_max_frame *
  1426. entry->tx_index;
  1427. /* resubmit via CPU */
  1428. ntb_memcpy_tx(entry, offset);
  1429. qp->tx_memcpy++;
  1430. return;
  1431. }
  1432. case DMA_TRANS_NOERROR:
  1433. default:
  1434. break;
  1435. }
  1436. }
  1437. iowrite32(entry->flags | DESC_DONE_FLAG, &hdr->flags);
  1438. if (qp->use_msi)
  1439. ntb_msi_peer_trigger(qp->ndev, PIDX, &qp->peer_msi_desc);
  1440. else
  1441. ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num));
  1442. /* The entry length can only be zero if the packet is intended to be a
  1443. * "link down" or similar. Since no payload is being sent in these
  1444. * cases, there is nothing to add to the completion queue.
  1445. */
  1446. if (entry->len > 0) {
  1447. qp->tx_bytes += entry->len;
  1448. if (qp->tx_handler)
  1449. qp->tx_handler(qp, qp->cb_data, entry->cb_data,
  1450. entry->len);
  1451. }
  1452. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry, &qp->tx_free_q);
  1453. }
  1454. static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
  1455. {
  1456. #ifdef ARCH_HAS_NOCACHE_UACCESS
  1457. /*
  1458. * Using non-temporal mov to improve performance on non-cached
  1459. * writes, even though we aren't actually copying from user space.
  1460. */
  1461. __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
  1462. #else
  1463. memcpy_toio(offset, entry->buf, entry->len);
  1464. #endif
  1465. /* Ensure that the data is fully copied out before setting the flags */
  1466. wmb();
  1467. ntb_tx_copy_callback(entry, NULL);
  1468. }
  1469. static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
  1470. struct ntb_queue_entry *entry)
  1471. {
  1472. struct dma_async_tx_descriptor *txd;
  1473. struct dma_chan *chan = qp->tx_dma_chan;
  1474. struct dma_device *device;
  1475. size_t len = entry->len;
  1476. void *buf = entry->buf;
  1477. size_t dest_off, buff_off;
  1478. struct dmaengine_unmap_data *unmap;
  1479. dma_addr_t dest;
  1480. dma_cookie_t cookie;
  1481. device = chan->device;
  1482. dest = qp->tx_mw_dma_addr + qp->tx_max_frame * entry->tx_index;
  1483. buff_off = (size_t)buf & ~PAGE_MASK;
  1484. dest_off = (size_t)dest & ~PAGE_MASK;
  1485. if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
  1486. goto err;
  1487. unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
  1488. if (!unmap)
  1489. goto err;
  1490. unmap->len = len;
  1491. unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
  1492. buff_off, len, DMA_TO_DEVICE);
  1493. if (dma_mapping_error(device->dev, unmap->addr[0]))
  1494. goto err_get_unmap;
  1495. unmap->to_cnt = 1;
  1496. txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len,
  1497. DMA_PREP_INTERRUPT);
  1498. if (!txd)
  1499. goto err_get_unmap;
  1500. txd->callback_result = ntb_tx_copy_callback;
  1501. txd->callback_param = entry;
  1502. dma_set_unmap(txd, unmap);
  1503. cookie = dmaengine_submit(txd);
  1504. if (dma_submit_error(cookie))
  1505. goto err_set_unmap;
  1506. dmaengine_unmap_put(unmap);
  1507. dma_async_issue_pending(chan);
  1508. return 0;
  1509. err_set_unmap:
  1510. dmaengine_unmap_put(unmap);
  1511. err_get_unmap:
  1512. dmaengine_unmap_put(unmap);
  1513. err:
  1514. return -ENXIO;
  1515. }
  1516. static void ntb_async_tx(struct ntb_transport_qp *qp,
  1517. struct ntb_queue_entry *entry)
  1518. {
  1519. struct ntb_payload_header __iomem *hdr;
  1520. struct dma_chan *chan = qp->tx_dma_chan;
  1521. void __iomem *offset;
  1522. int res;
  1523. entry->tx_index = qp->tx_index;
  1524. offset = qp->tx_mw + qp->tx_max_frame * entry->tx_index;
  1525. hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
  1526. entry->tx_hdr = hdr;
  1527. iowrite32(entry->len, &hdr->len);
  1528. iowrite32((u32)qp->tx_pkts, &hdr->ver);
  1529. if (!chan)
  1530. goto err;
  1531. if (entry->len < copy_bytes)
  1532. goto err;
  1533. res = ntb_async_tx_submit(qp, entry);
  1534. if (res < 0)
  1535. goto err;
  1536. if (!entry->retries)
  1537. qp->tx_async++;
  1538. return;
  1539. err:
  1540. ntb_memcpy_tx(entry, offset);
  1541. qp->tx_memcpy++;
  1542. }
  1543. static int ntb_process_tx(struct ntb_transport_qp *qp,
  1544. struct ntb_queue_entry *entry)
  1545. {
  1546. if (!ntb_transport_tx_free_entry(qp)) {
  1547. qp->tx_ring_full++;
  1548. return -EAGAIN;
  1549. }
  1550. if (entry->len > qp->tx_max_frame - sizeof(struct ntb_payload_header)) {
  1551. if (qp->tx_handler)
  1552. qp->tx_handler(qp, qp->cb_data, NULL, -EIO);
  1553. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1554. &qp->tx_free_q);
  1555. return 0;
  1556. }
  1557. ntb_async_tx(qp, entry);
  1558. qp->tx_index++;
  1559. qp->tx_index %= qp->tx_max_entry;
  1560. qp->tx_pkts++;
  1561. return 0;
  1562. }
  1563. static void ntb_send_link_down(struct ntb_transport_qp *qp)
  1564. {
  1565. struct pci_dev *pdev = qp->ndev->pdev;
  1566. struct ntb_queue_entry *entry;
  1567. int i, rc;
  1568. if (!qp->link_is_up)
  1569. return;
  1570. dev_info(&pdev->dev, "qp %d: Send Link Down\n", qp->qp_num);
  1571. for (i = 0; i < NTB_LINK_DOWN_TIMEOUT; i++) {
  1572. entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
  1573. if (entry)
  1574. break;
  1575. msleep(100);
  1576. }
  1577. if (!entry)
  1578. return;
  1579. entry->cb_data = NULL;
  1580. entry->buf = NULL;
  1581. entry->len = 0;
  1582. entry->flags = LINK_DOWN_FLAG;
  1583. rc = ntb_process_tx(qp, entry);
  1584. if (rc)
  1585. dev_err(&pdev->dev, "ntb: QP%d unable to send linkdown msg\n",
  1586. qp->qp_num);
  1587. ntb_qp_link_down_reset(qp);
  1588. }
  1589. static bool ntb_dma_filter_fn(struct dma_chan *chan, void *node)
  1590. {
  1591. return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
  1592. }
  1593. /**
  1594. * ntb_transport_create_queue - Create a new NTB transport layer queue
  1595. * @data: pointer for callback data
  1596. * @client_dev: &struct device pointer
  1597. * @handlers: pointer to various ntb queue (callback) handlers
  1598. *
  1599. * Create a new NTB transport layer queue and provide the queue with a callback
  1600. * routine for both transmit and receive. The receive callback routine will be
  1601. * used to pass up data when the transport has received it on the queue. The
  1602. * transmit callback routine will be called when the transport has completed the
  1603. * transmission of the data on the queue and the data is ready to be freed.
  1604. *
  1605. * RETURNS: pointer to newly created ntb_queue, NULL on error.
  1606. */
  1607. struct ntb_transport_qp *
  1608. ntb_transport_create_queue(void *data, struct device *client_dev,
  1609. const struct ntb_queue_handlers *handlers)
  1610. {
  1611. struct ntb_dev *ndev;
  1612. struct pci_dev *pdev;
  1613. struct ntb_transport_ctx *nt;
  1614. struct ntb_queue_entry *entry;
  1615. struct ntb_transport_qp *qp;
  1616. u64 qp_bit;
  1617. unsigned int free_queue;
  1618. dma_cap_mask_t dma_mask;
  1619. int node;
  1620. int i;
  1621. ndev = dev_ntb(client_dev->parent);
  1622. pdev = ndev->pdev;
  1623. nt = ndev->ctx;
  1624. node = dev_to_node(&ndev->dev);
  1625. free_queue = ffs(nt->qp_bitmap_free);
  1626. if (!free_queue)
  1627. goto err;
  1628. /* decrement free_queue to make it zero based */
  1629. free_queue--;
  1630. qp = &nt->qp_vec[free_queue];
  1631. qp_bit = BIT_ULL(qp->qp_num);
  1632. nt->qp_bitmap_free &= ~qp_bit;
  1633. qp->cb_data = data;
  1634. qp->rx_handler = handlers->rx_handler;
  1635. qp->tx_handler = handlers->tx_handler;
  1636. qp->event_handler = handlers->event_handler;
  1637. dma_cap_zero(dma_mask);
  1638. dma_cap_set(DMA_MEMCPY, dma_mask);
  1639. if (use_dma) {
  1640. qp->tx_dma_chan =
  1641. dma_request_channel(dma_mask, ntb_dma_filter_fn,
  1642. (void *)(unsigned long)node);
  1643. if (!qp->tx_dma_chan)
  1644. dev_info(&pdev->dev, "Unable to allocate TX DMA channel\n");
  1645. qp->rx_dma_chan =
  1646. dma_request_channel(dma_mask, ntb_dma_filter_fn,
  1647. (void *)(unsigned long)node);
  1648. if (!qp->rx_dma_chan)
  1649. dev_info(&pdev->dev, "Unable to allocate RX DMA channel\n");
  1650. } else {
  1651. qp->tx_dma_chan = NULL;
  1652. qp->rx_dma_chan = NULL;
  1653. }
  1654. qp->tx_mw_dma_addr = 0;
  1655. if (qp->tx_dma_chan) {
  1656. qp->tx_mw_dma_addr =
  1657. dma_map_resource(qp->tx_dma_chan->device->dev,
  1658. qp->tx_mw_phys, qp->tx_mw_size,
  1659. DMA_FROM_DEVICE, 0);
  1660. if (dma_mapping_error(qp->tx_dma_chan->device->dev,
  1661. qp->tx_mw_dma_addr)) {
  1662. qp->tx_mw_dma_addr = 0;
  1663. goto err1;
  1664. }
  1665. }
  1666. dev_dbg(&pdev->dev, "Using %s memcpy for TX\n",
  1667. qp->tx_dma_chan ? "DMA" : "CPU");
  1668. dev_dbg(&pdev->dev, "Using %s memcpy for RX\n",
  1669. qp->rx_dma_chan ? "DMA" : "CPU");
  1670. for (i = 0; i < NTB_QP_DEF_NUM_ENTRIES; i++) {
  1671. entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
  1672. if (!entry)
  1673. goto err1;
  1674. entry->qp = qp;
  1675. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
  1676. &qp->rx_free_q);
  1677. }
  1678. qp->rx_alloc_entry = NTB_QP_DEF_NUM_ENTRIES;
  1679. for (i = 0; i < qp->tx_max_entry; i++) {
  1680. entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
  1681. if (!entry)
  1682. goto err2;
  1683. entry->qp = qp;
  1684. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1685. &qp->tx_free_q);
  1686. }
  1687. ntb_db_clear(qp->ndev, qp_bit);
  1688. ntb_db_clear_mask(qp->ndev, qp_bit);
  1689. dev_info(&pdev->dev, "NTB Transport QP %d created\n", qp->qp_num);
  1690. return qp;
  1691. err2:
  1692. while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
  1693. kfree(entry);
  1694. err1:
  1695. qp->rx_alloc_entry = 0;
  1696. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
  1697. kfree(entry);
  1698. if (qp->tx_mw_dma_addr)
  1699. dma_unmap_resource(qp->tx_dma_chan->device->dev,
  1700. qp->tx_mw_dma_addr, qp->tx_mw_size,
  1701. DMA_FROM_DEVICE, 0);
  1702. if (qp->tx_dma_chan)
  1703. dma_release_channel(qp->tx_dma_chan);
  1704. if (qp->rx_dma_chan)
  1705. dma_release_channel(qp->rx_dma_chan);
  1706. nt->qp_bitmap_free |= qp_bit;
  1707. err:
  1708. return NULL;
  1709. }
  1710. EXPORT_SYMBOL_GPL(ntb_transport_create_queue);
  1711. /**
  1712. * ntb_transport_free_queue - Frees NTB transport queue
  1713. * @qp: NTB queue to be freed
  1714. *
  1715. * Frees NTB transport queue
  1716. */
  1717. void ntb_transport_free_queue(struct ntb_transport_qp *qp)
  1718. {
  1719. struct pci_dev *pdev;
  1720. struct ntb_queue_entry *entry;
  1721. u64 qp_bit;
  1722. if (!qp)
  1723. return;
  1724. pdev = qp->ndev->pdev;
  1725. qp->active = false;
  1726. if (qp->tx_dma_chan) {
  1727. struct dma_chan *chan = qp->tx_dma_chan;
  1728. /* Putting the dma_chan to NULL will force any new traffic to be
  1729. * processed by the CPU instead of the DAM engine
  1730. */
  1731. qp->tx_dma_chan = NULL;
  1732. /* Try to be nice and wait for any queued DMA engine
  1733. * transactions to process before smashing it with a rock
  1734. */
  1735. dma_sync_wait(chan, qp->last_cookie);
  1736. dmaengine_terminate_all(chan);
  1737. dma_unmap_resource(chan->device->dev,
  1738. qp->tx_mw_dma_addr, qp->tx_mw_size,
  1739. DMA_FROM_DEVICE, 0);
  1740. dma_release_channel(chan);
  1741. }
  1742. if (qp->rx_dma_chan) {
  1743. struct dma_chan *chan = qp->rx_dma_chan;
  1744. /* Putting the dma_chan to NULL will force any new traffic to be
  1745. * processed by the CPU instead of the DAM engine
  1746. */
  1747. qp->rx_dma_chan = NULL;
  1748. /* Try to be nice and wait for any queued DMA engine
  1749. * transactions to process before smashing it with a rock
  1750. */
  1751. dma_sync_wait(chan, qp->last_cookie);
  1752. dmaengine_terminate_all(chan);
  1753. dma_release_channel(chan);
  1754. }
  1755. qp_bit = BIT_ULL(qp->qp_num);
  1756. ntb_db_set_mask(qp->ndev, qp_bit);
  1757. tasklet_kill(&qp->rxc_db_work);
  1758. cancel_delayed_work_sync(&qp->link_work);
  1759. qp->cb_data = NULL;
  1760. qp->rx_handler = NULL;
  1761. qp->tx_handler = NULL;
  1762. qp->event_handler = NULL;
  1763. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
  1764. kfree(entry);
  1765. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
  1766. dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
  1767. kfree(entry);
  1768. }
  1769. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
  1770. dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
  1771. kfree(entry);
  1772. }
  1773. while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
  1774. kfree(entry);
  1775. qp->transport->qp_bitmap_free |= qp_bit;
  1776. dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
  1777. }
  1778. EXPORT_SYMBOL_GPL(ntb_transport_free_queue);
  1779. /**
  1780. * ntb_transport_rx_remove - Dequeues enqueued rx packet
  1781. * @qp: NTB queue to be freed
  1782. * @len: pointer to variable to write enqueued buffers length
  1783. *
  1784. * Dequeues unused buffers from receive queue. Should only be used during
  1785. * shutdown of qp.
  1786. *
  1787. * RETURNS: NULL error value on error, or void* for success.
  1788. */
  1789. void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len)
  1790. {
  1791. struct ntb_queue_entry *entry;
  1792. void *buf;
  1793. if (!qp || qp->client_ready)
  1794. return NULL;
  1795. entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
  1796. if (!entry)
  1797. return NULL;
  1798. buf = entry->cb_data;
  1799. *len = entry->len;
  1800. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
  1801. return buf;
  1802. }
  1803. EXPORT_SYMBOL_GPL(ntb_transport_rx_remove);
  1804. /**
  1805. * ntb_transport_rx_enqueue - Enqueue a new NTB queue entry
  1806. * @qp: NTB transport layer queue the entry is to be enqueued on
  1807. * @cb: per buffer pointer for callback function to use
  1808. * @data: pointer to data buffer that incoming packets will be copied into
  1809. * @len: length of the data buffer
  1810. *
  1811. * Enqueue a new receive buffer onto the transport queue into which a NTB
  1812. * payload can be received into.
  1813. *
  1814. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  1815. */
  1816. int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
  1817. unsigned int len)
  1818. {
  1819. struct ntb_queue_entry *entry;
  1820. if (!qp)
  1821. return -EINVAL;
  1822. entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
  1823. if (!entry)
  1824. return -ENOMEM;
  1825. entry->cb_data = cb;
  1826. entry->buf = data;
  1827. entry->len = len;
  1828. entry->flags = 0;
  1829. entry->retries = 0;
  1830. entry->errors = 0;
  1831. entry->rx_index = 0;
  1832. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
  1833. if (qp->active)
  1834. tasklet_schedule(&qp->rxc_db_work);
  1835. return 0;
  1836. }
  1837. EXPORT_SYMBOL_GPL(ntb_transport_rx_enqueue);
  1838. /**
  1839. * ntb_transport_tx_enqueue - Enqueue a new NTB queue entry
  1840. * @qp: NTB transport layer queue the entry is to be enqueued on
  1841. * @cb: per buffer pointer for callback function to use
  1842. * @data: pointer to data buffer that will be sent
  1843. * @len: length of the data buffer
  1844. *
  1845. * Enqueue a new transmit buffer onto the transport queue from which a NTB
  1846. * payload will be transmitted. This assumes that a lock is being held to
  1847. * serialize access to the qp.
  1848. *
  1849. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  1850. */
  1851. int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
  1852. unsigned int len)
  1853. {
  1854. struct ntb_queue_entry *entry;
  1855. int rc;
  1856. if (!qp || !len)
  1857. return -EINVAL;
  1858. /* If the qp link is down already, just ignore. */
  1859. if (!qp->link_is_up)
  1860. return 0;
  1861. entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
  1862. if (!entry) {
  1863. qp->tx_err_no_buf++;
  1864. return -EBUSY;
  1865. }
  1866. entry->cb_data = cb;
  1867. entry->buf = data;
  1868. entry->len = len;
  1869. entry->flags = 0;
  1870. entry->errors = 0;
  1871. entry->retries = 0;
  1872. entry->tx_index = 0;
  1873. rc = ntb_process_tx(qp, entry);
  1874. if (rc)
  1875. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1876. &qp->tx_free_q);
  1877. return rc;
  1878. }
  1879. EXPORT_SYMBOL_GPL(ntb_transport_tx_enqueue);
  1880. /**
  1881. * ntb_transport_link_up - Notify NTB transport of client readiness to use queue
  1882. * @qp: NTB transport layer queue to be enabled
  1883. *
  1884. * Notify NTB transport layer of client readiness to use queue
  1885. */
  1886. void ntb_transport_link_up(struct ntb_transport_qp *qp)
  1887. {
  1888. if (!qp)
  1889. return;
  1890. qp->client_ready = true;
  1891. if (qp->transport->link_is_up)
  1892. schedule_delayed_work(&qp->link_work, 0);
  1893. }
  1894. EXPORT_SYMBOL_GPL(ntb_transport_link_up);
  1895. /**
  1896. * ntb_transport_link_down - Notify NTB transport to no longer enqueue data
  1897. * @qp: NTB transport layer queue to be disabled
  1898. *
  1899. * Notify NTB transport layer of client's desire to no longer receive data on
  1900. * transport queue specified. It is the client's responsibility to ensure all
  1901. * entries on queue are purged or otherwise handled appropriately.
  1902. */
  1903. void ntb_transport_link_down(struct ntb_transport_qp *qp)
  1904. {
  1905. int val;
  1906. if (!qp)
  1907. return;
  1908. qp->client_ready = false;
  1909. val = ntb_spad_read(qp->ndev, QP_LINKS);
  1910. ntb_peer_spad_write(qp->ndev, PIDX, QP_LINKS, val & ~BIT(qp->qp_num));
  1911. if (qp->link_is_up)
  1912. ntb_send_link_down(qp);
  1913. else
  1914. cancel_delayed_work_sync(&qp->link_work);
  1915. }
  1916. EXPORT_SYMBOL_GPL(ntb_transport_link_down);
  1917. /**
  1918. * ntb_transport_link_query - Query transport link state
  1919. * @qp: NTB transport layer queue to be queried
  1920. *
  1921. * Query connectivity to the remote system of the NTB transport queue
  1922. *
  1923. * RETURNS: true for link up or false for link down
  1924. */
  1925. bool ntb_transport_link_query(struct ntb_transport_qp *qp)
  1926. {
  1927. if (!qp)
  1928. return false;
  1929. return qp->link_is_up;
  1930. }
  1931. EXPORT_SYMBOL_GPL(ntb_transport_link_query);
  1932. /**
  1933. * ntb_transport_qp_num - Query the qp number
  1934. * @qp: NTB transport layer queue to be queried
  1935. *
  1936. * Query qp number of the NTB transport queue
  1937. *
  1938. * RETURNS: a zero based number specifying the qp number
  1939. */
  1940. unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp)
  1941. {
  1942. if (!qp)
  1943. return 0;
  1944. return qp->qp_num;
  1945. }
  1946. EXPORT_SYMBOL_GPL(ntb_transport_qp_num);
  1947. /**
  1948. * ntb_transport_max_size - Query the max payload size of a qp
  1949. * @qp: NTB transport layer queue to be queried
  1950. *
  1951. * Query the maximum payload size permissible on the given qp
  1952. *
  1953. * RETURNS: the max payload size of a qp
  1954. */
  1955. unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp)
  1956. {
  1957. unsigned int max_size;
  1958. unsigned int copy_align;
  1959. struct dma_chan *rx_chan, *tx_chan;
  1960. if (!qp)
  1961. return 0;
  1962. rx_chan = qp->rx_dma_chan;
  1963. tx_chan = qp->tx_dma_chan;
  1964. copy_align = max(rx_chan ? rx_chan->device->copy_align : 0,
  1965. tx_chan ? tx_chan->device->copy_align : 0);
  1966. /* If DMA engine usage is possible, try to find the max size for that */
  1967. max_size = qp->tx_max_frame - sizeof(struct ntb_payload_header);
  1968. max_size = round_down(max_size, 1 << copy_align);
  1969. return max_size;
  1970. }
  1971. EXPORT_SYMBOL_GPL(ntb_transport_max_size);
  1972. unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp)
  1973. {
  1974. unsigned int head = qp->tx_index;
  1975. unsigned int tail = qp->remote_rx_info->entry;
  1976. return tail >= head ? tail - head : qp->tx_max_entry + tail - head;
  1977. }
  1978. EXPORT_SYMBOL_GPL(ntb_transport_tx_free_entry);
  1979. static void ntb_transport_doorbell_callback(void *data, int vector)
  1980. {
  1981. struct ntb_transport_ctx *nt = data;
  1982. struct ntb_transport_qp *qp;
  1983. u64 db_bits;
  1984. unsigned int qp_num;
  1985. if (ntb_db_read(nt->ndev) & nt->msi_db_mask) {
  1986. ntb_transport_msi_peer_desc_changed(nt);
  1987. ntb_db_clear(nt->ndev, nt->msi_db_mask);
  1988. }
  1989. db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free &
  1990. ntb_db_vector_mask(nt->ndev, vector));
  1991. while (db_bits) {
  1992. qp_num = __ffs(db_bits);
  1993. qp = &nt->qp_vec[qp_num];
  1994. if (qp->active)
  1995. tasklet_schedule(&qp->rxc_db_work);
  1996. db_bits &= ~BIT_ULL(qp_num);
  1997. }
  1998. }
  1999. static const struct ntb_ctx_ops ntb_transport_ops = {
  2000. .link_event = ntb_transport_event_callback,
  2001. .db_event = ntb_transport_doorbell_callback,
  2002. };
  2003. static struct ntb_client ntb_transport_client = {
  2004. .ops = {
  2005. .probe = ntb_transport_probe,
  2006. .remove = ntb_transport_free,
  2007. },
  2008. };
  2009. static int __init ntb_transport_init(void)
  2010. {
  2011. int rc;
  2012. pr_info("%s, version %s\n", NTB_TRANSPORT_DESC, NTB_TRANSPORT_VER);
  2013. if (debugfs_initialized())
  2014. nt_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
  2015. rc = bus_register(&ntb_transport_bus);
  2016. if (rc)
  2017. goto err_bus;
  2018. rc = ntb_register_client(&ntb_transport_client);
  2019. if (rc)
  2020. goto err_client;
  2021. return 0;
  2022. err_client:
  2023. bus_unregister(&ntb_transport_bus);
  2024. err_bus:
  2025. debugfs_remove_recursive(nt_debugfs_dir);
  2026. return rc;
  2027. }
  2028. module_init(ntb_transport_init);
  2029. static void __exit ntb_transport_exit(void)
  2030. {
  2031. ntb_unregister_client(&ntb_transport_client);
  2032. bus_unregister(&ntb_transport_bus);
  2033. debugfs_remove_recursive(nt_debugfs_dir);
  2034. }
  2035. module_exit(ntb_transport_exit);