rave-sp-eeprom.c 9.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * EEPROM driver for RAVE SP
  4. *
  5. * Copyright (C) 2018 Zodiac Inflight Innovations
  6. *
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/mfd/rave-sp.h>
  10. #include <linux/module.h>
  11. #include <linux/nvmem-provider.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/sizes.h>
  15. /**
  16. * enum rave_sp_eeprom_access_type - Supported types of EEPROM access
  17. *
  18. * @RAVE_SP_EEPROM_WRITE: EEPROM write
  19. * @RAVE_SP_EEPROM_READ: EEPROM read
  20. */
  21. enum rave_sp_eeprom_access_type {
  22. RAVE_SP_EEPROM_WRITE = 0,
  23. RAVE_SP_EEPROM_READ = 1,
  24. };
  25. /**
  26. * enum rave_sp_eeprom_header_size - EEPROM command header sizes
  27. *
  28. * @RAVE_SP_EEPROM_HEADER_SMALL: EEPROM header size for "small" devices (< 8K)
  29. * @RAVE_SP_EEPROM_HEADER_BIG: EEPROM header size for "big" devices (> 8K)
  30. */
  31. enum rave_sp_eeprom_header_size {
  32. RAVE_SP_EEPROM_HEADER_SMALL = 4U,
  33. RAVE_SP_EEPROM_HEADER_BIG = 5U,
  34. };
  35. #define RAVE_SP_EEPROM_HEADER_MAX RAVE_SP_EEPROM_HEADER_BIG
  36. #define RAVE_SP_EEPROM_PAGE_SIZE 32U
  37. /**
  38. * struct rave_sp_eeprom_page - RAVE SP EEPROM page
  39. *
  40. * @type: Access type (see enum rave_sp_eeprom_access_type)
  41. * @success: Success flag (Success = 1, Failure = 0)
  42. * @data: Read data
  43. *
  44. * Note this structure corresponds to RSP_*_EEPROM payload from RAVE
  45. * SP ICD
  46. */
  47. struct rave_sp_eeprom_page {
  48. u8 type;
  49. u8 success;
  50. u8 data[RAVE_SP_EEPROM_PAGE_SIZE];
  51. } __packed;
  52. /**
  53. * struct rave_sp_eeprom - RAVE SP EEPROM device
  54. *
  55. * @sp: Pointer to parent RAVE SP device
  56. * @mutex: Lock protecting access to EEPROM
  57. * @address: EEPROM device address
  58. * @header_size: Size of EEPROM command header for this device
  59. * @dev: Pointer to corresponding struct device used for logging
  60. */
  61. struct rave_sp_eeprom {
  62. struct rave_sp *sp;
  63. struct mutex mutex;
  64. u8 address;
  65. unsigned int header_size;
  66. struct device *dev;
  67. };
  68. /**
  69. * rave_sp_eeprom_io - Low-level part of EEPROM page access
  70. *
  71. * @eeprom: EEPROM device to write to
  72. * @type: EEPROM access type (read or write)
  73. * @idx: number of the EEPROM page
  74. * @page: Data to write or buffer to store result (via page->data)
  75. *
  76. * This function does all of the low-level work required to perform a
  77. * EEPROM access. This includes formatting correct command payload,
  78. * sending it and checking received results.
  79. *
  80. * Returns zero in case of success or negative error code in
  81. * case of failure.
  82. */
  83. static int rave_sp_eeprom_io(struct rave_sp_eeprom *eeprom,
  84. enum rave_sp_eeprom_access_type type,
  85. u16 idx,
  86. struct rave_sp_eeprom_page *page)
  87. {
  88. const bool is_write = type == RAVE_SP_EEPROM_WRITE;
  89. const unsigned int data_size = is_write ? sizeof(page->data) : 0;
  90. const unsigned int cmd_size = eeprom->header_size + data_size;
  91. const unsigned int rsp_size =
  92. is_write ? sizeof(*page) - sizeof(page->data) : sizeof(*page);
  93. unsigned int offset = 0;
  94. u8 cmd[RAVE_SP_EEPROM_HEADER_MAX + sizeof(page->data)];
  95. int ret;
  96. if (WARN_ON(cmd_size > sizeof(cmd)))
  97. return -EINVAL;
  98. cmd[offset++] = eeprom->address;
  99. cmd[offset++] = 0;
  100. cmd[offset++] = type;
  101. cmd[offset++] = idx;
  102. /*
  103. * If there's still room in this command's header it means we
  104. * are talkin to EEPROM that uses 16-bit page numbers and we
  105. * have to specify index's MSB in payload as well.
  106. */
  107. if (offset < eeprom->header_size)
  108. cmd[offset++] = idx >> 8;
  109. /*
  110. * Copy our data to write to command buffer first. In case of
  111. * a read data_size should be zero and memcpy would become a
  112. * no-op
  113. */
  114. memcpy(&cmd[offset], page->data, data_size);
  115. ret = rave_sp_exec(eeprom->sp, cmd, cmd_size, page, rsp_size);
  116. if (ret)
  117. return ret;
  118. if (page->type != type)
  119. return -EPROTO;
  120. if (!page->success)
  121. return -EIO;
  122. return 0;
  123. }
  124. /**
  125. * rave_sp_eeprom_page_access - Access single EEPROM page
  126. *
  127. * @eeprom: EEPROM device to access
  128. * @type: Access type to perform (read or write)
  129. * @offset: Offset within EEPROM to access
  130. * @data: Data buffer
  131. * @data_len: Size of the data buffer
  132. *
  133. * This function performs a generic access to a single page or a
  134. * portion thereof. Requested access MUST NOT cross the EEPROM page
  135. * boundary.
  136. *
  137. * Returns zero in case of success or negative error code in
  138. * case of failure.
  139. */
  140. static int
  141. rave_sp_eeprom_page_access(struct rave_sp_eeprom *eeprom,
  142. enum rave_sp_eeprom_access_type type,
  143. unsigned int offset, u8 *data,
  144. size_t data_len)
  145. {
  146. const unsigned int page_offset = offset % RAVE_SP_EEPROM_PAGE_SIZE;
  147. const unsigned int page_nr = offset / RAVE_SP_EEPROM_PAGE_SIZE;
  148. struct rave_sp_eeprom_page page;
  149. int ret;
  150. /*
  151. * This function will not work if data access we've been asked
  152. * to do is crossing EEPROM page boundary. Normally this
  153. * should never happen and getting here would indicate a bug
  154. * in the code.
  155. */
  156. if (WARN_ON(data_len > sizeof(page.data) - page_offset))
  157. return -EINVAL;
  158. if (type == RAVE_SP_EEPROM_WRITE) {
  159. /*
  160. * If doing a partial write we need to do a read first
  161. * to fill the rest of the page with correct data.
  162. */
  163. if (data_len < RAVE_SP_EEPROM_PAGE_SIZE) {
  164. ret = rave_sp_eeprom_io(eeprom, RAVE_SP_EEPROM_READ,
  165. page_nr, &page);
  166. if (ret)
  167. return ret;
  168. }
  169. memcpy(&page.data[page_offset], data, data_len);
  170. }
  171. ret = rave_sp_eeprom_io(eeprom, type, page_nr, &page);
  172. if (ret)
  173. return ret;
  174. /*
  175. * Since we receive the result of the read via 'page.data'
  176. * buffer we need to copy that to 'data'
  177. */
  178. if (type == RAVE_SP_EEPROM_READ)
  179. memcpy(data, &page.data[page_offset], data_len);
  180. return 0;
  181. }
  182. /**
  183. * rave_sp_eeprom_access - Access EEPROM data
  184. *
  185. * @eeprom: EEPROM device to access
  186. * @type: Access type to perform (read or write)
  187. * @offset: Offset within EEPROM to access
  188. * @data: Data buffer
  189. * @data_len: Size of the data buffer
  190. *
  191. * This function performs a generic access (either read or write) at
  192. * arbitrary offset (not necessary page aligned) of arbitrary length
  193. * (is not constrained by EEPROM page size).
  194. *
  195. * Returns zero in case of success or negative error code in case of
  196. * failure.
  197. */
  198. static int rave_sp_eeprom_access(struct rave_sp_eeprom *eeprom,
  199. enum rave_sp_eeprom_access_type type,
  200. unsigned int offset, u8 *data,
  201. unsigned int data_len)
  202. {
  203. unsigned int residue;
  204. unsigned int chunk;
  205. unsigned int head;
  206. int ret;
  207. mutex_lock(&eeprom->mutex);
  208. head = offset % RAVE_SP_EEPROM_PAGE_SIZE;
  209. residue = data_len;
  210. do {
  211. /*
  212. * First iteration, if we are doing an access that is
  213. * not 32-byte aligned, we need to access only data up
  214. * to a page boundary to avoid corssing it in
  215. * rave_sp_eeprom_page_access()
  216. */
  217. if (unlikely(head)) {
  218. chunk = RAVE_SP_EEPROM_PAGE_SIZE - head;
  219. /*
  220. * This can only happen once per
  221. * rave_sp_eeprom_access() call, so we set
  222. * head to zero to process all the other
  223. * iterations normally.
  224. */
  225. head = 0;
  226. } else {
  227. chunk = RAVE_SP_EEPROM_PAGE_SIZE;
  228. }
  229. /*
  230. * We should never read more that 'residue' bytes
  231. */
  232. chunk = min(chunk, residue);
  233. ret = rave_sp_eeprom_page_access(eeprom, type, offset,
  234. data, chunk);
  235. if (ret)
  236. goto out;
  237. residue -= chunk;
  238. offset += chunk;
  239. data += chunk;
  240. } while (residue);
  241. out:
  242. mutex_unlock(&eeprom->mutex);
  243. return ret;
  244. }
  245. static int rave_sp_eeprom_reg_read(void *eeprom, unsigned int offset,
  246. void *val, size_t bytes)
  247. {
  248. return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_READ,
  249. offset, val, bytes);
  250. }
  251. static int rave_sp_eeprom_reg_write(void *eeprom, unsigned int offset,
  252. void *val, size_t bytes)
  253. {
  254. return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_WRITE,
  255. offset, val, bytes);
  256. }
  257. static int rave_sp_eeprom_probe(struct platform_device *pdev)
  258. {
  259. struct device *dev = &pdev->dev;
  260. struct rave_sp *sp = dev_get_drvdata(dev->parent);
  261. struct device_node *np = dev->of_node;
  262. struct nvmem_config config = { 0 };
  263. struct rave_sp_eeprom *eeprom;
  264. struct nvmem_device *nvmem;
  265. u32 reg[2], size;
  266. if (of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg))) {
  267. dev_err(dev, "Failed to parse \"reg\" property\n");
  268. return -EINVAL;
  269. }
  270. size = reg[1];
  271. /*
  272. * Per ICD, we have no more than 2 bytes to specify EEPROM
  273. * page.
  274. */
  275. if (size > U16_MAX * RAVE_SP_EEPROM_PAGE_SIZE) {
  276. dev_err(dev, "Specified size is too big\n");
  277. return -EINVAL;
  278. }
  279. eeprom = devm_kzalloc(dev, sizeof(*eeprom), GFP_KERNEL);
  280. if (!eeprom)
  281. return -ENOMEM;
  282. eeprom->address = reg[0];
  283. eeprom->sp = sp;
  284. eeprom->dev = dev;
  285. if (size > SZ_8K)
  286. eeprom->header_size = RAVE_SP_EEPROM_HEADER_BIG;
  287. else
  288. eeprom->header_size = RAVE_SP_EEPROM_HEADER_SMALL;
  289. mutex_init(&eeprom->mutex);
  290. config.id = -1;
  291. of_property_read_string(np, "zii,eeprom-name", &config.name);
  292. config.priv = eeprom;
  293. config.dev = dev;
  294. config.add_legacy_fixed_of_cells = true;
  295. config.size = size;
  296. config.reg_read = rave_sp_eeprom_reg_read;
  297. config.reg_write = rave_sp_eeprom_reg_write;
  298. config.word_size = 1;
  299. config.stride = 1;
  300. nvmem = devm_nvmem_register(dev, &config);
  301. return PTR_ERR_OR_ZERO(nvmem);
  302. }
  303. static const struct of_device_id rave_sp_eeprom_of_match[] = {
  304. { .compatible = "zii,rave-sp-eeprom" },
  305. {}
  306. };
  307. MODULE_DEVICE_TABLE(of, rave_sp_eeprom_of_match);
  308. static struct platform_driver rave_sp_eeprom_driver = {
  309. .probe = rave_sp_eeprom_probe,
  310. .driver = {
  311. .name = KBUILD_MODNAME,
  312. .of_match_table = rave_sp_eeprom_of_match,
  313. },
  314. };
  315. module_platform_driver(rave_sp_eeprom_driver);
  316. MODULE_LICENSE("GPL");
  317. MODULE_AUTHOR("Andrey Vostrikov <andrey.vostrikov@cogentembedded.com>");
  318. MODULE_AUTHOR("Nikita Yushchenko <nikita.yoush@cogentembedded.com>");
  319. MODULE_AUTHOR("Andrey Smirnov <andrew.smirnov@gmail.com>");
  320. MODULE_DESCRIPTION("RAVE SP EEPROM driver");