sunxi_sid.c 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Allwinner sunXi SoCs Security ID support.
  4. *
  5. * Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
  6. * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
  7. */
  8. #include <linux/device.h>
  9. #include <linux/io.h>
  10. #include <linux/iopoll.h>
  11. #include <linux/module.h>
  12. #include <linux/nvmem-provider.h>
  13. #include <linux/of.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/random.h>
  17. /* Registers and special values for doing register-based SID readout on H3 */
  18. #define SUN8I_SID_PRCTL 0x40
  19. #define SUN8I_SID_RDKEY 0x60
  20. #define SUN8I_SID_OFFSET_MASK 0x1FF
  21. #define SUN8I_SID_OFFSET_SHIFT 16
  22. #define SUN8I_SID_OP_LOCK (0xAC << 8)
  23. #define SUN8I_SID_READ BIT(1)
  24. struct sunxi_sid_cfg {
  25. u32 value_offset;
  26. u32 size;
  27. bool need_register_readout;
  28. };
  29. struct sunxi_sid {
  30. void __iomem *base;
  31. u32 value_offset;
  32. };
  33. static int sunxi_sid_read(void *context, unsigned int offset,
  34. void *val, size_t bytes)
  35. {
  36. struct sunxi_sid *sid = context;
  37. u32 word;
  38. /* .stride = 4 so offset is guaranteed to be aligned */
  39. __ioread32_copy(val, sid->base + sid->value_offset + offset, bytes / 4);
  40. val += round_down(bytes, 4);
  41. offset += round_down(bytes, 4);
  42. bytes = bytes % 4;
  43. if (!bytes)
  44. return 0;
  45. /* Handle any trailing bytes */
  46. word = readl_relaxed(sid->base + sid->value_offset + offset);
  47. memcpy(val, &word, bytes);
  48. return 0;
  49. }
  50. static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
  51. const unsigned int offset,
  52. u32 *out)
  53. {
  54. u32 reg_val;
  55. int ret;
  56. /* Set word, lock access, and set read command */
  57. reg_val = (offset & SUN8I_SID_OFFSET_MASK)
  58. << SUN8I_SID_OFFSET_SHIFT;
  59. reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
  60. writel(reg_val, sid->base + SUN8I_SID_PRCTL);
  61. ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
  62. !(reg_val & SUN8I_SID_READ), 100, 250000);
  63. if (ret)
  64. return ret;
  65. if (out)
  66. *out = readl(sid->base + SUN8I_SID_RDKEY);
  67. writel(0, sid->base + SUN8I_SID_PRCTL);
  68. return 0;
  69. }
  70. /*
  71. * On Allwinner H3, the value on the 0x200 offset of the SID controller seems
  72. * to be not reliable at all.
  73. * Read by the registers instead.
  74. */
  75. static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
  76. void *val, size_t bytes)
  77. {
  78. struct sunxi_sid *sid = context;
  79. u32 word;
  80. int ret;
  81. /* .stride = 4 so offset is guaranteed to be aligned */
  82. while (bytes >= 4) {
  83. ret = sun8i_sid_register_readout(sid, offset, val);
  84. if (ret)
  85. return ret;
  86. val += 4;
  87. offset += 4;
  88. bytes -= 4;
  89. }
  90. if (!bytes)
  91. return 0;
  92. /* Handle any trailing bytes */
  93. ret = sun8i_sid_register_readout(sid, offset, &word);
  94. if (ret)
  95. return ret;
  96. memcpy(val, &word, bytes);
  97. return 0;
  98. }
  99. static int sunxi_sid_probe(struct platform_device *pdev)
  100. {
  101. struct device *dev = &pdev->dev;
  102. struct nvmem_config *nvmem_cfg;
  103. struct nvmem_device *nvmem;
  104. struct sunxi_sid *sid;
  105. int size;
  106. char *randomness;
  107. const struct sunxi_sid_cfg *cfg;
  108. sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
  109. if (!sid)
  110. return -ENOMEM;
  111. cfg = of_device_get_match_data(dev);
  112. if (!cfg)
  113. return -EINVAL;
  114. sid->value_offset = cfg->value_offset;
  115. sid->base = devm_platform_ioremap_resource(pdev, 0);
  116. if (IS_ERR(sid->base))
  117. return PTR_ERR(sid->base);
  118. size = cfg->size;
  119. nvmem_cfg = devm_kzalloc(dev, sizeof(*nvmem_cfg), GFP_KERNEL);
  120. if (!nvmem_cfg)
  121. return -ENOMEM;
  122. nvmem_cfg->dev = dev;
  123. nvmem_cfg->name = "sunxi-sid";
  124. nvmem_cfg->type = NVMEM_TYPE_OTP;
  125. nvmem_cfg->add_legacy_fixed_of_cells = true;
  126. nvmem_cfg->read_only = true;
  127. nvmem_cfg->size = cfg->size;
  128. nvmem_cfg->word_size = 1;
  129. nvmem_cfg->stride = 4;
  130. nvmem_cfg->priv = sid;
  131. if (cfg->need_register_readout)
  132. nvmem_cfg->reg_read = sun8i_sid_read_by_reg;
  133. else
  134. nvmem_cfg->reg_read = sunxi_sid_read;
  135. nvmem = devm_nvmem_register(dev, nvmem_cfg);
  136. if (IS_ERR(nvmem))
  137. return PTR_ERR(nvmem);
  138. randomness = kzalloc(size, GFP_KERNEL);
  139. if (!randomness)
  140. return -ENOMEM;
  141. nvmem_cfg->reg_read(sid, 0, randomness, size);
  142. add_device_randomness(randomness, size);
  143. kfree(randomness);
  144. platform_set_drvdata(pdev, nvmem);
  145. return 0;
  146. }
  147. static const struct sunxi_sid_cfg sun4i_a10_cfg = {
  148. .size = 0x10,
  149. };
  150. static const struct sunxi_sid_cfg sun7i_a20_cfg = {
  151. .size = 0x200,
  152. };
  153. static const struct sunxi_sid_cfg sun8i_h3_cfg = {
  154. .value_offset = 0x200,
  155. .size = 0x100,
  156. .need_register_readout = true,
  157. };
  158. static const struct sunxi_sid_cfg sun50i_a64_cfg = {
  159. .value_offset = 0x200,
  160. .size = 0x100,
  161. };
  162. static const struct sunxi_sid_cfg sun50i_h6_cfg = {
  163. .value_offset = 0x200,
  164. .size = 0x200,
  165. };
  166. static const struct of_device_id sunxi_sid_of_match[] = {
  167. { .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
  168. { .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
  169. { .compatible = "allwinner,sun8i-a83t-sid", .data = &sun50i_a64_cfg },
  170. { .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
  171. { .compatible = "allwinner,sun20i-d1-sid", .data = &sun50i_a64_cfg },
  172. { .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
  173. { .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
  174. { .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },
  175. {/* sentinel */},
  176. };
  177. MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
  178. static struct platform_driver sunxi_sid_driver = {
  179. .probe = sunxi_sid_probe,
  180. .driver = {
  181. .name = "eeprom-sunxi-sid",
  182. .of_match_table = sunxi_sid_of_match,
  183. },
  184. };
  185. module_platform_driver(sunxi_sid_driver);
  186. MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
  187. MODULE_DESCRIPTION("Allwinner sunxi security id driver");
  188. MODULE_LICENSE("GPL");