Kconfig 8.6 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. #
  3. # PCI configuration
  4. #
  5. # select this to offer the PCI prompt
  6. config HAVE_PCI
  7. bool
  8. # select this to unconditionally force on PCI support
  9. config FORCE_PCI
  10. bool
  11. select HAVE_PCI
  12. select PCI
  13. # select this to provide a generic PCI iomap,
  14. # without PCI itself having to be defined
  15. config GENERIC_PCI_IOMAP
  16. bool
  17. menuconfig PCI
  18. bool "PCI support"
  19. depends on HAVE_PCI
  20. help
  21. This option enables support for the PCI local bus, including
  22. support for PCI-X and the foundations for PCI Express support.
  23. Say 'Y' here unless you know what you are doing.
  24. if PCI
  25. config PCI_DOMAINS
  26. bool
  27. depends on PCI
  28. config PCI_DOMAINS_GENERIC
  29. bool
  30. select PCI_DOMAINS
  31. config PCI_SYSCALL
  32. bool
  33. source "drivers/pci/pcie/Kconfig"
  34. config PCI_MSI
  35. bool "Message Signaled Interrupts (MSI and MSI-X)"
  36. select GENERIC_MSI_IRQ
  37. help
  38. This allows device drivers to enable MSI (Message Signaled
  39. Interrupts). Message Signaled Interrupts enable a device to
  40. generate an interrupt using an inbound Memory Write on its
  41. PCI bus instead of asserting a device IRQ pin.
  42. Use of PCI MSI interrupts can be disabled at kernel boot time
  43. by using the 'pci=nomsi' option. This disables MSI for the
  44. entire system.
  45. If you don't know what to do here, say Y.
  46. config PCI_MSI_ARCH_FALLBACKS
  47. bool
  48. config PCI_QUIRKS
  49. default y
  50. bool "Enable PCI quirk workarounds" if EXPERT
  51. help
  52. This enables workarounds for various PCI chipset bugs/quirks.
  53. Disable this only if your target machine is unaffected by PCI
  54. quirks.
  55. config PCI_DEBUG
  56. bool "PCI Debugging"
  57. depends on DEBUG_KERNEL
  58. help
  59. Say Y here if you want the PCI core to produce a bunch of debug
  60. messages to the system log. Select this if you are having a
  61. problem with PCI support and want to see more of what is going on.
  62. When in doubt, say N.
  63. config PCI_REALLOC_ENABLE_AUTO
  64. bool "Enable PCI resource re-allocation detection"
  65. depends on PCI_IOV
  66. help
  67. Say Y here if you want the PCI core to detect if PCI resource
  68. re-allocation needs to be enabled. You can always use pci=realloc=on
  69. or pci=realloc=off to override it. It will automatically
  70. re-allocate PCI resources if SR-IOV BARs have not been allocated by
  71. the BIOS.
  72. When in doubt, say N.
  73. config PCI_STUB
  74. tristate "PCI Stub driver"
  75. help
  76. Say Y or M here if you want be able to reserve a PCI device
  77. when it is going to be assigned to a guest operating system.
  78. When in doubt, say N.
  79. config PCI_PF_STUB
  80. tristate "PCI PF Stub driver"
  81. depends on PCI_IOV
  82. help
  83. Say Y or M here if you want to enable support for devices that
  84. require SR-IOV support, while at the same time the PF (Physical
  85. Function) itself is not providing any actual services on the
  86. host itself such as storage or networking.
  87. When in doubt, say N.
  88. config XEN_PCIDEV_FRONTEND
  89. tristate "Xen PCI Frontend"
  90. depends on XEN_PV
  91. select PCI_XEN
  92. select XEN_XENBUS_FRONTEND
  93. default y
  94. help
  95. The PCI device frontend driver allows the kernel to import arbitrary
  96. PCI devices from a PCI backend to support PCI driver domains.
  97. config PCI_ATS
  98. bool
  99. config PCI_DOE
  100. bool
  101. config PCI_ECAM
  102. bool
  103. config PCI_LOCKLESS_CONFIG
  104. bool
  105. config PCI_BRIDGE_EMUL
  106. bool
  107. config PCI_IOV
  108. bool "PCI IOV support"
  109. select PCI_ATS
  110. help
  111. I/O Virtualization is a PCI feature supported by some devices
  112. which allows them to create virtual devices which share their
  113. physical resources.
  114. If unsure, say N.
  115. config PCI_NPEM
  116. bool "Native PCIe Enclosure Management"
  117. depends on LEDS_CLASS=y
  118. help
  119. Support for Native PCIe Enclosure Management. It allows managing LED
  120. indications in storage enclosures. Enclosure must support following
  121. indications: OK, Locate, Fail, Rebuild, other indications are
  122. optional.
  123. config PCI_PRI
  124. bool "PCI PRI support"
  125. select PCI_ATS
  126. help
  127. PRI is the PCI Page Request Interface. It allows PCI devices that are
  128. behind an IOMMU to recover from page faults.
  129. If unsure, say N.
  130. config PCI_PASID
  131. bool "PCI PASID support"
  132. select PCI_ATS
  133. help
  134. Process Address Space Identifiers (PASIDs) can be used by PCI devices
  135. to access more than one IO address space at the same time. To make
  136. use of this feature an IOMMU is required which also supports PASIDs.
  137. Select this option if you have such an IOMMU and want to compile the
  138. driver for it into your kernel.
  139. If unsure, say N.
  140. config PCI_P2PDMA
  141. bool "PCI peer-to-peer transfer support"
  142. depends on ZONE_DEVICE
  143. #
  144. # The need for the scatterlist DMA bus address flag means PCI P2PDMA
  145. # requires 64bit
  146. #
  147. depends on 64BIT
  148. select GENERIC_ALLOCATOR
  149. select NEED_SG_DMA_FLAGS
  150. help
  151. Enables drivers to do PCI peer-to-peer transactions to and from
  152. BARs that are exposed in other devices that are the part of
  153. the hierarchy where peer-to-peer DMA is guaranteed by the PCI
  154. specification to work (ie. anything below a single PCI bridge).
  155. Many PCIe root complexes do not support P2P transactions and
  156. it's hard to tell which support it at all, so at this time,
  157. P2P DMA transactions must be between devices behind the same root
  158. port.
  159. If unsure, say N.
  160. config PCI_LABEL
  161. def_bool y if (DMI || ACPI)
  162. select NLS
  163. config PCI_HYPERV
  164. tristate "Hyper-V PCI Frontend"
  165. depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS
  166. select PCI_HYPERV_INTERFACE
  167. help
  168. The PCI device frontend driver allows the kernel to import arbitrary
  169. PCI devices from a PCI backend to support PCI driver domains.
  170. config PCI_DYNAMIC_OF_NODES
  171. bool "Create Device tree nodes for PCI devices"
  172. depends on OF_IRQ
  173. select OF_DYNAMIC
  174. help
  175. This option enables support for generating device tree nodes for some
  176. PCI devices. Thus, the driver of this kind can load and overlay
  177. flattened device tree for its downstream devices.
  178. Once this option is selected, the device tree nodes will be generated
  179. for all PCI bridges.
  180. choice
  181. prompt "PCI Express hierarchy optimization setting"
  182. default PCIE_BUS_DEFAULT
  183. depends on PCI && EXPERT
  184. help
  185. MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
  186. device parameters that affect performance and the ability to
  187. support hotplug and peer-to-peer DMA.
  188. The following choices set the MPS and MRRS optimization strategy
  189. at compile-time. The choices are the same as those offered for
  190. the kernel command-line parameter 'pci', i.e.,
  191. 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
  192. 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
  193. This is a compile-time setting and can be overridden by the above
  194. command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
  195. config PCIE_BUS_TUNE_OFF
  196. bool "Tune Off"
  197. depends on PCI
  198. help
  199. Use the BIOS defaults; don't touch MPS at all. This is the same
  200. as booting with 'pci=pcie_bus_tune_off'.
  201. config PCIE_BUS_DEFAULT
  202. bool "Default"
  203. depends on PCI
  204. help
  205. Default choice; ensure that the MPS matches upstream bridge.
  206. config PCIE_BUS_SAFE
  207. bool "Safe"
  208. depends on PCI
  209. help
  210. Use largest MPS that boot-time devices support. If you have a
  211. closed system with no possibility of adding new devices, this
  212. will use the largest MPS that's supported by all devices. This
  213. is the same as booting with 'pci=pcie_bus_safe'.
  214. config PCIE_BUS_PERFORMANCE
  215. bool "Performance"
  216. depends on PCI
  217. help
  218. Use MPS and MRRS for best performance. Ensure that a given
  219. device's MPS is no larger than its parent MPS, which allows us to
  220. keep all switches/bridges to the max MPS supported by their
  221. parent. This is the same as booting with 'pci=pcie_bus_perf'.
  222. config PCIE_BUS_PEER2PEER
  223. bool "Peer2peer"
  224. depends on PCI
  225. help
  226. Set MPS = 128 for all devices. MPS configuration effected by the
  227. other options could cause the MPS on one root port to be
  228. different than that of the MPS on another, which may cause
  229. hot-added devices or peer-to-peer DMA to fail. Set MPS to the
  230. smallest possible value (128B) system-wide to avoid these issues.
  231. This is the same as booting with 'pci=pcie_bus_peer2peer'.
  232. endchoice
  233. config VGA_ARB
  234. bool "VGA Arbitration" if EXPERT
  235. default y
  236. depends on (PCI && !S390)
  237. help
  238. Some "legacy" VGA devices implemented on PCI typically have the same
  239. hard-decoded addresses as they did on ISA. When multiple PCI devices
  240. are accessed at same time they need some kind of coordination. Please
  241. see Documentation/gpu/vgaarbiter.rst for more details. Select this to
  242. enable VGA arbiter.
  243. config VGA_ARB_MAX_GPUS
  244. int "Maximum number of GPUs"
  245. default 16
  246. depends on VGA_ARB
  247. help
  248. Reserves space in the kernel to maintain resource locking for
  249. multiple GPUS. The overhead for each GPU is very small.
  250. source "drivers/pci/hotplug/Kconfig"
  251. source "drivers/pci/controller/Kconfig"
  252. source "drivers/pci/endpoint/Kconfig"
  253. source "drivers/pci/switch/Kconfig"
  254. source "drivers/pci/pwrctl/Kconfig"
  255. endif