pci-sysfs.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  4. * (C) Copyright 2002-2004 IBM Corp.
  5. * (C) Copyright 2003 Matthew Wilcox
  6. * (C) Copyright 2003 Hewlett-Packard
  7. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  8. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  9. *
  10. * File attributes for PCI devices
  11. *
  12. * Modeled after usb's driverfs.c
  13. */
  14. #include <linux/bitfield.h>
  15. #include <linux/kernel.h>
  16. #include <linux/sched.h>
  17. #include <linux/pci.h>
  18. #include <linux/stat.h>
  19. #include <linux/export.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/fs.h>
  23. #include <linux/capability.h>
  24. #include <linux/security.h>
  25. #include <linux/slab.h>
  26. #include <linux/vgaarb.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/msi.h>
  29. #include <linux/of.h>
  30. #include <linux/aperture.h>
  31. #include "pci.h"
  32. #ifndef ARCH_PCI_DEV_GROUPS
  33. #define ARCH_PCI_DEV_GROUPS
  34. #endif
  35. static int sysfs_initialized; /* = 0 */
  36. /* show configuration fields */
  37. #define pci_config_attr(field, format_string) \
  38. static ssize_t \
  39. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  40. { \
  41. struct pci_dev *pdev; \
  42. \
  43. pdev = to_pci_dev(dev); \
  44. return sysfs_emit(buf, format_string, pdev->field); \
  45. } \
  46. static DEVICE_ATTR_RO(field)
  47. pci_config_attr(vendor, "0x%04x\n");
  48. pci_config_attr(device, "0x%04x\n");
  49. pci_config_attr(subsystem_vendor, "0x%04x\n");
  50. pci_config_attr(subsystem_device, "0x%04x\n");
  51. pci_config_attr(revision, "0x%02x\n");
  52. pci_config_attr(class, "0x%06x\n");
  53. static ssize_t irq_show(struct device *dev,
  54. struct device_attribute *attr,
  55. char *buf)
  56. {
  57. struct pci_dev *pdev = to_pci_dev(dev);
  58. #ifdef CONFIG_PCI_MSI
  59. /*
  60. * For MSI, show the first MSI IRQ; for all other cases including
  61. * MSI-X, show the legacy INTx IRQ.
  62. */
  63. if (pdev->msi_enabled)
  64. return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));
  65. #endif
  66. return sysfs_emit(buf, "%u\n", pdev->irq);
  67. }
  68. static DEVICE_ATTR_RO(irq);
  69. static ssize_t broken_parity_status_show(struct device *dev,
  70. struct device_attribute *attr,
  71. char *buf)
  72. {
  73. struct pci_dev *pdev = to_pci_dev(dev);
  74. return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);
  75. }
  76. static ssize_t broken_parity_status_store(struct device *dev,
  77. struct device_attribute *attr,
  78. const char *buf, size_t count)
  79. {
  80. struct pci_dev *pdev = to_pci_dev(dev);
  81. unsigned long val;
  82. if (kstrtoul(buf, 0, &val) < 0)
  83. return -EINVAL;
  84. pdev->broken_parity_status = !!val;
  85. return count;
  86. }
  87. static DEVICE_ATTR_RW(broken_parity_status);
  88. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  89. struct device_attribute *attr, char *buf)
  90. {
  91. const struct cpumask *mask;
  92. #ifdef CONFIG_NUMA
  93. if (dev_to_node(dev) == NUMA_NO_NODE)
  94. mask = cpu_online_mask;
  95. else
  96. mask = cpumask_of_node(dev_to_node(dev));
  97. #else
  98. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  99. #endif
  100. return cpumap_print_to_pagebuf(list, buf, mask);
  101. }
  102. static ssize_t local_cpus_show(struct device *dev,
  103. struct device_attribute *attr, char *buf)
  104. {
  105. return pci_dev_show_local_cpu(dev, false, attr, buf);
  106. }
  107. static DEVICE_ATTR_RO(local_cpus);
  108. static ssize_t local_cpulist_show(struct device *dev,
  109. struct device_attribute *attr, char *buf)
  110. {
  111. return pci_dev_show_local_cpu(dev, true, attr, buf);
  112. }
  113. static DEVICE_ATTR_RO(local_cpulist);
  114. /*
  115. * PCI Bus Class Devices
  116. */
  117. static ssize_t cpuaffinity_show(struct device *dev,
  118. struct device_attribute *attr, char *buf)
  119. {
  120. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  121. return cpumap_print_to_pagebuf(false, buf, cpumask);
  122. }
  123. static DEVICE_ATTR_RO(cpuaffinity);
  124. static ssize_t cpulistaffinity_show(struct device *dev,
  125. struct device_attribute *attr, char *buf)
  126. {
  127. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  128. return cpumap_print_to_pagebuf(true, buf, cpumask);
  129. }
  130. static DEVICE_ATTR_RO(cpulistaffinity);
  131. static ssize_t power_state_show(struct device *dev,
  132. struct device_attribute *attr, char *buf)
  133. {
  134. struct pci_dev *pdev = to_pci_dev(dev);
  135. return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));
  136. }
  137. static DEVICE_ATTR_RO(power_state);
  138. /* show resources */
  139. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  140. char *buf)
  141. {
  142. struct pci_dev *pci_dev = to_pci_dev(dev);
  143. int i;
  144. int max;
  145. resource_size_t start, end;
  146. size_t len = 0;
  147. if (pci_dev->subordinate)
  148. max = DEVICE_COUNT_RESOURCE;
  149. else
  150. max = PCI_BRIDGE_RESOURCES;
  151. for (i = 0; i < max; i++) {
  152. struct resource *res = &pci_dev->resource[i];
  153. pci_resource_to_user(pci_dev, i, res, &start, &end);
  154. len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",
  155. (unsigned long long)start,
  156. (unsigned long long)end,
  157. (unsigned long long)res->flags);
  158. }
  159. return len;
  160. }
  161. static DEVICE_ATTR_RO(resource);
  162. static ssize_t max_link_speed_show(struct device *dev,
  163. struct device_attribute *attr, char *buf)
  164. {
  165. struct pci_dev *pdev = to_pci_dev(dev);
  166. return sysfs_emit(buf, "%s\n",
  167. pci_speed_string(pcie_get_speed_cap(pdev)));
  168. }
  169. static DEVICE_ATTR_RO(max_link_speed);
  170. static ssize_t max_link_width_show(struct device *dev,
  171. struct device_attribute *attr, char *buf)
  172. {
  173. struct pci_dev *pdev = to_pci_dev(dev);
  174. return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));
  175. }
  176. static DEVICE_ATTR_RO(max_link_width);
  177. static ssize_t current_link_speed_show(struct device *dev,
  178. struct device_attribute *attr, char *buf)
  179. {
  180. struct pci_dev *pci_dev = to_pci_dev(dev);
  181. u16 linkstat;
  182. int err;
  183. enum pci_bus_speed speed;
  184. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  185. if (err)
  186. return -EINVAL;
  187. speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
  188. return sysfs_emit(buf, "%s\n", pci_speed_string(speed));
  189. }
  190. static DEVICE_ATTR_RO(current_link_speed);
  191. static ssize_t current_link_width_show(struct device *dev,
  192. struct device_attribute *attr, char *buf)
  193. {
  194. struct pci_dev *pci_dev = to_pci_dev(dev);
  195. u16 linkstat;
  196. int err;
  197. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  198. if (err)
  199. return -EINVAL;
  200. return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));
  201. }
  202. static DEVICE_ATTR_RO(current_link_width);
  203. static ssize_t secondary_bus_number_show(struct device *dev,
  204. struct device_attribute *attr,
  205. char *buf)
  206. {
  207. struct pci_dev *pci_dev = to_pci_dev(dev);
  208. u8 sec_bus;
  209. int err;
  210. err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
  211. if (err)
  212. return -EINVAL;
  213. return sysfs_emit(buf, "%u\n", sec_bus);
  214. }
  215. static DEVICE_ATTR_RO(secondary_bus_number);
  216. static ssize_t subordinate_bus_number_show(struct device *dev,
  217. struct device_attribute *attr,
  218. char *buf)
  219. {
  220. struct pci_dev *pci_dev = to_pci_dev(dev);
  221. u8 sub_bus;
  222. int err;
  223. err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
  224. if (err)
  225. return -EINVAL;
  226. return sysfs_emit(buf, "%u\n", sub_bus);
  227. }
  228. static DEVICE_ATTR_RO(subordinate_bus_number);
  229. static ssize_t ari_enabled_show(struct device *dev,
  230. struct device_attribute *attr,
  231. char *buf)
  232. {
  233. struct pci_dev *pci_dev = to_pci_dev(dev);
  234. return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
  235. }
  236. static DEVICE_ATTR_RO(ari_enabled);
  237. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  238. char *buf)
  239. {
  240. struct pci_dev *pci_dev = to_pci_dev(dev);
  241. return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  242. pci_dev->vendor, pci_dev->device,
  243. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  244. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  245. (u8)(pci_dev->class));
  246. }
  247. static DEVICE_ATTR_RO(modalias);
  248. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  249. const char *buf, size_t count)
  250. {
  251. struct pci_dev *pdev = to_pci_dev(dev);
  252. unsigned long val;
  253. ssize_t result = 0;
  254. /* this can crash the machine when done on the "wrong" device */
  255. if (!capable(CAP_SYS_ADMIN))
  256. return -EPERM;
  257. if (kstrtoul(buf, 0, &val) < 0)
  258. return -EINVAL;
  259. device_lock(dev);
  260. if (dev->driver)
  261. result = -EBUSY;
  262. else if (val)
  263. result = pci_enable_device(pdev);
  264. else if (pci_is_enabled(pdev))
  265. pci_disable_device(pdev);
  266. else
  267. result = -EIO;
  268. device_unlock(dev);
  269. return result < 0 ? result : count;
  270. }
  271. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  272. char *buf)
  273. {
  274. struct pci_dev *pdev;
  275. pdev = to_pci_dev(dev);
  276. return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  277. }
  278. static DEVICE_ATTR_RW(enable);
  279. #ifdef CONFIG_NUMA
  280. static ssize_t numa_node_store(struct device *dev,
  281. struct device_attribute *attr, const char *buf,
  282. size_t count)
  283. {
  284. struct pci_dev *pdev = to_pci_dev(dev);
  285. int node;
  286. if (!capable(CAP_SYS_ADMIN))
  287. return -EPERM;
  288. if (kstrtoint(buf, 0, &node) < 0)
  289. return -EINVAL;
  290. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  291. return -EINVAL;
  292. if (node != NUMA_NO_NODE && !node_online(node))
  293. return -EINVAL;
  294. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  295. pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  296. node);
  297. dev->numa_node = node;
  298. return count;
  299. }
  300. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  301. char *buf)
  302. {
  303. return sysfs_emit(buf, "%d\n", dev->numa_node);
  304. }
  305. static DEVICE_ATTR_RW(numa_node);
  306. #endif
  307. static ssize_t dma_mask_bits_show(struct device *dev,
  308. struct device_attribute *attr, char *buf)
  309. {
  310. struct pci_dev *pdev = to_pci_dev(dev);
  311. return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
  312. }
  313. static DEVICE_ATTR_RO(dma_mask_bits);
  314. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  315. struct device_attribute *attr,
  316. char *buf)
  317. {
  318. return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
  319. }
  320. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  321. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  322. char *buf)
  323. {
  324. struct pci_dev *pdev = to_pci_dev(dev);
  325. struct pci_bus *subordinate = pdev->subordinate;
  326. return sysfs_emit(buf, "%u\n", subordinate ?
  327. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  328. : !pdev->no_msi);
  329. }
  330. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  331. const char *buf, size_t count)
  332. {
  333. struct pci_dev *pdev = to_pci_dev(dev);
  334. struct pci_bus *subordinate = pdev->subordinate;
  335. unsigned long val;
  336. if (!capable(CAP_SYS_ADMIN))
  337. return -EPERM;
  338. if (kstrtoul(buf, 0, &val) < 0)
  339. return -EINVAL;
  340. /*
  341. * "no_msi" and "bus_flags" only affect what happens when a driver
  342. * requests MSI or MSI-X. They don't affect any drivers that have
  343. * already requested MSI or MSI-X.
  344. */
  345. if (!subordinate) {
  346. pdev->no_msi = !val;
  347. pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
  348. val ? "allowed" : "disallowed");
  349. return count;
  350. }
  351. if (val)
  352. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  353. else
  354. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  355. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  356. val ? "allowed" : "disallowed");
  357. return count;
  358. }
  359. static DEVICE_ATTR_RW(msi_bus);
  360. static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count)
  361. {
  362. unsigned long val;
  363. struct pci_bus *b = NULL;
  364. if (kstrtoul(buf, 0, &val) < 0)
  365. return -EINVAL;
  366. if (val) {
  367. pci_lock_rescan_remove();
  368. while ((b = pci_find_next_bus(b)) != NULL)
  369. pci_rescan_bus(b);
  370. pci_unlock_rescan_remove();
  371. }
  372. return count;
  373. }
  374. static BUS_ATTR_WO(rescan);
  375. static struct attribute *pci_bus_attrs[] = {
  376. &bus_attr_rescan.attr,
  377. NULL,
  378. };
  379. static const struct attribute_group pci_bus_group = {
  380. .attrs = pci_bus_attrs,
  381. };
  382. const struct attribute_group *pci_bus_groups[] = {
  383. &pci_bus_group,
  384. NULL,
  385. };
  386. static ssize_t dev_rescan_store(struct device *dev,
  387. struct device_attribute *attr, const char *buf,
  388. size_t count)
  389. {
  390. unsigned long val;
  391. struct pci_dev *pdev = to_pci_dev(dev);
  392. if (kstrtoul(buf, 0, &val) < 0)
  393. return -EINVAL;
  394. if (val) {
  395. pci_lock_rescan_remove();
  396. pci_rescan_bus(pdev->bus);
  397. pci_unlock_rescan_remove();
  398. }
  399. return count;
  400. }
  401. static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
  402. dev_rescan_store);
  403. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  404. const char *buf, size_t count)
  405. {
  406. unsigned long val;
  407. if (kstrtoul(buf, 0, &val) < 0)
  408. return -EINVAL;
  409. if (val && device_remove_file_self(dev, attr))
  410. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  411. return count;
  412. }
  413. static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
  414. remove_store);
  415. static ssize_t bus_rescan_store(struct device *dev,
  416. struct device_attribute *attr,
  417. const char *buf, size_t count)
  418. {
  419. unsigned long val;
  420. struct pci_bus *bus = to_pci_bus(dev);
  421. if (kstrtoul(buf, 0, &val) < 0)
  422. return -EINVAL;
  423. if (val) {
  424. pci_lock_rescan_remove();
  425. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  426. pci_rescan_bus_bridge_resize(bus->self);
  427. else
  428. pci_rescan_bus(bus);
  429. pci_unlock_rescan_remove();
  430. }
  431. return count;
  432. }
  433. static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
  434. bus_rescan_store);
  435. static ssize_t reset_subordinate_store(struct device *dev,
  436. struct device_attribute *attr,
  437. const char *buf, size_t count)
  438. {
  439. struct pci_dev *pdev = to_pci_dev(dev);
  440. struct pci_bus *bus = pdev->subordinate;
  441. unsigned long val;
  442. if (!capable(CAP_SYS_ADMIN))
  443. return -EPERM;
  444. if (kstrtoul(buf, 0, &val) < 0)
  445. return -EINVAL;
  446. if (val) {
  447. int ret = __pci_reset_bus(bus);
  448. if (ret)
  449. return ret;
  450. }
  451. return count;
  452. }
  453. static DEVICE_ATTR_WO(reset_subordinate);
  454. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  455. static ssize_t d3cold_allowed_store(struct device *dev,
  456. struct device_attribute *attr,
  457. const char *buf, size_t count)
  458. {
  459. struct pci_dev *pdev = to_pci_dev(dev);
  460. unsigned long val;
  461. if (kstrtoul(buf, 0, &val) < 0)
  462. return -EINVAL;
  463. pdev->d3cold_allowed = !!val;
  464. pci_bridge_d3_update(pdev);
  465. pm_runtime_resume(dev);
  466. return count;
  467. }
  468. static ssize_t d3cold_allowed_show(struct device *dev,
  469. struct device_attribute *attr, char *buf)
  470. {
  471. struct pci_dev *pdev = to_pci_dev(dev);
  472. return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);
  473. }
  474. static DEVICE_ATTR_RW(d3cold_allowed);
  475. #endif
  476. #ifdef CONFIG_OF
  477. static ssize_t devspec_show(struct device *dev,
  478. struct device_attribute *attr, char *buf)
  479. {
  480. struct pci_dev *pdev = to_pci_dev(dev);
  481. struct device_node *np = pci_device_to_OF_node(pdev);
  482. if (np == NULL)
  483. return 0;
  484. return sysfs_emit(buf, "%pOF\n", np);
  485. }
  486. static DEVICE_ATTR_RO(devspec);
  487. #endif
  488. static ssize_t driver_override_store(struct device *dev,
  489. struct device_attribute *attr,
  490. const char *buf, size_t count)
  491. {
  492. struct pci_dev *pdev = to_pci_dev(dev);
  493. int ret;
  494. ret = driver_set_override(dev, &pdev->driver_override, buf, count);
  495. if (ret)
  496. return ret;
  497. return count;
  498. }
  499. static ssize_t driver_override_show(struct device *dev,
  500. struct device_attribute *attr, char *buf)
  501. {
  502. struct pci_dev *pdev = to_pci_dev(dev);
  503. ssize_t len;
  504. device_lock(dev);
  505. len = sysfs_emit(buf, "%s\n", pdev->driver_override);
  506. device_unlock(dev);
  507. return len;
  508. }
  509. static DEVICE_ATTR_RW(driver_override);
  510. static struct attribute *pci_dev_attrs[] = {
  511. &dev_attr_power_state.attr,
  512. &dev_attr_resource.attr,
  513. &dev_attr_vendor.attr,
  514. &dev_attr_device.attr,
  515. &dev_attr_subsystem_vendor.attr,
  516. &dev_attr_subsystem_device.attr,
  517. &dev_attr_revision.attr,
  518. &dev_attr_class.attr,
  519. &dev_attr_irq.attr,
  520. &dev_attr_local_cpus.attr,
  521. &dev_attr_local_cpulist.attr,
  522. &dev_attr_modalias.attr,
  523. #ifdef CONFIG_NUMA
  524. &dev_attr_numa_node.attr,
  525. #endif
  526. &dev_attr_dma_mask_bits.attr,
  527. &dev_attr_consistent_dma_mask_bits.attr,
  528. &dev_attr_enable.attr,
  529. &dev_attr_broken_parity_status.attr,
  530. &dev_attr_msi_bus.attr,
  531. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  532. &dev_attr_d3cold_allowed.attr,
  533. #endif
  534. #ifdef CONFIG_OF
  535. &dev_attr_devspec.attr,
  536. #endif
  537. &dev_attr_driver_override.attr,
  538. &dev_attr_ari_enabled.attr,
  539. NULL,
  540. };
  541. static struct attribute *pci_bridge_attrs[] = {
  542. &dev_attr_subordinate_bus_number.attr,
  543. &dev_attr_secondary_bus_number.attr,
  544. &dev_attr_reset_subordinate.attr,
  545. NULL,
  546. };
  547. static struct attribute *pcie_dev_attrs[] = {
  548. &dev_attr_current_link_speed.attr,
  549. &dev_attr_current_link_width.attr,
  550. &dev_attr_max_link_width.attr,
  551. &dev_attr_max_link_speed.attr,
  552. NULL,
  553. };
  554. static struct attribute *pcibus_attrs[] = {
  555. &dev_attr_bus_rescan.attr,
  556. &dev_attr_cpuaffinity.attr,
  557. &dev_attr_cpulistaffinity.attr,
  558. NULL,
  559. };
  560. static const struct attribute_group pcibus_group = {
  561. .attrs = pcibus_attrs,
  562. };
  563. const struct attribute_group *pcibus_groups[] = {
  564. &pcibus_group,
  565. NULL,
  566. };
  567. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  568. char *buf)
  569. {
  570. struct pci_dev *pdev = to_pci_dev(dev);
  571. struct pci_dev *vga_dev = vga_default_device();
  572. if (vga_dev)
  573. return sysfs_emit(buf, "%u\n", (pdev == vga_dev));
  574. return sysfs_emit(buf, "%u\n",
  575. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  576. IORESOURCE_ROM_SHADOW));
  577. }
  578. static DEVICE_ATTR_RO(boot_vga);
  579. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  580. struct bin_attribute *bin_attr, char *buf,
  581. loff_t off, size_t count)
  582. {
  583. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  584. unsigned int size = 64;
  585. loff_t init_off = off;
  586. u8 *data = (u8 *) buf;
  587. /* Several chips lock up trying to read undefined config space */
  588. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  589. size = dev->cfg_size;
  590. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  591. size = 128;
  592. if (off > size)
  593. return 0;
  594. if (off + count > size) {
  595. size -= off;
  596. count = size;
  597. } else {
  598. size = count;
  599. }
  600. pci_config_pm_runtime_get(dev);
  601. if ((off & 1) && size) {
  602. u8 val;
  603. pci_user_read_config_byte(dev, off, &val);
  604. data[off - init_off] = val;
  605. off++;
  606. size--;
  607. }
  608. if ((off & 3) && size > 2) {
  609. u16 val;
  610. pci_user_read_config_word(dev, off, &val);
  611. data[off - init_off] = val & 0xff;
  612. data[off - init_off + 1] = (val >> 8) & 0xff;
  613. off += 2;
  614. size -= 2;
  615. }
  616. while (size > 3) {
  617. u32 val;
  618. pci_user_read_config_dword(dev, off, &val);
  619. data[off - init_off] = val & 0xff;
  620. data[off - init_off + 1] = (val >> 8) & 0xff;
  621. data[off - init_off + 2] = (val >> 16) & 0xff;
  622. data[off - init_off + 3] = (val >> 24) & 0xff;
  623. off += 4;
  624. size -= 4;
  625. cond_resched();
  626. }
  627. if (size >= 2) {
  628. u16 val;
  629. pci_user_read_config_word(dev, off, &val);
  630. data[off - init_off] = val & 0xff;
  631. data[off - init_off + 1] = (val >> 8) & 0xff;
  632. off += 2;
  633. size -= 2;
  634. }
  635. if (size > 0) {
  636. u8 val;
  637. pci_user_read_config_byte(dev, off, &val);
  638. data[off - init_off] = val;
  639. }
  640. pci_config_pm_runtime_put(dev);
  641. return count;
  642. }
  643. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  644. struct bin_attribute *bin_attr, char *buf,
  645. loff_t off, size_t count)
  646. {
  647. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  648. unsigned int size = count;
  649. loff_t init_off = off;
  650. u8 *data = (u8 *) buf;
  651. int ret;
  652. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  653. if (ret)
  654. return ret;
  655. if (resource_is_exclusive(&dev->driver_exclusive_resource, off,
  656. count)) {
  657. pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx",
  658. current->comm, off);
  659. add_taint(TAINT_USER, LOCKDEP_STILL_OK);
  660. }
  661. if (off > dev->cfg_size)
  662. return 0;
  663. if (off + count > dev->cfg_size) {
  664. size = dev->cfg_size - off;
  665. count = size;
  666. }
  667. pci_config_pm_runtime_get(dev);
  668. if ((off & 1) && size) {
  669. pci_user_write_config_byte(dev, off, data[off - init_off]);
  670. off++;
  671. size--;
  672. }
  673. if ((off & 3) && size > 2) {
  674. u16 val = data[off - init_off];
  675. val |= (u16) data[off - init_off + 1] << 8;
  676. pci_user_write_config_word(dev, off, val);
  677. off += 2;
  678. size -= 2;
  679. }
  680. while (size > 3) {
  681. u32 val = data[off - init_off];
  682. val |= (u32) data[off - init_off + 1] << 8;
  683. val |= (u32) data[off - init_off + 2] << 16;
  684. val |= (u32) data[off - init_off + 3] << 24;
  685. pci_user_write_config_dword(dev, off, val);
  686. off += 4;
  687. size -= 4;
  688. }
  689. if (size >= 2) {
  690. u16 val = data[off - init_off];
  691. val |= (u16) data[off - init_off + 1] << 8;
  692. pci_user_write_config_word(dev, off, val);
  693. off += 2;
  694. size -= 2;
  695. }
  696. if (size)
  697. pci_user_write_config_byte(dev, off, data[off - init_off]);
  698. pci_config_pm_runtime_put(dev);
  699. return count;
  700. }
  701. static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);
  702. static struct bin_attribute *pci_dev_config_attrs[] = {
  703. &bin_attr_config,
  704. NULL,
  705. };
  706. static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj,
  707. struct bin_attribute *a, int n)
  708. {
  709. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  710. a->size = PCI_CFG_SPACE_SIZE;
  711. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  712. a->size = PCI_CFG_SPACE_EXP_SIZE;
  713. return a->attr.mode;
  714. }
  715. static const struct attribute_group pci_dev_config_attr_group = {
  716. .bin_attrs = pci_dev_config_attrs,
  717. .is_bin_visible = pci_dev_config_attr_is_visible,
  718. };
  719. /*
  720. * llseek operation for mmappable PCI resources.
  721. * May be left unused if the arch doesn't provide them.
  722. */
  723. static __maybe_unused loff_t
  724. pci_llseek_resource(struct file *filep,
  725. struct kobject *kobj __always_unused,
  726. struct bin_attribute *attr,
  727. loff_t offset, int whence)
  728. {
  729. return fixed_size_llseek(filep, offset, whence, attr->size);
  730. }
  731. #ifdef HAVE_PCI_LEGACY
  732. /**
  733. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  734. * @filp: open sysfs file
  735. * @kobj: kobject corresponding to file to read from
  736. * @bin_attr: struct bin_attribute for this file
  737. * @buf: buffer to store results
  738. * @off: offset into legacy I/O port space
  739. * @count: number of bytes to read
  740. *
  741. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  742. * callback routine (pci_legacy_read).
  743. */
  744. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  745. struct bin_attribute *bin_attr, char *buf,
  746. loff_t off, size_t count)
  747. {
  748. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  749. /* Only support 1, 2 or 4 byte accesses */
  750. if (count != 1 && count != 2 && count != 4)
  751. return -EINVAL;
  752. return pci_legacy_read(bus, off, (u32 *)buf, count);
  753. }
  754. /**
  755. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  756. * @filp: open sysfs file
  757. * @kobj: kobject corresponding to file to read from
  758. * @bin_attr: struct bin_attribute for this file
  759. * @buf: buffer containing value to be written
  760. * @off: offset into legacy I/O port space
  761. * @count: number of bytes to write
  762. *
  763. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  764. * callback routine (pci_legacy_write).
  765. */
  766. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  767. struct bin_attribute *bin_attr, char *buf,
  768. loff_t off, size_t count)
  769. {
  770. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  771. /* Only support 1, 2 or 4 byte accesses */
  772. if (count != 1 && count != 2 && count != 4)
  773. return -EINVAL;
  774. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  775. }
  776. /**
  777. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  778. * @filp: open sysfs file
  779. * @kobj: kobject corresponding to device to be mapped
  780. * @attr: struct bin_attribute for this file
  781. * @vma: struct vm_area_struct passed to mmap
  782. *
  783. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  784. * legacy memory space (first meg of bus space) into application virtual
  785. * memory space.
  786. */
  787. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  788. struct bin_attribute *attr,
  789. struct vm_area_struct *vma)
  790. {
  791. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  792. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  793. }
  794. /**
  795. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  796. * @filp: open sysfs file
  797. * @kobj: kobject corresponding to device to be mapped
  798. * @attr: struct bin_attribute for this file
  799. * @vma: struct vm_area_struct passed to mmap
  800. *
  801. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  802. * legacy IO space (first meg of bus space) into application virtual
  803. * memory space. Returns -ENOSYS if the operation isn't supported
  804. */
  805. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  806. struct bin_attribute *attr,
  807. struct vm_area_struct *vma)
  808. {
  809. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  810. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  811. }
  812. /**
  813. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  814. * @b: bus to create files under
  815. * @mmap_type: I/O port or memory
  816. *
  817. * Stub implementation. Can be overridden by arch if necessary.
  818. */
  819. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  820. enum pci_mmap_state mmap_type)
  821. {
  822. }
  823. /**
  824. * pci_create_legacy_files - create legacy I/O port and memory files
  825. * @b: bus to create files under
  826. *
  827. * Some platforms allow access to legacy I/O port and ISA memory space on
  828. * a per-bus basis. This routine creates the files and ties them into
  829. * their associated read, write and mmap files from pci-sysfs.c
  830. *
  831. * On error unwind, but don't propagate the error to the caller
  832. * as it is ok to set up the PCI bus without these files.
  833. */
  834. void pci_create_legacy_files(struct pci_bus *b)
  835. {
  836. int error;
  837. if (!sysfs_initialized)
  838. return;
  839. b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
  840. GFP_ATOMIC);
  841. if (!b->legacy_io)
  842. goto kzalloc_err;
  843. sysfs_bin_attr_init(b->legacy_io);
  844. b->legacy_io->attr.name = "legacy_io";
  845. b->legacy_io->size = 0xffff;
  846. b->legacy_io->attr.mode = 0600;
  847. b->legacy_io->read = pci_read_legacy_io;
  848. b->legacy_io->write = pci_write_legacy_io;
  849. /* See pci_create_attr() for motivation */
  850. b->legacy_io->llseek = pci_llseek_resource;
  851. b->legacy_io->mmap = pci_mmap_legacy_io;
  852. b->legacy_io->f_mapping = iomem_get_mapping;
  853. pci_adjust_legacy_attr(b, pci_mmap_io);
  854. error = device_create_bin_file(&b->dev, b->legacy_io);
  855. if (error)
  856. goto legacy_io_err;
  857. /* Allocated above after the legacy_io struct */
  858. b->legacy_mem = b->legacy_io + 1;
  859. sysfs_bin_attr_init(b->legacy_mem);
  860. b->legacy_mem->attr.name = "legacy_mem";
  861. b->legacy_mem->size = 1024*1024;
  862. b->legacy_mem->attr.mode = 0600;
  863. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  864. /* See pci_create_attr() for motivation */
  865. b->legacy_mem->llseek = pci_llseek_resource;
  866. b->legacy_mem->f_mapping = iomem_get_mapping;
  867. pci_adjust_legacy_attr(b, pci_mmap_mem);
  868. error = device_create_bin_file(&b->dev, b->legacy_mem);
  869. if (error)
  870. goto legacy_mem_err;
  871. return;
  872. legacy_mem_err:
  873. device_remove_bin_file(&b->dev, b->legacy_io);
  874. legacy_io_err:
  875. kfree(b->legacy_io);
  876. b->legacy_io = NULL;
  877. kzalloc_err:
  878. dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
  879. }
  880. void pci_remove_legacy_files(struct pci_bus *b)
  881. {
  882. if (b->legacy_io) {
  883. device_remove_bin_file(&b->dev, b->legacy_io);
  884. device_remove_bin_file(&b->dev, b->legacy_mem);
  885. kfree(b->legacy_io); /* both are allocated here */
  886. }
  887. }
  888. #endif /* HAVE_PCI_LEGACY */
  889. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  890. /**
  891. * pci_mmap_resource - map a PCI resource into user memory space
  892. * @kobj: kobject for mapping
  893. * @attr: struct bin_attribute for the file being mapped
  894. * @vma: struct vm_area_struct passed into the mmap
  895. * @write_combine: 1 for write_combine mapping
  896. *
  897. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  898. */
  899. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  900. struct vm_area_struct *vma, int write_combine)
  901. {
  902. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  903. int bar = (unsigned long)attr->private;
  904. enum pci_mmap_state mmap_type;
  905. struct resource *res = &pdev->resource[bar];
  906. int ret;
  907. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  908. if (ret)
  909. return ret;
  910. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  911. return -EINVAL;
  912. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
  913. return -EINVAL;
  914. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  915. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  916. }
  917. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  918. struct bin_attribute *attr,
  919. struct vm_area_struct *vma)
  920. {
  921. return pci_mmap_resource(kobj, attr, vma, 0);
  922. }
  923. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  924. struct bin_attribute *attr,
  925. struct vm_area_struct *vma)
  926. {
  927. return pci_mmap_resource(kobj, attr, vma, 1);
  928. }
  929. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  930. struct bin_attribute *attr, char *buf,
  931. loff_t off, size_t count, bool write)
  932. {
  933. #ifdef CONFIG_HAS_IOPORT
  934. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  935. int bar = (unsigned long)attr->private;
  936. unsigned long port = off;
  937. port += pci_resource_start(pdev, bar);
  938. if (port > pci_resource_end(pdev, bar))
  939. return 0;
  940. if (port + count - 1 > pci_resource_end(pdev, bar))
  941. return -EINVAL;
  942. switch (count) {
  943. case 1:
  944. if (write)
  945. outb(*(u8 *)buf, port);
  946. else
  947. *(u8 *)buf = inb(port);
  948. return 1;
  949. case 2:
  950. if (write)
  951. outw(*(u16 *)buf, port);
  952. else
  953. *(u16 *)buf = inw(port);
  954. return 2;
  955. case 4:
  956. if (write)
  957. outl(*(u32 *)buf, port);
  958. else
  959. *(u32 *)buf = inl(port);
  960. return 4;
  961. }
  962. return -EINVAL;
  963. #else
  964. return -ENXIO;
  965. #endif
  966. }
  967. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  968. struct bin_attribute *attr, char *buf,
  969. loff_t off, size_t count)
  970. {
  971. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  972. }
  973. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  974. struct bin_attribute *attr, char *buf,
  975. loff_t off, size_t count)
  976. {
  977. int ret;
  978. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  979. if (ret)
  980. return ret;
  981. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  982. }
  983. /**
  984. * pci_remove_resource_files - cleanup resource files
  985. * @pdev: dev to cleanup
  986. *
  987. * If we created resource files for @pdev, remove them from sysfs and
  988. * free their resources.
  989. */
  990. static void pci_remove_resource_files(struct pci_dev *pdev)
  991. {
  992. int i;
  993. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  994. struct bin_attribute *res_attr;
  995. res_attr = pdev->res_attr[i];
  996. if (res_attr) {
  997. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  998. kfree(res_attr);
  999. }
  1000. res_attr = pdev->res_attr_wc[i];
  1001. if (res_attr) {
  1002. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1003. kfree(res_attr);
  1004. }
  1005. }
  1006. }
  1007. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  1008. {
  1009. /* allocate attribute structure, piggyback attribute name */
  1010. int name_len = write_combine ? 13 : 10;
  1011. struct bin_attribute *res_attr;
  1012. char *res_attr_name;
  1013. int retval;
  1014. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  1015. if (!res_attr)
  1016. return -ENOMEM;
  1017. res_attr_name = (char *)(res_attr + 1);
  1018. sysfs_bin_attr_init(res_attr);
  1019. if (write_combine) {
  1020. sprintf(res_attr_name, "resource%d_wc", num);
  1021. res_attr->mmap = pci_mmap_resource_wc;
  1022. } else {
  1023. sprintf(res_attr_name, "resource%d", num);
  1024. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  1025. res_attr->read = pci_read_resource_io;
  1026. res_attr->write = pci_write_resource_io;
  1027. if (arch_can_pci_mmap_io())
  1028. res_attr->mmap = pci_mmap_resource_uc;
  1029. } else {
  1030. res_attr->mmap = pci_mmap_resource_uc;
  1031. }
  1032. }
  1033. if (res_attr->mmap) {
  1034. res_attr->f_mapping = iomem_get_mapping;
  1035. /*
  1036. * generic_file_llseek() consults f_mapping->host to determine
  1037. * the file size. As iomem_inode knows nothing about the
  1038. * attribute, it's not going to work, so override it as well.
  1039. */
  1040. res_attr->llseek = pci_llseek_resource;
  1041. }
  1042. res_attr->attr.name = res_attr_name;
  1043. res_attr->attr.mode = 0600;
  1044. res_attr->size = pci_resource_len(pdev, num);
  1045. res_attr->private = (void *)(unsigned long)num;
  1046. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  1047. if (retval) {
  1048. kfree(res_attr);
  1049. return retval;
  1050. }
  1051. if (write_combine)
  1052. pdev->res_attr_wc[num] = res_attr;
  1053. else
  1054. pdev->res_attr[num] = res_attr;
  1055. return 0;
  1056. }
  1057. /**
  1058. * pci_create_resource_files - create resource files in sysfs for @dev
  1059. * @pdev: dev in question
  1060. *
  1061. * Walk the resources in @pdev creating files for each resource available.
  1062. */
  1063. static int pci_create_resource_files(struct pci_dev *pdev)
  1064. {
  1065. int i;
  1066. int retval;
  1067. /* Expose the PCI resources from this device as files */
  1068. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  1069. /* skip empty resources */
  1070. if (!pci_resource_len(pdev, i))
  1071. continue;
  1072. retval = pci_create_attr(pdev, i, 0);
  1073. /* for prefetchable resources, create a WC mappable file */
  1074. if (!retval && arch_can_pci_mmap_wc() &&
  1075. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1076. retval = pci_create_attr(pdev, i, 1);
  1077. if (retval) {
  1078. pci_remove_resource_files(pdev);
  1079. return retval;
  1080. }
  1081. }
  1082. return 0;
  1083. }
  1084. #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
  1085. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1086. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1087. #endif
  1088. /**
  1089. * pci_write_rom - used to enable access to the PCI ROM display
  1090. * @filp: sysfs file
  1091. * @kobj: kernel object handle
  1092. * @bin_attr: struct bin_attribute for this file
  1093. * @buf: user input
  1094. * @off: file offset
  1095. * @count: number of byte in input
  1096. *
  1097. * writing anything except 0 enables it
  1098. */
  1099. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1100. struct bin_attribute *bin_attr, char *buf,
  1101. loff_t off, size_t count)
  1102. {
  1103. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1104. if ((off == 0) && (*buf == '0') && (count == 2))
  1105. pdev->rom_attr_enabled = 0;
  1106. else
  1107. pdev->rom_attr_enabled = 1;
  1108. return count;
  1109. }
  1110. /**
  1111. * pci_read_rom - read a PCI ROM
  1112. * @filp: sysfs file
  1113. * @kobj: kernel object handle
  1114. * @bin_attr: struct bin_attribute for this file
  1115. * @buf: where to put the data we read from the ROM
  1116. * @off: file offset
  1117. * @count: number of bytes to read
  1118. *
  1119. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1120. * device corresponding to @kobj.
  1121. */
  1122. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1123. struct bin_attribute *bin_attr, char *buf,
  1124. loff_t off, size_t count)
  1125. {
  1126. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1127. void __iomem *rom;
  1128. size_t size;
  1129. if (!pdev->rom_attr_enabled)
  1130. return -EINVAL;
  1131. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1132. if (!rom || !size)
  1133. return -EIO;
  1134. if (off >= size)
  1135. count = 0;
  1136. else {
  1137. if (off + count > size)
  1138. count = size - off;
  1139. memcpy_fromio(buf, rom + off, count);
  1140. }
  1141. pci_unmap_rom(pdev, rom);
  1142. return count;
  1143. }
  1144. static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);
  1145. static struct bin_attribute *pci_dev_rom_attrs[] = {
  1146. &bin_attr_rom,
  1147. NULL,
  1148. };
  1149. static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,
  1150. struct bin_attribute *a, int n)
  1151. {
  1152. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1153. size_t rom_size;
  1154. /* If the device has a ROM, try to expose it in sysfs. */
  1155. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1156. if (!rom_size)
  1157. return 0;
  1158. a->size = rom_size;
  1159. return a->attr.mode;
  1160. }
  1161. static const struct attribute_group pci_dev_rom_attr_group = {
  1162. .bin_attrs = pci_dev_rom_attrs,
  1163. .is_bin_visible = pci_dev_rom_attr_is_visible,
  1164. };
  1165. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1166. const char *buf, size_t count)
  1167. {
  1168. struct pci_dev *pdev = to_pci_dev(dev);
  1169. unsigned long val;
  1170. ssize_t result;
  1171. if (kstrtoul(buf, 0, &val) < 0)
  1172. return -EINVAL;
  1173. if (val != 1)
  1174. return -EINVAL;
  1175. pm_runtime_get_sync(dev);
  1176. result = pci_reset_function(pdev);
  1177. pm_runtime_put(dev);
  1178. if (result < 0)
  1179. return result;
  1180. return count;
  1181. }
  1182. static DEVICE_ATTR_WO(reset);
  1183. static struct attribute *pci_dev_reset_attrs[] = {
  1184. &dev_attr_reset.attr,
  1185. NULL,
  1186. };
  1187. static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,
  1188. struct attribute *a, int n)
  1189. {
  1190. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1191. if (!pci_reset_supported(pdev))
  1192. return 0;
  1193. return a->mode;
  1194. }
  1195. static const struct attribute_group pci_dev_reset_attr_group = {
  1196. .attrs = pci_dev_reset_attrs,
  1197. .is_visible = pci_dev_reset_attr_is_visible,
  1198. };
  1199. static ssize_t __resource_resize_show(struct device *dev, int n, char *buf)
  1200. {
  1201. struct pci_dev *pdev = to_pci_dev(dev);
  1202. ssize_t ret;
  1203. pci_config_pm_runtime_get(pdev);
  1204. ret = sysfs_emit(buf, "%016llx\n",
  1205. (u64)pci_rebar_get_possible_sizes(pdev, n));
  1206. pci_config_pm_runtime_put(pdev);
  1207. return ret;
  1208. }
  1209. static ssize_t __resource_resize_store(struct device *dev, int n,
  1210. const char *buf, size_t count)
  1211. {
  1212. struct pci_dev *pdev = to_pci_dev(dev);
  1213. unsigned long size, flags;
  1214. int ret, i;
  1215. u16 cmd;
  1216. if (kstrtoul(buf, 0, &size) < 0)
  1217. return -EINVAL;
  1218. device_lock(dev);
  1219. if (dev->driver) {
  1220. ret = -EBUSY;
  1221. goto unlock;
  1222. }
  1223. pci_config_pm_runtime_get(pdev);
  1224. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1225. ret = aperture_remove_conflicting_pci_devices(pdev,
  1226. "resourceN_resize");
  1227. if (ret)
  1228. goto pm_put;
  1229. }
  1230. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  1231. pci_write_config_word(pdev, PCI_COMMAND,
  1232. cmd & ~PCI_COMMAND_MEMORY);
  1233. flags = pci_resource_flags(pdev, n);
  1234. pci_remove_resource_files(pdev);
  1235. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  1236. if (pci_resource_len(pdev, i) &&
  1237. pci_resource_flags(pdev, i) == flags)
  1238. pci_release_resource(pdev, i);
  1239. }
  1240. ret = pci_resize_resource(pdev, n, size);
  1241. pci_assign_unassigned_bus_resources(pdev->bus);
  1242. if (pci_create_resource_files(pdev))
  1243. pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");
  1244. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  1245. pm_put:
  1246. pci_config_pm_runtime_put(pdev);
  1247. unlock:
  1248. device_unlock(dev);
  1249. return ret ? ret : count;
  1250. }
  1251. #define pci_dev_resource_resize_attr(n) \
  1252. static ssize_t resource##n##_resize_show(struct device *dev, \
  1253. struct device_attribute *attr, \
  1254. char *buf) \
  1255. { \
  1256. return __resource_resize_show(dev, n, buf); \
  1257. } \
  1258. static ssize_t resource##n##_resize_store(struct device *dev, \
  1259. struct device_attribute *attr,\
  1260. const char *buf, size_t count)\
  1261. { \
  1262. return __resource_resize_store(dev, n, buf, count); \
  1263. } \
  1264. static DEVICE_ATTR_RW(resource##n##_resize)
  1265. pci_dev_resource_resize_attr(0);
  1266. pci_dev_resource_resize_attr(1);
  1267. pci_dev_resource_resize_attr(2);
  1268. pci_dev_resource_resize_attr(3);
  1269. pci_dev_resource_resize_attr(4);
  1270. pci_dev_resource_resize_attr(5);
  1271. static struct attribute *resource_resize_attrs[] = {
  1272. &dev_attr_resource0_resize.attr,
  1273. &dev_attr_resource1_resize.attr,
  1274. &dev_attr_resource2_resize.attr,
  1275. &dev_attr_resource3_resize.attr,
  1276. &dev_attr_resource4_resize.attr,
  1277. &dev_attr_resource5_resize.attr,
  1278. NULL,
  1279. };
  1280. static umode_t resource_resize_is_visible(struct kobject *kobj,
  1281. struct attribute *a, int n)
  1282. {
  1283. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1284. return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;
  1285. }
  1286. static const struct attribute_group pci_dev_resource_resize_group = {
  1287. .attrs = resource_resize_attrs,
  1288. .is_visible = resource_resize_is_visible,
  1289. };
  1290. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1291. {
  1292. if (!sysfs_initialized)
  1293. return -EACCES;
  1294. return pci_create_resource_files(pdev);
  1295. }
  1296. /**
  1297. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1298. * @pdev: device whose entries we should free
  1299. *
  1300. * Cleanup when @pdev is removed from sysfs.
  1301. */
  1302. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1303. {
  1304. if (!sysfs_initialized)
  1305. return;
  1306. pci_remove_resource_files(pdev);
  1307. }
  1308. static int __init pci_sysfs_init(void)
  1309. {
  1310. struct pci_dev *pdev = NULL;
  1311. struct pci_bus *pbus = NULL;
  1312. int retval;
  1313. sysfs_initialized = 1;
  1314. for_each_pci_dev(pdev) {
  1315. retval = pci_create_sysfs_dev_files(pdev);
  1316. if (retval) {
  1317. pci_dev_put(pdev);
  1318. return retval;
  1319. }
  1320. }
  1321. while ((pbus = pci_find_next_bus(pbus)))
  1322. pci_create_legacy_files(pbus);
  1323. return 0;
  1324. }
  1325. late_initcall(pci_sysfs_init);
  1326. static struct attribute *pci_dev_dev_attrs[] = {
  1327. &dev_attr_boot_vga.attr,
  1328. NULL,
  1329. };
  1330. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1331. struct attribute *a, int n)
  1332. {
  1333. struct device *dev = kobj_to_dev(kobj);
  1334. struct pci_dev *pdev = to_pci_dev(dev);
  1335. if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev))
  1336. return a->mode;
  1337. return 0;
  1338. }
  1339. static struct attribute *pci_dev_hp_attrs[] = {
  1340. &dev_attr_remove.attr,
  1341. &dev_attr_dev_rescan.attr,
  1342. NULL,
  1343. };
  1344. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1345. struct attribute *a, int n)
  1346. {
  1347. struct device *dev = kobj_to_dev(kobj);
  1348. struct pci_dev *pdev = to_pci_dev(dev);
  1349. if (pdev->is_virtfn)
  1350. return 0;
  1351. return a->mode;
  1352. }
  1353. static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
  1354. struct attribute *a, int n)
  1355. {
  1356. struct device *dev = kobj_to_dev(kobj);
  1357. struct pci_dev *pdev = to_pci_dev(dev);
  1358. if (pci_is_bridge(pdev))
  1359. return a->mode;
  1360. return 0;
  1361. }
  1362. static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
  1363. struct attribute *a, int n)
  1364. {
  1365. struct device *dev = kobj_to_dev(kobj);
  1366. struct pci_dev *pdev = to_pci_dev(dev);
  1367. if (pci_is_pcie(pdev))
  1368. return a->mode;
  1369. return 0;
  1370. }
  1371. static const struct attribute_group pci_dev_group = {
  1372. .attrs = pci_dev_attrs,
  1373. };
  1374. const struct attribute_group *pci_dev_groups[] = {
  1375. &pci_dev_group,
  1376. &pci_dev_config_attr_group,
  1377. &pci_dev_rom_attr_group,
  1378. &pci_dev_reset_attr_group,
  1379. &pci_dev_reset_method_attr_group,
  1380. &pci_dev_vpd_attr_group,
  1381. #ifdef CONFIG_DMI
  1382. &pci_dev_smbios_attr_group,
  1383. #endif
  1384. #ifdef CONFIG_ACPI
  1385. &pci_dev_acpi_attr_group,
  1386. #endif
  1387. &pci_dev_resource_resize_group,
  1388. ARCH_PCI_DEV_GROUPS
  1389. NULL,
  1390. };
  1391. static const struct attribute_group pci_dev_hp_attr_group = {
  1392. .attrs = pci_dev_hp_attrs,
  1393. .is_visible = pci_dev_hp_attrs_are_visible,
  1394. };
  1395. static const struct attribute_group pci_dev_attr_group = {
  1396. .attrs = pci_dev_dev_attrs,
  1397. .is_visible = pci_dev_attrs_are_visible,
  1398. };
  1399. static const struct attribute_group pci_bridge_attr_group = {
  1400. .attrs = pci_bridge_attrs,
  1401. .is_visible = pci_bridge_attrs_are_visible,
  1402. };
  1403. static const struct attribute_group pcie_dev_attr_group = {
  1404. .attrs = pcie_dev_attrs,
  1405. .is_visible = pcie_dev_attrs_are_visible,
  1406. };
  1407. const struct attribute_group *pci_dev_attr_groups[] = {
  1408. &pci_dev_attr_group,
  1409. &pci_dev_hp_attr_group,
  1410. #ifdef CONFIG_PCI_IOV
  1411. &sriov_pf_dev_attr_group,
  1412. &sriov_vf_dev_attr_group,
  1413. #endif
  1414. &pci_bridge_attr_group,
  1415. &pcie_dev_attr_group,
  1416. #ifdef CONFIG_PCIEAER
  1417. &aer_stats_attr_group,
  1418. #endif
  1419. #ifdef CONFIG_PCIEASPM
  1420. &aspm_ctrl_attr_group,
  1421. #endif
  1422. NULL,
  1423. };