phy-qcom-qmp-common.h 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2017, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef QCOM_PHY_QMP_COMMON_H_
  6. #define QCOM_PHY_QMP_COMMON_H_
  7. struct qmp_phy_init_tbl {
  8. unsigned int offset;
  9. unsigned int val;
  10. char *name;
  11. /*
  12. * mask of lanes for which this register is written
  13. * for cases when second lane needs different values
  14. */
  15. u8 lane_mask;
  16. };
  17. #define QMP_PHY_INIT_CFG(o, v) \
  18. { \
  19. .offset = o, \
  20. .val = v, \
  21. .name = #o, \
  22. .lane_mask = 0xff, \
  23. }
  24. #define QMP_PHY_INIT_CFG_LANE(o, v, l) \
  25. { \
  26. .offset = o, \
  27. .val = v, \
  28. .name = #o, \
  29. .lane_mask = l, \
  30. }
  31. static inline void qmp_configure_lane(struct device *dev, void __iomem *base,
  32. const struct qmp_phy_init_tbl tbl[],
  33. int num, u8 lane_mask)
  34. {
  35. int i;
  36. const struct qmp_phy_init_tbl *t = tbl;
  37. if (!t)
  38. return;
  39. for (i = 0; i < num; i++, t++) {
  40. if (!(t->lane_mask & lane_mask))
  41. continue;
  42. dev_dbg(dev, "Writing Reg: %s Offset: 0x%04x Val: 0x%02x\n",
  43. t->name, t->offset, t->val);
  44. writel(t->val, base + t->offset);
  45. }
  46. }
  47. static inline void qmp_configure(struct device *dev, void __iomem *base,
  48. const struct qmp_phy_init_tbl tbl[], int num)
  49. {
  50. qmp_configure_lane(dev, base, tbl, num, 0xff);
  51. }
  52. #endif