phy-rtk-usb2.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * phy-rtk-usb2.c RTK usb2.0 PHY driver
  4. *
  5. * Copyright (C) 2023 Realtek Semiconductor Corporation
  6. *
  7. */
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/of_address.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/uaccess.h>
  13. #include <linux/debugfs.h>
  14. #include <linux/nvmem-consumer.h>
  15. #include <linux/regmap.h>
  16. #include <linux/sys_soc.h>
  17. #include <linux/mfd/syscon.h>
  18. #include <linux/phy/phy.h>
  19. #include <linux/usb.h>
  20. /* GUSB2PHYACCn register */
  21. #define PHY_NEW_REG_REQ BIT(25)
  22. #define PHY_VSTS_BUSY BIT(23)
  23. #define PHY_VCTRL_SHIFT 8
  24. #define PHY_REG_DATA_MASK 0xff
  25. #define GET_LOW_NIBBLE(addr) ((addr) & 0x0f)
  26. #define GET_HIGH_NIBBLE(addr) (((addr) & 0xf0) >> 4)
  27. #define EFUS_USB_DC_CAL_RATE 2
  28. #define EFUS_USB_DC_CAL_MAX 7
  29. #define EFUS_USB_DC_DIS_RATE 1
  30. #define EFUS_USB_DC_DIS_MAX 7
  31. #define MAX_PHY_DATA_SIZE 20
  32. #define OFFEST_PHY_READ 0x20
  33. #define MAX_USB_PHY_NUM 4
  34. #define MAX_USB_PHY_PAGE0_DATA_SIZE 16
  35. #define MAX_USB_PHY_PAGE1_DATA_SIZE 16
  36. #define MAX_USB_PHY_PAGE2_DATA_SIZE 8
  37. #define SET_PAGE_OFFSET 0xf4
  38. #define SET_PAGE_0 0x9b
  39. #define SET_PAGE_1 0xbb
  40. #define SET_PAGE_2 0xdb
  41. #define PAGE_START 0xe0
  42. #define PAGE0_0XE4 0xe4
  43. #define PAGE0_0XE6 0xe6
  44. #define PAGE0_0XE7 0xe7
  45. #define PAGE1_0XE0 0xe0
  46. #define PAGE1_0XE2 0xe2
  47. #define SENSITIVITY_CTRL (BIT(4) | BIT(5) | BIT(6))
  48. #define ENABLE_AUTO_SENSITIVITY_CALIBRATION BIT(2)
  49. #define DEFAULT_DC_DRIVING_VALUE (0x8)
  50. #define DEFAULT_DC_DISCONNECTION_VALUE (0x6)
  51. #define HS_CLK_SELECT BIT(6)
  52. struct phy_reg {
  53. void __iomem *reg_wrap_vstatus;
  54. void __iomem *reg_gusb2phyacc0;
  55. int vstatus_index;
  56. };
  57. struct phy_data {
  58. u8 addr;
  59. u8 data;
  60. };
  61. struct phy_cfg {
  62. int page0_size;
  63. struct phy_data page0[MAX_USB_PHY_PAGE0_DATA_SIZE];
  64. int page1_size;
  65. struct phy_data page1[MAX_USB_PHY_PAGE1_DATA_SIZE];
  66. int page2_size;
  67. struct phy_data page2[MAX_USB_PHY_PAGE2_DATA_SIZE];
  68. int num_phy;
  69. bool check_efuse;
  70. int check_efuse_version;
  71. #define CHECK_EFUSE_V1 1
  72. #define CHECK_EFUSE_V2 2
  73. int efuse_dc_driving_rate;
  74. int efuse_dc_disconnect_rate;
  75. int dc_driving_mask;
  76. int dc_disconnect_mask;
  77. bool usb_dc_disconnect_at_page0;
  78. int driving_updated_for_dev_dis;
  79. bool do_toggle;
  80. bool do_toggle_driving;
  81. bool use_default_parameter;
  82. bool is_double_sensitivity_mode;
  83. };
  84. struct phy_parameter {
  85. struct phy_reg phy_reg;
  86. /* Get from efuse */
  87. s8 efuse_usb_dc_cal;
  88. s8 efuse_usb_dc_dis;
  89. /* Get from dts */
  90. bool inverse_hstx_sync_clock;
  91. u32 driving_level;
  92. s32 driving_level_compensate;
  93. s32 disconnection_compensate;
  94. };
  95. struct rtk_phy {
  96. struct device *dev;
  97. struct phy_cfg *phy_cfg;
  98. int num_phy;
  99. struct phy_parameter *phy_parameter;
  100. struct dentry *debug_dir;
  101. };
  102. /* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */
  103. static inline int page_addr_to_array_index(u8 addr)
  104. {
  105. return (int)((((addr) - PAGE_START) & 0x7) +
  106. ((((addr) - PAGE_START) & 0x10) >> 1));
  107. }
  108. static inline u8 array_index_to_page_addr(int index)
  109. {
  110. return ((((index) + PAGE_START) & 0x7) +
  111. ((((index) & 0x8) << 1) + PAGE_START));
  112. }
  113. #define PHY_IO_TIMEOUT_USEC (50000)
  114. #define PHY_IO_DELAY_US (100)
  115. static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result)
  116. {
  117. int ret;
  118. unsigned int val;
  119. ret = read_poll_timeout(readl, val, ((val & mask) == result),
  120. PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg);
  121. if (ret) {
  122. pr_err("%s can't program USB phy\n", __func__);
  123. return -ETIMEDOUT;
  124. }
  125. return 0;
  126. }
  127. static char rtk_phy_read(struct phy_reg *phy_reg, char addr)
  128. {
  129. void __iomem *reg_gusb2phyacc0 = phy_reg->reg_gusb2phyacc0;
  130. unsigned int val;
  131. int ret = 0;
  132. addr -= OFFEST_PHY_READ;
  133. /* polling until VBusy == 0 */
  134. ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0);
  135. if (ret)
  136. return (char)ret;
  137. /* VCtrl = low nibble of addr, and set PHY_NEW_REG_REQ */
  138. val = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT);
  139. writel(val, reg_gusb2phyacc0);
  140. ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0);
  141. if (ret)
  142. return (char)ret;
  143. /* VCtrl = high nibble of addr, and set PHY_NEW_REG_REQ */
  144. val = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT);
  145. writel(val, reg_gusb2phyacc0);
  146. ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0);
  147. if (ret)
  148. return (char)ret;
  149. val = readl(reg_gusb2phyacc0);
  150. return (char)(val & PHY_REG_DATA_MASK);
  151. }
  152. static int rtk_phy_write(struct phy_reg *phy_reg, char addr, char data)
  153. {
  154. unsigned int val;
  155. void __iomem *reg_wrap_vstatus = phy_reg->reg_wrap_vstatus;
  156. void __iomem *reg_gusb2phyacc0 = phy_reg->reg_gusb2phyacc0;
  157. int shift_bits = phy_reg->vstatus_index * 8;
  158. int ret = 0;
  159. /* write data to VStatusOut2 (data output to phy) */
  160. writel((u32)data << shift_bits, reg_wrap_vstatus);
  161. ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0);
  162. if (ret)
  163. return ret;
  164. /* VCtrl = low nibble of addr, set PHY_NEW_REG_REQ */
  165. val = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT);
  166. writel(val, reg_gusb2phyacc0);
  167. ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0);
  168. if (ret)
  169. return ret;
  170. /* VCtrl = high nibble of addr, set PHY_NEW_REG_REQ */
  171. val = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT);
  172. writel(val, reg_gusb2phyacc0);
  173. ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0);
  174. if (ret)
  175. return ret;
  176. return 0;
  177. }
  178. static int rtk_phy_set_page(struct phy_reg *phy_reg, int page)
  179. {
  180. switch (page) {
  181. case 0:
  182. return rtk_phy_write(phy_reg, SET_PAGE_OFFSET, SET_PAGE_0);
  183. case 1:
  184. return rtk_phy_write(phy_reg, SET_PAGE_OFFSET, SET_PAGE_1);
  185. case 2:
  186. return rtk_phy_write(phy_reg, SET_PAGE_OFFSET, SET_PAGE_2);
  187. default:
  188. pr_err("%s error page=%d\n", __func__, page);
  189. }
  190. return -EINVAL;
  191. }
  192. static u8 __updated_dc_disconnect_level_page0_0xe4(struct phy_cfg *phy_cfg,
  193. struct phy_parameter *phy_parameter, u8 data)
  194. {
  195. u8 ret;
  196. s32 val;
  197. s32 dc_disconnect_mask = phy_cfg->dc_disconnect_mask;
  198. int offset = 4;
  199. val = (s32)((data >> offset) & dc_disconnect_mask)
  200. + phy_parameter->efuse_usb_dc_dis
  201. + phy_parameter->disconnection_compensate;
  202. if (val > dc_disconnect_mask)
  203. val = dc_disconnect_mask;
  204. else if (val < 0)
  205. val = 0;
  206. ret = (data & (~(dc_disconnect_mask << offset))) |
  207. (val & dc_disconnect_mask) << offset;
  208. return ret;
  209. }
  210. /* updated disconnect level at page0 */
  211. static void update_dc_disconnect_level_at_page0(struct rtk_phy *rtk_phy,
  212. struct phy_parameter *phy_parameter, bool update)
  213. {
  214. struct phy_cfg *phy_cfg;
  215. struct phy_reg *phy_reg;
  216. struct phy_data *phy_data_page;
  217. struct phy_data *phy_data;
  218. u8 addr, data;
  219. int offset = 4;
  220. s32 dc_disconnect_mask;
  221. int i;
  222. phy_cfg = rtk_phy->phy_cfg;
  223. phy_reg = &phy_parameter->phy_reg;
  224. /* Set page 0 */
  225. phy_data_page = phy_cfg->page0;
  226. rtk_phy_set_page(phy_reg, 0);
  227. i = page_addr_to_array_index(PAGE0_0XE4);
  228. phy_data = phy_data_page + i;
  229. if (!phy_data->addr) {
  230. phy_data->addr = PAGE0_0XE4;
  231. phy_data->data = rtk_phy_read(phy_reg, PAGE0_0XE4);
  232. }
  233. addr = phy_data->addr;
  234. data = phy_data->data;
  235. dc_disconnect_mask = phy_cfg->dc_disconnect_mask;
  236. if (update)
  237. data = __updated_dc_disconnect_level_page0_0xe4(phy_cfg, phy_parameter, data);
  238. else
  239. data = (data & ~(dc_disconnect_mask << offset)) |
  240. (DEFAULT_DC_DISCONNECTION_VALUE << offset);
  241. if (rtk_phy_write(phy_reg, addr, data))
  242. dev_err(rtk_phy->dev,
  243. "%s: Error to set page1 parameter addr=0x%x value=0x%x\n",
  244. __func__, addr, data);
  245. }
  246. static u8 __updated_dc_disconnect_level_page1_0xe2(struct phy_cfg *phy_cfg,
  247. struct phy_parameter *phy_parameter, u8 data)
  248. {
  249. u8 ret;
  250. s32 val;
  251. s32 dc_disconnect_mask = phy_cfg->dc_disconnect_mask;
  252. if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) {
  253. val = (s32)(data & dc_disconnect_mask)
  254. + phy_parameter->efuse_usb_dc_dis
  255. + phy_parameter->disconnection_compensate;
  256. } else { /* for CHECK_EFUSE_V2 or no efuse */
  257. if (phy_parameter->efuse_usb_dc_dis)
  258. val = (s32)(phy_parameter->efuse_usb_dc_dis +
  259. phy_parameter->disconnection_compensate);
  260. else
  261. val = (s32)((data & dc_disconnect_mask) +
  262. phy_parameter->disconnection_compensate);
  263. }
  264. if (val > dc_disconnect_mask)
  265. val = dc_disconnect_mask;
  266. else if (val < 0)
  267. val = 0;
  268. ret = (data & (~dc_disconnect_mask)) | (val & dc_disconnect_mask);
  269. return ret;
  270. }
  271. /* updated disconnect level at page1 */
  272. static void update_dc_disconnect_level_at_page1(struct rtk_phy *rtk_phy,
  273. struct phy_parameter *phy_parameter, bool update)
  274. {
  275. struct phy_cfg *phy_cfg;
  276. struct phy_data *phy_data_page;
  277. struct phy_data *phy_data;
  278. struct phy_reg *phy_reg;
  279. u8 addr, data;
  280. s32 dc_disconnect_mask;
  281. int i;
  282. phy_cfg = rtk_phy->phy_cfg;
  283. phy_reg = &phy_parameter->phy_reg;
  284. /* Set page 1 */
  285. phy_data_page = phy_cfg->page1;
  286. rtk_phy_set_page(phy_reg, 1);
  287. i = page_addr_to_array_index(PAGE1_0XE2);
  288. phy_data = phy_data_page + i;
  289. if (!phy_data->addr) {
  290. phy_data->addr = PAGE1_0XE2;
  291. phy_data->data = rtk_phy_read(phy_reg, PAGE1_0XE2);
  292. }
  293. addr = phy_data->addr;
  294. data = phy_data->data;
  295. dc_disconnect_mask = phy_cfg->dc_disconnect_mask;
  296. if (update)
  297. data = __updated_dc_disconnect_level_page1_0xe2(phy_cfg, phy_parameter, data);
  298. else
  299. data = (data & ~dc_disconnect_mask) | DEFAULT_DC_DISCONNECTION_VALUE;
  300. if (rtk_phy_write(phy_reg, addr, data))
  301. dev_err(rtk_phy->dev,
  302. "%s: Error to set page1 parameter addr=0x%x value=0x%x\n",
  303. __func__, addr, data);
  304. }
  305. static void update_dc_disconnect_level(struct rtk_phy *rtk_phy,
  306. struct phy_parameter *phy_parameter, bool update)
  307. {
  308. struct phy_cfg *phy_cfg = rtk_phy->phy_cfg;
  309. if (phy_cfg->usb_dc_disconnect_at_page0)
  310. update_dc_disconnect_level_at_page0(rtk_phy, phy_parameter, update);
  311. else
  312. update_dc_disconnect_level_at_page1(rtk_phy, phy_parameter, update);
  313. }
  314. static u8 __update_dc_driving_page0_0xe4(struct phy_cfg *phy_cfg,
  315. struct phy_parameter *phy_parameter, u8 data)
  316. {
  317. s32 driving_level_compensate = phy_parameter->driving_level_compensate;
  318. s32 dc_driving_mask = phy_cfg->dc_driving_mask;
  319. s32 val;
  320. u8 ret;
  321. if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) {
  322. val = (s32)(data & dc_driving_mask) + driving_level_compensate
  323. + phy_parameter->efuse_usb_dc_cal;
  324. } else { /* for CHECK_EFUSE_V2 or no efuse */
  325. if (phy_parameter->efuse_usb_dc_cal)
  326. val = (s32)((phy_parameter->efuse_usb_dc_cal & dc_driving_mask)
  327. + driving_level_compensate);
  328. else
  329. val = (s32)(data & dc_driving_mask);
  330. }
  331. if (val > dc_driving_mask)
  332. val = dc_driving_mask;
  333. else if (val < 0)
  334. val = 0;
  335. ret = (data & (~dc_driving_mask)) | (val & dc_driving_mask);
  336. return ret;
  337. }
  338. static void update_dc_driving_level(struct rtk_phy *rtk_phy,
  339. struct phy_parameter *phy_parameter)
  340. {
  341. struct phy_cfg *phy_cfg;
  342. struct phy_reg *phy_reg;
  343. phy_reg = &phy_parameter->phy_reg;
  344. phy_cfg = rtk_phy->phy_cfg;
  345. if (!phy_cfg->page0[4].addr) {
  346. rtk_phy_set_page(phy_reg, 0);
  347. phy_cfg->page0[4].addr = PAGE0_0XE4;
  348. phy_cfg->page0[4].data = rtk_phy_read(phy_reg, PAGE0_0XE4);
  349. }
  350. if (phy_parameter->driving_level != DEFAULT_DC_DRIVING_VALUE) {
  351. u32 dc_driving_mask;
  352. u8 driving_level;
  353. u8 data;
  354. data = phy_cfg->page0[4].data;
  355. dc_driving_mask = phy_cfg->dc_driving_mask;
  356. driving_level = data & dc_driving_mask;
  357. dev_dbg(rtk_phy->dev, "%s driving_level=%d => dts driving_level=%d\n",
  358. __func__, driving_level, phy_parameter->driving_level);
  359. phy_cfg->page0[4].data = (data & (~dc_driving_mask)) |
  360. (phy_parameter->driving_level & dc_driving_mask);
  361. }
  362. phy_cfg->page0[4].data = __update_dc_driving_page0_0xe4(phy_cfg,
  363. phy_parameter,
  364. phy_cfg->page0[4].data);
  365. }
  366. static void update_hs_clk_select(struct rtk_phy *rtk_phy,
  367. struct phy_parameter *phy_parameter)
  368. {
  369. struct phy_cfg *phy_cfg;
  370. struct phy_reg *phy_reg;
  371. phy_cfg = rtk_phy->phy_cfg;
  372. phy_reg = &phy_parameter->phy_reg;
  373. if (phy_parameter->inverse_hstx_sync_clock) {
  374. if (!phy_cfg->page0[6].addr) {
  375. rtk_phy_set_page(phy_reg, 0);
  376. phy_cfg->page0[6].addr = PAGE0_0XE6;
  377. phy_cfg->page0[6].data = rtk_phy_read(phy_reg, PAGE0_0XE6);
  378. }
  379. phy_cfg->page0[6].data = phy_cfg->page0[6].data | HS_CLK_SELECT;
  380. }
  381. }
  382. static void do_rtk_phy_toggle(struct rtk_phy *rtk_phy,
  383. int index, bool connect)
  384. {
  385. struct phy_parameter *phy_parameter;
  386. struct phy_cfg *phy_cfg;
  387. struct phy_reg *phy_reg;
  388. struct phy_data *phy_data_page;
  389. u8 addr, data;
  390. int i;
  391. phy_cfg = rtk_phy->phy_cfg;
  392. phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
  393. phy_reg = &phy_parameter->phy_reg;
  394. if (!phy_cfg->do_toggle)
  395. goto out;
  396. if (phy_cfg->is_double_sensitivity_mode)
  397. goto do_toggle_driving;
  398. /* Set page 0 */
  399. rtk_phy_set_page(phy_reg, 0);
  400. addr = PAGE0_0XE7;
  401. data = rtk_phy_read(phy_reg, addr);
  402. if (connect)
  403. rtk_phy_write(phy_reg, addr, data & (~SENSITIVITY_CTRL));
  404. else
  405. rtk_phy_write(phy_reg, addr, data | (SENSITIVITY_CTRL));
  406. do_toggle_driving:
  407. if (!phy_cfg->do_toggle_driving)
  408. goto do_toggle;
  409. /* Page 0 addr 0xE4 driving capability */
  410. /* Set page 0 */
  411. phy_data_page = phy_cfg->page0;
  412. rtk_phy_set_page(phy_reg, 0);
  413. i = page_addr_to_array_index(PAGE0_0XE4);
  414. addr = phy_data_page[i].addr;
  415. data = phy_data_page[i].data;
  416. if (connect) {
  417. rtk_phy_write(phy_reg, addr, data);
  418. } else {
  419. u8 value;
  420. s32 tmp;
  421. s32 driving_updated =
  422. phy_cfg->driving_updated_for_dev_dis;
  423. s32 dc_driving_mask = phy_cfg->dc_driving_mask;
  424. tmp = (s32)(data & dc_driving_mask) + driving_updated;
  425. if (tmp > dc_driving_mask)
  426. tmp = dc_driving_mask;
  427. else if (tmp < 0)
  428. tmp = 0;
  429. value = (data & (~dc_driving_mask)) | (tmp & dc_driving_mask);
  430. rtk_phy_write(phy_reg, addr, value);
  431. }
  432. do_toggle:
  433. /* restore dc disconnect level before toggle */
  434. update_dc_disconnect_level(rtk_phy, phy_parameter, false);
  435. /* Set page 1 */
  436. rtk_phy_set_page(phy_reg, 1);
  437. addr = PAGE1_0XE0;
  438. data = rtk_phy_read(phy_reg, addr);
  439. rtk_phy_write(phy_reg, addr, data &
  440. (~ENABLE_AUTO_SENSITIVITY_CALIBRATION));
  441. mdelay(1);
  442. rtk_phy_write(phy_reg, addr, data |
  443. (ENABLE_AUTO_SENSITIVITY_CALIBRATION));
  444. /* update dc disconnect level after toggle */
  445. update_dc_disconnect_level(rtk_phy, phy_parameter, true);
  446. out:
  447. return;
  448. }
  449. static int do_rtk_phy_init(struct rtk_phy *rtk_phy, int index)
  450. {
  451. struct phy_parameter *phy_parameter;
  452. struct phy_cfg *phy_cfg;
  453. struct phy_data *phy_data_page;
  454. struct phy_reg *phy_reg;
  455. int i;
  456. phy_cfg = rtk_phy->phy_cfg;
  457. phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
  458. phy_reg = &phy_parameter->phy_reg;
  459. if (phy_cfg->use_default_parameter) {
  460. dev_dbg(rtk_phy->dev, "%s phy#%d use default parameter\n",
  461. __func__, index);
  462. goto do_toggle;
  463. }
  464. /* Set page 0 */
  465. phy_data_page = phy_cfg->page0;
  466. rtk_phy_set_page(phy_reg, 0);
  467. for (i = 0; i < phy_cfg->page0_size; i++) {
  468. struct phy_data *phy_data = phy_data_page + i;
  469. u8 addr = phy_data->addr;
  470. u8 data = phy_data->data;
  471. if (!addr)
  472. continue;
  473. if (rtk_phy_write(phy_reg, addr, data)) {
  474. dev_err(rtk_phy->dev,
  475. "%s: Error to set page0 parameter addr=0x%x value=0x%x\n",
  476. __func__, addr, data);
  477. return -EINVAL;
  478. }
  479. }
  480. /* Set page 1 */
  481. phy_data_page = phy_cfg->page1;
  482. rtk_phy_set_page(phy_reg, 1);
  483. for (i = 0; i < phy_cfg->page1_size; i++) {
  484. struct phy_data *phy_data = phy_data_page + i;
  485. u8 addr = phy_data->addr;
  486. u8 data = phy_data->data;
  487. if (!addr)
  488. continue;
  489. if (rtk_phy_write(phy_reg, addr, data)) {
  490. dev_err(rtk_phy->dev,
  491. "%s: Error to set page1 parameter addr=0x%x value=0x%x\n",
  492. __func__, addr, data);
  493. return -EINVAL;
  494. }
  495. }
  496. if (phy_cfg->page2_size == 0)
  497. goto do_toggle;
  498. /* Set page 2 */
  499. phy_data_page = phy_cfg->page2;
  500. rtk_phy_set_page(phy_reg, 2);
  501. for (i = 0; i < phy_cfg->page2_size; i++) {
  502. struct phy_data *phy_data = phy_data_page + i;
  503. u8 addr = phy_data->addr;
  504. u8 data = phy_data->data;
  505. if (!addr)
  506. continue;
  507. if (rtk_phy_write(phy_reg, addr, data)) {
  508. dev_err(rtk_phy->dev,
  509. "%s: Error to set page2 parameter addr=0x%x value=0x%x\n",
  510. __func__, addr, data);
  511. return -EINVAL;
  512. }
  513. }
  514. do_toggle:
  515. do_rtk_phy_toggle(rtk_phy, index, false);
  516. return 0;
  517. }
  518. static int rtk_phy_init(struct phy *phy)
  519. {
  520. struct rtk_phy *rtk_phy = phy_get_drvdata(phy);
  521. unsigned long phy_init_time = jiffies;
  522. int i, ret = 0;
  523. if (!rtk_phy)
  524. return -EINVAL;
  525. for (i = 0; i < rtk_phy->num_phy; i++)
  526. ret = do_rtk_phy_init(rtk_phy, i);
  527. dev_dbg(rtk_phy->dev, "Initialized RTK USB 2.0 PHY (take %dms)\n",
  528. jiffies_to_msecs(jiffies - phy_init_time));
  529. return ret;
  530. }
  531. static int rtk_phy_exit(struct phy *phy)
  532. {
  533. return 0;
  534. }
  535. static void rtk_phy_toggle(struct rtk_phy *rtk_phy, bool connect, int port)
  536. {
  537. int index = port;
  538. if (index > rtk_phy->num_phy) {
  539. dev_err(rtk_phy->dev, "%s: The port=%d is not in usb phy (num_phy=%d)\n",
  540. __func__, index, rtk_phy->num_phy);
  541. return;
  542. }
  543. do_rtk_phy_toggle(rtk_phy, index, connect);
  544. }
  545. static int rtk_phy_connect(struct phy *phy, int port)
  546. {
  547. struct rtk_phy *rtk_phy = phy_get_drvdata(phy);
  548. dev_dbg(rtk_phy->dev, "%s port=%d\n", __func__, port);
  549. rtk_phy_toggle(rtk_phy, true, port);
  550. return 0;
  551. }
  552. static int rtk_phy_disconnect(struct phy *phy, int port)
  553. {
  554. struct rtk_phy *rtk_phy = phy_get_drvdata(phy);
  555. dev_dbg(rtk_phy->dev, "%s port=%d\n", __func__, port);
  556. rtk_phy_toggle(rtk_phy, false, port);
  557. return 0;
  558. }
  559. static const struct phy_ops ops = {
  560. .init = rtk_phy_init,
  561. .exit = rtk_phy_exit,
  562. .connect = rtk_phy_connect,
  563. .disconnect = rtk_phy_disconnect,
  564. .owner = THIS_MODULE,
  565. };
  566. #ifdef CONFIG_DEBUG_FS
  567. static struct dentry *create_phy_debug_root(void)
  568. {
  569. struct dentry *phy_debug_root;
  570. phy_debug_root = debugfs_lookup("phy", usb_debug_root);
  571. if (!phy_debug_root)
  572. phy_debug_root = debugfs_create_dir("phy", usb_debug_root);
  573. return phy_debug_root;
  574. }
  575. static int rtk_usb2_parameter_show(struct seq_file *s, void *unused)
  576. {
  577. struct rtk_phy *rtk_phy = s->private;
  578. struct phy_cfg *phy_cfg;
  579. int i, index;
  580. phy_cfg = rtk_phy->phy_cfg;
  581. seq_puts(s, "Property:\n");
  582. seq_printf(s, " check_efuse: %s\n",
  583. phy_cfg->check_efuse ? "Enable" : "Disable");
  584. seq_printf(s, " check_efuse_version: %d\n",
  585. phy_cfg->check_efuse_version);
  586. seq_printf(s, " efuse_dc_driving_rate: %d\n",
  587. phy_cfg->efuse_dc_driving_rate);
  588. seq_printf(s, " dc_driving_mask: 0x%x\n",
  589. phy_cfg->dc_driving_mask);
  590. seq_printf(s, " efuse_dc_disconnect_rate: %d\n",
  591. phy_cfg->efuse_dc_disconnect_rate);
  592. seq_printf(s, " dc_disconnect_mask: 0x%x\n",
  593. phy_cfg->dc_disconnect_mask);
  594. seq_printf(s, " usb_dc_disconnect_at_page0: %s\n",
  595. phy_cfg->usb_dc_disconnect_at_page0 ? "true" : "false");
  596. seq_printf(s, " do_toggle: %s\n",
  597. phy_cfg->do_toggle ? "Enable" : "Disable");
  598. seq_printf(s, " do_toggle_driving: %s\n",
  599. phy_cfg->do_toggle_driving ? "Enable" : "Disable");
  600. seq_printf(s, " driving_updated_for_dev_dis: 0x%x\n",
  601. phy_cfg->driving_updated_for_dev_dis);
  602. seq_printf(s, " use_default_parameter: %s\n",
  603. phy_cfg->use_default_parameter ? "Enable" : "Disable");
  604. seq_printf(s, " is_double_sensitivity_mode: %s\n",
  605. phy_cfg->is_double_sensitivity_mode ? "Enable" : "Disable");
  606. for (index = 0; index < rtk_phy->num_phy; index++) {
  607. struct phy_parameter *phy_parameter;
  608. struct phy_reg *phy_reg;
  609. struct phy_data *phy_data_page;
  610. phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
  611. phy_reg = &phy_parameter->phy_reg;
  612. seq_printf(s, "PHY %d:\n", index);
  613. seq_puts(s, "Page 0:\n");
  614. /* Set page 0 */
  615. phy_data_page = phy_cfg->page0;
  616. rtk_phy_set_page(phy_reg, 0);
  617. for (i = 0; i < phy_cfg->page0_size; i++) {
  618. struct phy_data *phy_data = phy_data_page + i;
  619. u8 addr = array_index_to_page_addr(i);
  620. u8 data = phy_data->data;
  621. u8 value = rtk_phy_read(phy_reg, addr);
  622. if (phy_data->addr)
  623. seq_printf(s, " Page 0: addr=0x%x data=0x%02x ==> read value=0x%02x\n",
  624. addr, data, value);
  625. else
  626. seq_printf(s, " Page 0: addr=0x%x data=none ==> read value=0x%02x\n",
  627. addr, value);
  628. }
  629. seq_puts(s, "Page 1:\n");
  630. /* Set page 1 */
  631. phy_data_page = phy_cfg->page1;
  632. rtk_phy_set_page(phy_reg, 1);
  633. for (i = 0; i < phy_cfg->page1_size; i++) {
  634. struct phy_data *phy_data = phy_data_page + i;
  635. u8 addr = array_index_to_page_addr(i);
  636. u8 data = phy_data->data;
  637. u8 value = rtk_phy_read(phy_reg, addr);
  638. if (phy_data->addr)
  639. seq_printf(s, " Page 1: addr=0x%x data=0x%02x ==> read value=0x%02x\n",
  640. addr, data, value);
  641. else
  642. seq_printf(s, " Page 1: addr=0x%x data=none ==> read value=0x%02x\n",
  643. addr, value);
  644. }
  645. if (phy_cfg->page2_size == 0)
  646. goto out;
  647. seq_puts(s, "Page 2:\n");
  648. /* Set page 2 */
  649. phy_data_page = phy_cfg->page2;
  650. rtk_phy_set_page(phy_reg, 2);
  651. for (i = 0; i < phy_cfg->page2_size; i++) {
  652. struct phy_data *phy_data = phy_data_page + i;
  653. u8 addr = array_index_to_page_addr(i);
  654. u8 data = phy_data->data;
  655. u8 value = rtk_phy_read(phy_reg, addr);
  656. if (phy_data->addr)
  657. seq_printf(s, " Page 2: addr=0x%x data=0x%02x ==> read value=0x%02x\n",
  658. addr, data, value);
  659. else
  660. seq_printf(s, " Page 2: addr=0x%x data=none ==> read value=0x%02x\n",
  661. addr, value);
  662. }
  663. out:
  664. seq_puts(s, "PHY Property:\n");
  665. seq_printf(s, " efuse_usb_dc_cal: %d\n",
  666. (int)phy_parameter->efuse_usb_dc_cal);
  667. seq_printf(s, " efuse_usb_dc_dis: %d\n",
  668. (int)phy_parameter->efuse_usb_dc_dis);
  669. seq_printf(s, " inverse_hstx_sync_clock: %s\n",
  670. phy_parameter->inverse_hstx_sync_clock ? "Enable" : "Disable");
  671. seq_printf(s, " driving_level: %d\n",
  672. phy_parameter->driving_level);
  673. seq_printf(s, " driving_level_compensate: %d\n",
  674. phy_parameter->driving_level_compensate);
  675. seq_printf(s, " disconnection_compensate: %d\n",
  676. phy_parameter->disconnection_compensate);
  677. }
  678. return 0;
  679. }
  680. DEFINE_SHOW_ATTRIBUTE(rtk_usb2_parameter);
  681. static inline void create_debug_files(struct rtk_phy *rtk_phy)
  682. {
  683. struct dentry *phy_debug_root = NULL;
  684. phy_debug_root = create_phy_debug_root();
  685. if (!phy_debug_root)
  686. return;
  687. rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev),
  688. phy_debug_root);
  689. debugfs_create_file("parameter", 0444, rtk_phy->debug_dir, rtk_phy,
  690. &rtk_usb2_parameter_fops);
  691. }
  692. static inline void remove_debug_files(struct rtk_phy *rtk_phy)
  693. {
  694. debugfs_remove_recursive(rtk_phy->debug_dir);
  695. }
  696. #else
  697. static inline void create_debug_files(struct rtk_phy *rtk_phy) { }
  698. static inline void remove_debug_files(struct rtk_phy *rtk_phy) { }
  699. #endif /* CONFIG_DEBUG_FS */
  700. static int get_phy_data_by_efuse(struct rtk_phy *rtk_phy,
  701. struct phy_parameter *phy_parameter, int index)
  702. {
  703. struct phy_cfg *phy_cfg = rtk_phy->phy_cfg;
  704. u8 value = 0;
  705. struct nvmem_cell *cell;
  706. struct soc_device_attribute rtk_soc_groot[] = {
  707. { .family = "Realtek Groot",},
  708. { /* empty */ } };
  709. if (!phy_cfg->check_efuse)
  710. goto out;
  711. /* Read efuse for usb dc cal */
  712. cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-cal");
  713. if (IS_ERR(cell)) {
  714. dev_dbg(rtk_phy->dev, "%s no usb-dc-cal: %ld\n",
  715. __func__, PTR_ERR(cell));
  716. } else {
  717. unsigned char *buf;
  718. size_t buf_size;
  719. buf = nvmem_cell_read(cell, &buf_size);
  720. if (!IS_ERR(buf)) {
  721. value = buf[0] & phy_cfg->dc_driving_mask;
  722. kfree(buf);
  723. }
  724. nvmem_cell_put(cell);
  725. }
  726. if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) {
  727. int rate = phy_cfg->efuse_dc_driving_rate;
  728. if (value <= EFUS_USB_DC_CAL_MAX)
  729. phy_parameter->efuse_usb_dc_cal = (int8_t)(value * rate);
  730. else
  731. phy_parameter->efuse_usb_dc_cal = -(int8_t)
  732. ((EFUS_USB_DC_CAL_MAX & value) * rate);
  733. if (soc_device_match(rtk_soc_groot)) {
  734. dev_dbg(rtk_phy->dev, "For groot IC we need a workaround to adjust efuse_usb_dc_cal\n");
  735. /* We don't multiple dc_cal_rate=2 for positive dc cal compensate */
  736. if (value <= EFUS_USB_DC_CAL_MAX)
  737. phy_parameter->efuse_usb_dc_cal = (int8_t)(value);
  738. /* We set max dc cal compensate is 0x8 if otp is 0x7 */
  739. if (value == 0x7)
  740. phy_parameter->efuse_usb_dc_cal = (int8_t)(value + 1);
  741. }
  742. } else { /* for CHECK_EFUSE_V2 */
  743. phy_parameter->efuse_usb_dc_cal = value & phy_cfg->dc_driving_mask;
  744. }
  745. /* Read efuse for usb dc disconnect level */
  746. value = 0;
  747. cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-dis");
  748. if (IS_ERR(cell)) {
  749. dev_dbg(rtk_phy->dev, "%s no usb-dc-dis: %ld\n",
  750. __func__, PTR_ERR(cell));
  751. } else {
  752. unsigned char *buf;
  753. size_t buf_size;
  754. buf = nvmem_cell_read(cell, &buf_size);
  755. if (!IS_ERR(buf)) {
  756. value = buf[0] & phy_cfg->dc_disconnect_mask;
  757. kfree(buf);
  758. }
  759. nvmem_cell_put(cell);
  760. }
  761. if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) {
  762. int rate = phy_cfg->efuse_dc_disconnect_rate;
  763. if (value <= EFUS_USB_DC_DIS_MAX)
  764. phy_parameter->efuse_usb_dc_dis = (int8_t)(value * rate);
  765. else
  766. phy_parameter->efuse_usb_dc_dis = -(int8_t)
  767. ((EFUS_USB_DC_DIS_MAX & value) * rate);
  768. } else { /* for CHECK_EFUSE_V2 */
  769. phy_parameter->efuse_usb_dc_dis = value & phy_cfg->dc_disconnect_mask;
  770. }
  771. out:
  772. return 0;
  773. }
  774. static int parse_phy_data(struct rtk_phy *rtk_phy)
  775. {
  776. struct device *dev = rtk_phy->dev;
  777. struct device_node *np = dev->of_node;
  778. struct phy_parameter *phy_parameter;
  779. int ret = 0;
  780. int index;
  781. rtk_phy->phy_parameter = devm_kzalloc(dev, sizeof(struct phy_parameter) *
  782. rtk_phy->num_phy, GFP_KERNEL);
  783. if (!rtk_phy->phy_parameter)
  784. return -ENOMEM;
  785. for (index = 0; index < rtk_phy->num_phy; index++) {
  786. phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index];
  787. phy_parameter->phy_reg.reg_wrap_vstatus = of_iomap(np, 0);
  788. phy_parameter->phy_reg.reg_gusb2phyacc0 = of_iomap(np, 1) + index;
  789. phy_parameter->phy_reg.vstatus_index = index;
  790. if (of_property_read_bool(np, "realtek,inverse-hstx-sync-clock"))
  791. phy_parameter->inverse_hstx_sync_clock = true;
  792. else
  793. phy_parameter->inverse_hstx_sync_clock = false;
  794. if (of_property_read_u32_index(np, "realtek,driving-level",
  795. index, &phy_parameter->driving_level))
  796. phy_parameter->driving_level = DEFAULT_DC_DRIVING_VALUE;
  797. if (of_property_read_u32_index(np, "realtek,driving-level-compensate",
  798. index, &phy_parameter->driving_level_compensate))
  799. phy_parameter->driving_level_compensate = 0;
  800. if (of_property_read_u32_index(np, "realtek,disconnection-compensate",
  801. index, &phy_parameter->disconnection_compensate))
  802. phy_parameter->disconnection_compensate = 0;
  803. get_phy_data_by_efuse(rtk_phy, phy_parameter, index);
  804. update_dc_driving_level(rtk_phy, phy_parameter);
  805. update_hs_clk_select(rtk_phy, phy_parameter);
  806. }
  807. return ret;
  808. }
  809. static int rtk_usb2phy_probe(struct platform_device *pdev)
  810. {
  811. struct rtk_phy *rtk_phy;
  812. struct device *dev = &pdev->dev;
  813. struct phy *generic_phy;
  814. struct phy_provider *phy_provider;
  815. const struct phy_cfg *phy_cfg;
  816. int ret = 0;
  817. phy_cfg = of_device_get_match_data(dev);
  818. if (!phy_cfg) {
  819. dev_err(dev, "phy config are not assigned!\n");
  820. return -EINVAL;
  821. }
  822. rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL);
  823. if (!rtk_phy)
  824. return -ENOMEM;
  825. rtk_phy->dev = &pdev->dev;
  826. rtk_phy->phy_cfg = devm_kzalloc(dev, sizeof(*phy_cfg), GFP_KERNEL);
  827. if (!rtk_phy->phy_cfg)
  828. return -ENOMEM;
  829. memcpy(rtk_phy->phy_cfg, phy_cfg, sizeof(*phy_cfg));
  830. rtk_phy->num_phy = phy_cfg->num_phy;
  831. ret = parse_phy_data(rtk_phy);
  832. if (ret)
  833. goto err;
  834. platform_set_drvdata(pdev, rtk_phy);
  835. generic_phy = devm_phy_create(rtk_phy->dev, NULL, &ops);
  836. if (IS_ERR(generic_phy))
  837. return PTR_ERR(generic_phy);
  838. phy_set_drvdata(generic_phy, rtk_phy);
  839. phy_provider = devm_of_phy_provider_register(rtk_phy->dev,
  840. of_phy_simple_xlate);
  841. if (IS_ERR(phy_provider))
  842. return PTR_ERR(phy_provider);
  843. create_debug_files(rtk_phy);
  844. err:
  845. return ret;
  846. }
  847. static void rtk_usb2phy_remove(struct platform_device *pdev)
  848. {
  849. struct rtk_phy *rtk_phy = platform_get_drvdata(pdev);
  850. remove_debug_files(rtk_phy);
  851. }
  852. static const struct phy_cfg rtd1295_phy_cfg = {
  853. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  854. .page0 = { [0] = {0xe0, 0x90},
  855. [3] = {0xe3, 0x3a},
  856. [4] = {0xe4, 0x68},
  857. [6] = {0xe6, 0x91},
  858. [13] = {0xf5, 0x81},
  859. [15] = {0xf7, 0x02}, },
  860. .page1_size = 8,
  861. .page1 = { /* default parameter */ },
  862. .page2_size = 0,
  863. .page2 = { /* no parameter */ },
  864. .num_phy = 1,
  865. .check_efuse = false,
  866. .check_efuse_version = CHECK_EFUSE_V1,
  867. .efuse_dc_driving_rate = 1,
  868. .dc_driving_mask = 0xf,
  869. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  870. .dc_disconnect_mask = 0xf,
  871. .usb_dc_disconnect_at_page0 = true,
  872. .do_toggle = true,
  873. .do_toggle_driving = false,
  874. .driving_updated_for_dev_dis = 0xf,
  875. .use_default_parameter = false,
  876. .is_double_sensitivity_mode = false,
  877. };
  878. static const struct phy_cfg rtd1395_phy_cfg = {
  879. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  880. .page0 = { [4] = {0xe4, 0xac},
  881. [13] = {0xf5, 0x00},
  882. [15] = {0xf7, 0x02}, },
  883. .page1_size = 8,
  884. .page1 = { /* default parameter */ },
  885. .page2_size = 0,
  886. .page2 = { /* no parameter */ },
  887. .num_phy = 1,
  888. .check_efuse = false,
  889. .check_efuse_version = CHECK_EFUSE_V1,
  890. .efuse_dc_driving_rate = 1,
  891. .dc_driving_mask = 0xf,
  892. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  893. .dc_disconnect_mask = 0xf,
  894. .usb_dc_disconnect_at_page0 = true,
  895. .do_toggle = true,
  896. .do_toggle_driving = false,
  897. .driving_updated_for_dev_dis = 0xf,
  898. .use_default_parameter = false,
  899. .is_double_sensitivity_mode = false,
  900. };
  901. static const struct phy_cfg rtd1395_phy_cfg_2port = {
  902. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  903. .page0 = { [4] = {0xe4, 0xac},
  904. [13] = {0xf5, 0x00},
  905. [15] = {0xf7, 0x02}, },
  906. .page1_size = 8,
  907. .page1 = { /* default parameter */ },
  908. .page2_size = 0,
  909. .page2 = { /* no parameter */ },
  910. .num_phy = 2,
  911. .check_efuse = false,
  912. .check_efuse_version = CHECK_EFUSE_V1,
  913. .efuse_dc_driving_rate = 1,
  914. .dc_driving_mask = 0xf,
  915. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  916. .dc_disconnect_mask = 0xf,
  917. .usb_dc_disconnect_at_page0 = true,
  918. .do_toggle = true,
  919. .do_toggle_driving = false,
  920. .driving_updated_for_dev_dis = 0xf,
  921. .use_default_parameter = false,
  922. .is_double_sensitivity_mode = false,
  923. };
  924. static const struct phy_cfg rtd1619_phy_cfg = {
  925. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  926. .page0 = { [4] = {0xe4, 0x68}, },
  927. .page1_size = 8,
  928. .page1 = { /* default parameter */ },
  929. .page2_size = 0,
  930. .page2 = { /* no parameter */ },
  931. .num_phy = 1,
  932. .check_efuse = true,
  933. .check_efuse_version = CHECK_EFUSE_V1,
  934. .efuse_dc_driving_rate = 1,
  935. .dc_driving_mask = 0xf,
  936. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  937. .dc_disconnect_mask = 0xf,
  938. .usb_dc_disconnect_at_page0 = true,
  939. .do_toggle = true,
  940. .do_toggle_driving = false,
  941. .driving_updated_for_dev_dis = 0xf,
  942. .use_default_parameter = false,
  943. .is_double_sensitivity_mode = false,
  944. };
  945. static const struct phy_cfg rtd1319_phy_cfg = {
  946. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  947. .page0 = { [0] = {0xe0, 0x18},
  948. [4] = {0xe4, 0x6a},
  949. [7] = {0xe7, 0x71},
  950. [13] = {0xf5, 0x15},
  951. [15] = {0xf7, 0x32}, },
  952. .page1_size = 8,
  953. .page1 = { [3] = {0xe3, 0x44}, },
  954. .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE,
  955. .page2 = { [0] = {0xe0, 0x01}, },
  956. .num_phy = 1,
  957. .check_efuse = true,
  958. .check_efuse_version = CHECK_EFUSE_V1,
  959. .efuse_dc_driving_rate = 1,
  960. .dc_driving_mask = 0xf,
  961. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  962. .dc_disconnect_mask = 0xf,
  963. .usb_dc_disconnect_at_page0 = true,
  964. .do_toggle = true,
  965. .do_toggle_driving = true,
  966. .driving_updated_for_dev_dis = 0xf,
  967. .use_default_parameter = false,
  968. .is_double_sensitivity_mode = true,
  969. };
  970. static const struct phy_cfg rtd1312c_phy_cfg = {
  971. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  972. .page0 = { [0] = {0xe0, 0x14},
  973. [4] = {0xe4, 0x67},
  974. [5] = {0xe5, 0x55}, },
  975. .page1_size = 8,
  976. .page1 = { [3] = {0xe3, 0x23},
  977. [6] = {0xe6, 0x58}, },
  978. .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE,
  979. .page2 = { /* default parameter */ },
  980. .num_phy = 1,
  981. .check_efuse = true,
  982. .check_efuse_version = CHECK_EFUSE_V1,
  983. .efuse_dc_driving_rate = 1,
  984. .dc_driving_mask = 0xf,
  985. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  986. .dc_disconnect_mask = 0xf,
  987. .usb_dc_disconnect_at_page0 = true,
  988. .do_toggle = true,
  989. .do_toggle_driving = true,
  990. .driving_updated_for_dev_dis = 0xf,
  991. .use_default_parameter = false,
  992. .is_double_sensitivity_mode = true,
  993. };
  994. static const struct phy_cfg rtd1619b_phy_cfg = {
  995. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  996. .page0 = { [0] = {0xe0, 0xa3},
  997. [4] = {0xe4, 0xa8},
  998. [5] = {0xe5, 0x4f},
  999. [6] = {0xe6, 0x02}, },
  1000. .page1_size = 8,
  1001. .page1 = { [3] = {0xe3, 0x64}, },
  1002. .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE,
  1003. .page2 = { [7] = {0xe7, 0x45}, },
  1004. .num_phy = 1,
  1005. .check_efuse = true,
  1006. .check_efuse_version = CHECK_EFUSE_V1,
  1007. .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE,
  1008. .dc_driving_mask = 0x1f,
  1009. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  1010. .dc_disconnect_mask = 0xf,
  1011. .usb_dc_disconnect_at_page0 = false,
  1012. .do_toggle = true,
  1013. .do_toggle_driving = true,
  1014. .driving_updated_for_dev_dis = 0x8,
  1015. .use_default_parameter = false,
  1016. .is_double_sensitivity_mode = true,
  1017. };
  1018. static const struct phy_cfg rtd1319d_phy_cfg = {
  1019. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  1020. .page0 = { [0] = {0xe0, 0xa3},
  1021. [4] = {0xe4, 0x8e},
  1022. [5] = {0xe5, 0x4f},
  1023. [6] = {0xe6, 0x02}, },
  1024. .page1_size = MAX_USB_PHY_PAGE1_DATA_SIZE,
  1025. .page1 = { [14] = {0xf5, 0x1}, },
  1026. .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE,
  1027. .page2 = { [7] = {0xe7, 0x44}, },
  1028. .check_efuse = true,
  1029. .num_phy = 1,
  1030. .check_efuse_version = CHECK_EFUSE_V1,
  1031. .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE,
  1032. .dc_driving_mask = 0x1f,
  1033. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  1034. .dc_disconnect_mask = 0xf,
  1035. .usb_dc_disconnect_at_page0 = false,
  1036. .do_toggle = true,
  1037. .do_toggle_driving = false,
  1038. .driving_updated_for_dev_dis = 0x8,
  1039. .use_default_parameter = false,
  1040. .is_double_sensitivity_mode = true,
  1041. };
  1042. static const struct phy_cfg rtd1315e_phy_cfg = {
  1043. .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE,
  1044. .page0 = { [0] = {0xe0, 0xa3},
  1045. [4] = {0xe4, 0x8c},
  1046. [5] = {0xe5, 0x4f},
  1047. [6] = {0xe6, 0x02}, },
  1048. .page1_size = MAX_USB_PHY_PAGE1_DATA_SIZE,
  1049. .page1 = { [3] = {0xe3, 0x7f},
  1050. [14] = {0xf5, 0x01}, },
  1051. .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE,
  1052. .page2 = { [7] = {0xe7, 0x44}, },
  1053. .num_phy = 1,
  1054. .check_efuse = true,
  1055. .check_efuse_version = CHECK_EFUSE_V2,
  1056. .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE,
  1057. .dc_driving_mask = 0x1f,
  1058. .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE,
  1059. .dc_disconnect_mask = 0xf,
  1060. .usb_dc_disconnect_at_page0 = false,
  1061. .do_toggle = true,
  1062. .do_toggle_driving = false,
  1063. .driving_updated_for_dev_dis = 0x8,
  1064. .use_default_parameter = false,
  1065. .is_double_sensitivity_mode = true,
  1066. };
  1067. static const struct of_device_id usbphy_rtk_dt_match[] = {
  1068. { .compatible = "realtek,rtd1295-usb2phy", .data = &rtd1295_phy_cfg },
  1069. { .compatible = "realtek,rtd1312c-usb2phy", .data = &rtd1312c_phy_cfg },
  1070. { .compatible = "realtek,rtd1315e-usb2phy", .data = &rtd1315e_phy_cfg },
  1071. { .compatible = "realtek,rtd1319-usb2phy", .data = &rtd1319_phy_cfg },
  1072. { .compatible = "realtek,rtd1319d-usb2phy", .data = &rtd1319d_phy_cfg },
  1073. { .compatible = "realtek,rtd1395-usb2phy", .data = &rtd1395_phy_cfg },
  1074. { .compatible = "realtek,rtd1395-usb2phy-2port", .data = &rtd1395_phy_cfg_2port },
  1075. { .compatible = "realtek,rtd1619-usb2phy", .data = &rtd1619_phy_cfg },
  1076. { .compatible = "realtek,rtd1619b-usb2phy", .data = &rtd1619b_phy_cfg },
  1077. {},
  1078. };
  1079. MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match);
  1080. static struct platform_driver rtk_usb2phy_driver = {
  1081. .probe = rtk_usb2phy_probe,
  1082. .remove_new = rtk_usb2phy_remove,
  1083. .driver = {
  1084. .name = "rtk-usb2phy",
  1085. .of_match_table = usbphy_rtk_dt_match,
  1086. },
  1087. };
  1088. module_platform_driver(rtk_usb2phy_driver);
  1089. MODULE_LICENSE("GPL");
  1090. MODULE_AUTHOR("Stanley Chang <stanley_chang@realtek.com>");
  1091. MODULE_DESCRIPTION("Realtek usb 2.0 phy driver");