cros_ec_spi.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // SPI interface for ChromeOS Embedded Controller
  3. //
  4. // Copyright (C) 2012 Google, Inc
  5. #include <linux/delay.h>
  6. #include <linux/kernel.h>
  7. #include <linux/module.h>
  8. #include <linux/of.h>
  9. #include <linux/platform_data/cros_ec_commands.h>
  10. #include <linux/platform_data/cros_ec_proto.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/slab.h>
  13. #include <linux/spi/spi.h>
  14. #include <uapi/linux/sched/types.h>
  15. #include "cros_ec.h"
  16. /* The header byte, which follows the preamble */
  17. #define EC_MSG_HEADER 0xec
  18. /*
  19. * Number of EC preamble bytes we read at a time. Since it takes
  20. * about 400-500us for the EC to respond there is not a lot of
  21. * point in tuning this. If the EC could respond faster then
  22. * we could increase this so that might expect the preamble and
  23. * message to occur in a single transaction. However, the maximum
  24. * SPI transfer size is 256 bytes, so at 5MHz we need a response
  25. * time of perhaps <320us (200 bytes / 1600 bits).
  26. */
  27. #define EC_MSG_PREAMBLE_COUNT 32
  28. /*
  29. * Allow for a long time for the EC to respond. We support i2c
  30. * tunneling and support fairly long messages for the tunnel (249
  31. * bytes long at the moment). If we're talking to a 100 kHz device
  32. * on the other end and need to transfer ~256 bytes, then we need:
  33. * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
  34. *
  35. * We'll wait 8 times that to handle clock stretching and other
  36. * paranoia. Note that some battery gas gauge ICs claim to have a
  37. * clock stretch of 144ms in rare situations. That's incentive for
  38. * not directly passing i2c through, but it's too late for that for
  39. * existing hardware.
  40. *
  41. * It's pretty unlikely that we'll really see a 249 byte tunnel in
  42. * anything other than testing. If this was more common we might
  43. * consider having slow commands like this require a GET_STATUS
  44. * wait loop. The 'flash write' command would be another candidate
  45. * for this, clocking in at 2-3ms.
  46. */
  47. #define EC_MSG_DEADLINE_MS 200
  48. /*
  49. * Time between raising the SPI chip select (for the end of a
  50. * transaction) and dropping it again (for the next transaction).
  51. * If we go too fast, the EC will miss the transaction. We know that we
  52. * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
  53. * safe.
  54. */
  55. #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
  56. /**
  57. * struct cros_ec_spi - information about a SPI-connected EC
  58. *
  59. * @spi: SPI device we are connected to
  60. * @last_transfer_ns: time that we last finished a transfer.
  61. * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
  62. * is sent when we want to turn on CS at the start of a transaction.
  63. * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
  64. * is sent when we want to turn off CS at the end of a transaction.
  65. * @high_pri_worker: Used to schedule high priority work.
  66. */
  67. struct cros_ec_spi {
  68. struct spi_device *spi;
  69. s64 last_transfer_ns;
  70. unsigned int start_of_msg_delay;
  71. unsigned int end_of_msg_delay;
  72. struct kthread_worker *high_pri_worker;
  73. };
  74. typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev,
  75. struct cros_ec_command *ec_msg);
  76. /**
  77. * struct cros_ec_xfer_work_params - params for our high priority workers
  78. *
  79. * @work: The work_struct needed to queue work
  80. * @fn: The function to use to transfer
  81. * @ec_dev: ChromeOS EC device
  82. * @ec_msg: Message to transfer
  83. * @ret: The return value of the function
  84. */
  85. struct cros_ec_xfer_work_params {
  86. struct kthread_work work;
  87. cros_ec_xfer_fn_t fn;
  88. struct cros_ec_device *ec_dev;
  89. struct cros_ec_command *ec_msg;
  90. int ret;
  91. };
  92. static void debug_packet(struct device *dev, const char *name, u8 *ptr,
  93. int len)
  94. {
  95. #ifdef DEBUG
  96. dev_dbg(dev, "%s: %*ph\n", name, len, ptr);
  97. #endif
  98. }
  99. static int terminate_request(struct cros_ec_device *ec_dev)
  100. {
  101. struct cros_ec_spi *ec_spi = ec_dev->priv;
  102. struct spi_message msg;
  103. struct spi_transfer trans;
  104. int ret;
  105. /*
  106. * Turn off CS, possibly adding a delay to ensure the rising edge
  107. * doesn't come too soon after the end of the data.
  108. */
  109. spi_message_init(&msg);
  110. memset(&trans, 0, sizeof(trans));
  111. trans.delay.value = ec_spi->end_of_msg_delay;
  112. trans.delay.unit = SPI_DELAY_UNIT_USECS;
  113. spi_message_add_tail(&trans, &msg);
  114. ret = spi_sync_locked(ec_spi->spi, &msg);
  115. /* Reset end-of-response timer */
  116. ec_spi->last_transfer_ns = ktime_get_ns();
  117. if (ret < 0) {
  118. dev_err(ec_dev->dev,
  119. "cs-deassert spi transfer failed: %d\n",
  120. ret);
  121. }
  122. return ret;
  123. }
  124. /**
  125. * receive_n_bytes - receive n bytes from the EC.
  126. *
  127. * Assumes buf is a pointer into the ec_dev->din buffer
  128. *
  129. * @ec_dev: ChromeOS EC device.
  130. * @buf: Pointer to the buffer receiving the data.
  131. * @n: Number of bytes received.
  132. */
  133. static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
  134. {
  135. struct cros_ec_spi *ec_spi = ec_dev->priv;
  136. struct spi_transfer trans;
  137. struct spi_message msg;
  138. int ret;
  139. if (buf - ec_dev->din + n > ec_dev->din_size)
  140. return -EINVAL;
  141. memset(&trans, 0, sizeof(trans));
  142. trans.cs_change = 1;
  143. trans.rx_buf = buf;
  144. trans.len = n;
  145. spi_message_init(&msg);
  146. spi_message_add_tail(&trans, &msg);
  147. ret = spi_sync_locked(ec_spi->spi, &msg);
  148. if (ret < 0)
  149. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  150. return ret;
  151. }
  152. /**
  153. * cros_ec_spi_receive_packet - Receive a packet from the EC.
  154. *
  155. * This function has two phases: reading the preamble bytes (since if we read
  156. * data from the EC before it is ready to send, we just get preamble) and
  157. * reading the actual message.
  158. *
  159. * The received data is placed into ec_dev->din.
  160. *
  161. * @ec_dev: ChromeOS EC device
  162. * @need_len: Number of message bytes we need to read
  163. */
  164. static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
  165. int need_len)
  166. {
  167. struct ec_host_response *response;
  168. u8 *ptr, *end;
  169. int ret;
  170. unsigned long deadline;
  171. int todo;
  172. if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT)
  173. return -EINVAL;
  174. /* Receive data until we see the header byte */
  175. deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
  176. while (true) {
  177. unsigned long start_jiffies = jiffies;
  178. ret = receive_n_bytes(ec_dev,
  179. ec_dev->din,
  180. EC_MSG_PREAMBLE_COUNT);
  181. if (ret < 0)
  182. return ret;
  183. ptr = ec_dev->din;
  184. for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
  185. if (*ptr == EC_SPI_FRAME_START) {
  186. dev_dbg(ec_dev->dev, "msg found at %zd\n",
  187. ptr - ec_dev->din);
  188. break;
  189. }
  190. }
  191. if (ptr != end)
  192. break;
  193. /*
  194. * Use the time at the start of the loop as a timeout. This
  195. * gives us one last shot at getting the transfer and is useful
  196. * in case we got context switched out for a while.
  197. */
  198. if (time_after(start_jiffies, deadline)) {
  199. dev_warn(ec_dev->dev, "EC failed to respond in time\n");
  200. return -ETIMEDOUT;
  201. }
  202. }
  203. /*
  204. * ptr now points to the header byte. Copy any valid data to the
  205. * start of our buffer
  206. */
  207. todo = end - ++ptr;
  208. todo = min(todo, need_len);
  209. memmove(ec_dev->din, ptr, todo);
  210. ptr = ec_dev->din + todo;
  211. dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
  212. need_len, todo);
  213. need_len -= todo;
  214. /* If the entire response struct wasn't read, get the rest of it. */
  215. if (todo < sizeof(*response)) {
  216. ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
  217. if (ret < 0)
  218. return -EBADMSG;
  219. ptr += (sizeof(*response) - todo);
  220. todo = sizeof(*response);
  221. }
  222. response = (struct ec_host_response *)ec_dev->din;
  223. /* Abort if data_len is too large. */
  224. if (response->data_len > ec_dev->din_size)
  225. return -EMSGSIZE;
  226. /* Receive data until we have it all */
  227. while (need_len > 0) {
  228. /*
  229. * We can't support transfers larger than the SPI FIFO size
  230. * unless we have DMA. We don't have DMA on the ISP SPI ports
  231. * for Exynos. We need a way of asking SPI driver for
  232. * maximum-supported transfer size.
  233. */
  234. todo = min(need_len, 256);
  235. dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
  236. todo, need_len, ptr - ec_dev->din);
  237. ret = receive_n_bytes(ec_dev, ptr, todo);
  238. if (ret < 0)
  239. return ret;
  240. ptr += todo;
  241. need_len -= todo;
  242. }
  243. dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
  244. return 0;
  245. }
  246. /**
  247. * cros_ec_spi_receive_response - Receive a response from the EC.
  248. *
  249. * This function has two phases: reading the preamble bytes (since if we read
  250. * data from the EC before it is ready to send, we just get preamble) and
  251. * reading the actual message.
  252. *
  253. * The received data is placed into ec_dev->din.
  254. *
  255. * @ec_dev: ChromeOS EC device
  256. * @need_len: Number of message bytes we need to read
  257. */
  258. static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
  259. int need_len)
  260. {
  261. u8 *ptr, *end;
  262. int ret;
  263. unsigned long deadline;
  264. int todo;
  265. if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT)
  266. return -EINVAL;
  267. /* Receive data until we see the header byte */
  268. deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
  269. while (true) {
  270. unsigned long start_jiffies = jiffies;
  271. ret = receive_n_bytes(ec_dev,
  272. ec_dev->din,
  273. EC_MSG_PREAMBLE_COUNT);
  274. if (ret < 0)
  275. return ret;
  276. ptr = ec_dev->din;
  277. for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
  278. if (*ptr == EC_SPI_FRAME_START) {
  279. dev_dbg(ec_dev->dev, "msg found at %zd\n",
  280. ptr - ec_dev->din);
  281. break;
  282. }
  283. }
  284. if (ptr != end)
  285. break;
  286. /*
  287. * Use the time at the start of the loop as a timeout. This
  288. * gives us one last shot at getting the transfer and is useful
  289. * in case we got context switched out for a while.
  290. */
  291. if (time_after(start_jiffies, deadline)) {
  292. dev_warn(ec_dev->dev, "EC failed to respond in time\n");
  293. return -ETIMEDOUT;
  294. }
  295. }
  296. /*
  297. * ptr now points to the header byte. Copy any valid data to the
  298. * start of our buffer
  299. */
  300. todo = end - ++ptr;
  301. todo = min(todo, need_len);
  302. memmove(ec_dev->din, ptr, todo);
  303. ptr = ec_dev->din + todo;
  304. dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
  305. need_len, todo);
  306. need_len -= todo;
  307. /* Receive data until we have it all */
  308. while (need_len > 0) {
  309. /*
  310. * We can't support transfers larger than the SPI FIFO size
  311. * unless we have DMA. We don't have DMA on the ISP SPI ports
  312. * for Exynos. We need a way of asking SPI driver for
  313. * maximum-supported transfer size.
  314. */
  315. todo = min(need_len, 256);
  316. dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
  317. todo, need_len, ptr - ec_dev->din);
  318. ret = receive_n_bytes(ec_dev, ptr, todo);
  319. if (ret < 0)
  320. return ret;
  321. debug_packet(ec_dev->dev, "interim", ptr, todo);
  322. ptr += todo;
  323. need_len -= todo;
  324. }
  325. dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
  326. return 0;
  327. }
  328. /**
  329. * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
  330. *
  331. * @ec_dev: ChromeOS EC device
  332. * @ec_msg: Message to transfer
  333. */
  334. static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
  335. struct cros_ec_command *ec_msg)
  336. {
  337. struct ec_host_response *response;
  338. struct cros_ec_spi *ec_spi = ec_dev->priv;
  339. struct spi_transfer trans, trans_delay;
  340. struct spi_message msg;
  341. int i, len;
  342. u8 *ptr;
  343. u8 *rx_buf;
  344. u8 sum;
  345. u8 rx_byte;
  346. int ret = 0, final_ret;
  347. unsigned long delay;
  348. len = cros_ec_prepare_tx(ec_dev, ec_msg);
  349. if (len < 0)
  350. return len;
  351. dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
  352. /* If it's too soon to do another transaction, wait */
  353. delay = ktime_get_ns() - ec_spi->last_transfer_ns;
  354. if (delay < EC_SPI_RECOVERY_TIME_NS)
  355. ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
  356. rx_buf = kzalloc(len, GFP_KERNEL);
  357. if (!rx_buf)
  358. return -ENOMEM;
  359. spi_bus_lock(ec_spi->spi->controller);
  360. /*
  361. * Leave a gap between CS assertion and clocking of data to allow the
  362. * EC time to wakeup.
  363. */
  364. spi_message_init(&msg);
  365. if (ec_spi->start_of_msg_delay) {
  366. memset(&trans_delay, 0, sizeof(trans_delay));
  367. trans_delay.delay.value = ec_spi->start_of_msg_delay;
  368. trans_delay.delay.unit = SPI_DELAY_UNIT_USECS;
  369. spi_message_add_tail(&trans_delay, &msg);
  370. }
  371. /* Transmit phase - send our message */
  372. memset(&trans, 0, sizeof(trans));
  373. trans.tx_buf = ec_dev->dout;
  374. trans.rx_buf = rx_buf;
  375. trans.len = len;
  376. trans.cs_change = 1;
  377. spi_message_add_tail(&trans, &msg);
  378. ret = spi_sync_locked(ec_spi->spi, &msg);
  379. /* Get the response */
  380. if (!ret) {
  381. /* Verify that EC can process command */
  382. for (i = 0; i < len; i++) {
  383. rx_byte = rx_buf[i];
  384. /*
  385. * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
  386. * markers are all signs that the EC didn't fully
  387. * receive our command. e.g., if the EC is flashing
  388. * itself, it can't respond to any commands and instead
  389. * clocks out EC_SPI_PAST_END from its SPI hardware
  390. * buffer. Similar occurrences can happen if the AP is
  391. * too slow to clock out data after asserting CS -- the
  392. * EC will abort and fill its buffer with
  393. * EC_SPI_RX_BAD_DATA.
  394. *
  395. * In all cases, these errors should be safe to retry.
  396. * Report -EAGAIN and let the caller decide what to do
  397. * about that.
  398. */
  399. if (rx_byte == EC_SPI_PAST_END ||
  400. rx_byte == EC_SPI_RX_BAD_DATA ||
  401. rx_byte == EC_SPI_NOT_READY) {
  402. ret = -EAGAIN;
  403. break;
  404. }
  405. }
  406. }
  407. if (!ret)
  408. ret = cros_ec_spi_receive_packet(ec_dev,
  409. ec_msg->insize + sizeof(*response));
  410. else if (ret != -EAGAIN)
  411. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  412. final_ret = terminate_request(ec_dev);
  413. spi_bus_unlock(ec_spi->spi->controller);
  414. if (!ret)
  415. ret = final_ret;
  416. if (ret < 0)
  417. goto exit;
  418. ptr = ec_dev->din;
  419. /* check response error code */
  420. response = (struct ec_host_response *)ptr;
  421. ec_msg->result = response->result;
  422. ret = cros_ec_check_result(ec_dev, ec_msg);
  423. if (ret)
  424. goto exit;
  425. len = response->data_len;
  426. sum = 0;
  427. if (len > ec_msg->insize) {
  428. dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
  429. len, ec_msg->insize);
  430. ret = -EMSGSIZE;
  431. goto exit;
  432. }
  433. for (i = 0; i < sizeof(*response); i++)
  434. sum += ptr[i];
  435. /* copy response packet payload and compute checksum */
  436. memcpy(ec_msg->data, ptr + sizeof(*response), len);
  437. for (i = 0; i < len; i++)
  438. sum += ec_msg->data[i];
  439. if (sum) {
  440. dev_err(ec_dev->dev,
  441. "bad packet checksum, calculated %x\n",
  442. sum);
  443. ret = -EBADMSG;
  444. goto exit;
  445. }
  446. ret = len;
  447. exit:
  448. kfree(rx_buf);
  449. if (ec_msg->command == EC_CMD_REBOOT_EC)
  450. msleep(EC_REBOOT_DELAY_MS);
  451. return ret;
  452. }
  453. /**
  454. * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
  455. *
  456. * @ec_dev: ChromeOS EC device
  457. * @ec_msg: Message to transfer
  458. */
  459. static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
  460. struct cros_ec_command *ec_msg)
  461. {
  462. struct cros_ec_spi *ec_spi = ec_dev->priv;
  463. struct spi_transfer trans;
  464. struct spi_message msg;
  465. int i, len;
  466. u8 *ptr;
  467. u8 *rx_buf;
  468. u8 rx_byte;
  469. int sum;
  470. int ret = 0, final_ret;
  471. unsigned long delay;
  472. len = cros_ec_prepare_tx(ec_dev, ec_msg);
  473. if (len < 0)
  474. return len;
  475. dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
  476. /* If it's too soon to do another transaction, wait */
  477. delay = ktime_get_ns() - ec_spi->last_transfer_ns;
  478. if (delay < EC_SPI_RECOVERY_TIME_NS)
  479. ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
  480. rx_buf = kzalloc(len, GFP_KERNEL);
  481. if (!rx_buf)
  482. return -ENOMEM;
  483. spi_bus_lock(ec_spi->spi->controller);
  484. /* Transmit phase - send our message */
  485. debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
  486. memset(&trans, 0, sizeof(trans));
  487. trans.tx_buf = ec_dev->dout;
  488. trans.rx_buf = rx_buf;
  489. trans.len = len;
  490. trans.cs_change = 1;
  491. spi_message_init(&msg);
  492. spi_message_add_tail(&trans, &msg);
  493. ret = spi_sync_locked(ec_spi->spi, &msg);
  494. /* Get the response */
  495. if (!ret) {
  496. /* Verify that EC can process command */
  497. for (i = 0; i < len; i++) {
  498. rx_byte = rx_buf[i];
  499. /* See comments in cros_ec_pkt_xfer_spi() */
  500. if (rx_byte == EC_SPI_PAST_END ||
  501. rx_byte == EC_SPI_RX_BAD_DATA ||
  502. rx_byte == EC_SPI_NOT_READY) {
  503. ret = -EAGAIN;
  504. break;
  505. }
  506. }
  507. }
  508. if (!ret)
  509. ret = cros_ec_spi_receive_response(ec_dev,
  510. ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
  511. else if (ret != -EAGAIN)
  512. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  513. final_ret = terminate_request(ec_dev);
  514. spi_bus_unlock(ec_spi->spi->controller);
  515. if (!ret)
  516. ret = final_ret;
  517. if (ret < 0)
  518. goto exit;
  519. ptr = ec_dev->din;
  520. /* check response error code */
  521. ec_msg->result = ptr[0];
  522. ret = cros_ec_check_result(ec_dev, ec_msg);
  523. if (ret)
  524. goto exit;
  525. len = ptr[1];
  526. sum = ptr[0] + ptr[1];
  527. if (len > ec_msg->insize) {
  528. dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
  529. len, ec_msg->insize);
  530. ret = -ENOSPC;
  531. goto exit;
  532. }
  533. /* copy response packet payload and compute checksum */
  534. for (i = 0; i < len; i++) {
  535. sum += ptr[i + 2];
  536. if (ec_msg->insize)
  537. ec_msg->data[i] = ptr[i + 2];
  538. }
  539. sum &= 0xff;
  540. debug_packet(ec_dev->dev, "in", ptr, len + 3);
  541. if (sum != ptr[len + 2]) {
  542. dev_err(ec_dev->dev,
  543. "bad packet checksum, expected %02x, got %02x\n",
  544. sum, ptr[len + 2]);
  545. ret = -EBADMSG;
  546. goto exit;
  547. }
  548. ret = len;
  549. exit:
  550. kfree(rx_buf);
  551. if (ec_msg->command == EC_CMD_REBOOT_EC)
  552. msleep(EC_REBOOT_DELAY_MS);
  553. return ret;
  554. }
  555. static void cros_ec_xfer_high_pri_work(struct kthread_work *work)
  556. {
  557. struct cros_ec_xfer_work_params *params;
  558. params = container_of(work, struct cros_ec_xfer_work_params, work);
  559. params->ret = params->fn(params->ec_dev, params->ec_msg);
  560. }
  561. static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev,
  562. struct cros_ec_command *ec_msg,
  563. cros_ec_xfer_fn_t fn)
  564. {
  565. struct cros_ec_spi *ec_spi = ec_dev->priv;
  566. struct cros_ec_xfer_work_params params = {
  567. .work = KTHREAD_WORK_INIT(params.work,
  568. cros_ec_xfer_high_pri_work),
  569. .ec_dev = ec_dev,
  570. .ec_msg = ec_msg,
  571. .fn = fn,
  572. };
  573. /*
  574. * This looks a bit ridiculous. Why do the work on a
  575. * different thread if we're just going to block waiting for
  576. * the thread to finish? The key here is that the thread is
  577. * running at high priority but the calling context might not
  578. * be. We need to be at high priority to avoid getting
  579. * context switched out for too long and the EC giving up on
  580. * the transfer.
  581. */
  582. kthread_queue_work(ec_spi->high_pri_worker, &params.work);
  583. kthread_flush_work(&params.work);
  584. return params.ret;
  585. }
  586. static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
  587. struct cros_ec_command *ec_msg)
  588. {
  589. return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi);
  590. }
  591. static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
  592. struct cros_ec_command *ec_msg)
  593. {
  594. return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi);
  595. }
  596. static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
  597. {
  598. struct device_node *np = dev->of_node;
  599. u32 val;
  600. int ret;
  601. ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
  602. if (!ret)
  603. ec_spi->start_of_msg_delay = val;
  604. ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
  605. if (!ret)
  606. ec_spi->end_of_msg_delay = val;
  607. }
  608. static void cros_ec_spi_high_pri_release(void *worker)
  609. {
  610. kthread_destroy_worker(worker);
  611. }
  612. static int cros_ec_spi_devm_high_pri_alloc(struct device *dev,
  613. struct cros_ec_spi *ec_spi)
  614. {
  615. int err;
  616. ec_spi->high_pri_worker =
  617. kthread_create_worker(0, "cros_ec_spi_high_pri");
  618. if (IS_ERR(ec_spi->high_pri_worker)) {
  619. err = PTR_ERR(ec_spi->high_pri_worker);
  620. dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err);
  621. return err;
  622. }
  623. err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release,
  624. ec_spi->high_pri_worker);
  625. if (err)
  626. return err;
  627. sched_set_fifo(ec_spi->high_pri_worker->task);
  628. return 0;
  629. }
  630. static int cros_ec_spi_probe(struct spi_device *spi)
  631. {
  632. struct device *dev = &spi->dev;
  633. struct cros_ec_device *ec_dev;
  634. struct cros_ec_spi *ec_spi;
  635. int err;
  636. spi->rt = true;
  637. err = spi_setup(spi);
  638. if (err < 0)
  639. return err;
  640. ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
  641. if (ec_spi == NULL)
  642. return -ENOMEM;
  643. ec_spi->spi = spi;
  644. ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
  645. if (!ec_dev)
  646. return -ENOMEM;
  647. /* Check for any DT properties */
  648. cros_ec_spi_dt_probe(ec_spi, dev);
  649. spi_set_drvdata(spi, ec_dev);
  650. ec_dev->dev = dev;
  651. ec_dev->priv = ec_spi;
  652. ec_dev->irq = spi->irq;
  653. ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
  654. ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
  655. ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
  656. ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
  657. sizeof(struct ec_host_response) +
  658. sizeof(struct ec_response_get_protocol_info);
  659. ec_dev->dout_size = sizeof(struct ec_host_request);
  660. ec_spi->last_transfer_ns = ktime_get_ns();
  661. err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi);
  662. if (err)
  663. return err;
  664. err = cros_ec_register(ec_dev);
  665. if (err) {
  666. dev_err(dev, "cannot register EC\n");
  667. return err;
  668. }
  669. device_init_wakeup(&spi->dev, true);
  670. return 0;
  671. }
  672. static void cros_ec_spi_remove(struct spi_device *spi)
  673. {
  674. struct cros_ec_device *ec_dev = spi_get_drvdata(spi);
  675. cros_ec_unregister(ec_dev);
  676. }
  677. #ifdef CONFIG_PM_SLEEP
  678. static int cros_ec_spi_suspend(struct device *dev)
  679. {
  680. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  681. return cros_ec_suspend(ec_dev);
  682. }
  683. static int cros_ec_spi_resume(struct device *dev)
  684. {
  685. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  686. return cros_ec_resume(ec_dev);
  687. }
  688. #endif
  689. static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
  690. cros_ec_spi_resume);
  691. static const struct of_device_id cros_ec_spi_of_match[] = {
  692. { .compatible = "google,cros-ec-spi", },
  693. { /* sentinel */ },
  694. };
  695. MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
  696. static const struct spi_device_id cros_ec_spi_id[] = {
  697. { "cros-ec-spi", 0 },
  698. { }
  699. };
  700. MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
  701. static struct spi_driver cros_ec_driver_spi = {
  702. .driver = {
  703. .name = "cros-ec-spi",
  704. .of_match_table = cros_ec_spi_of_match,
  705. .pm = &cros_ec_spi_pm_ops,
  706. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  707. },
  708. .probe = cros_ec_spi_probe,
  709. .remove = cros_ec_spi_remove,
  710. .id_table = cros_ec_spi_id,
  711. };
  712. module_spi_driver(cros_ec_driver_spi);
  713. MODULE_LICENSE("GPL v2");
  714. MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");