r8a7795-sysc.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Renesas R-Car H3 System Controller
  4. *
  5. * Copyright (C) 2016-2017 Glider bvba
  6. */
  7. #include <linux/bits.h>
  8. #include <linux/kernel.h>
  9. #include <linux/sys_soc.h>
  10. #include <dt-bindings/power/r8a7795-sysc.h>
  11. #include "rcar-sysc.h"
  12. static struct rcar_sysc_area r8a7795_areas[] __initdata = {
  13. { "always-on", 0, 0, R8A7795_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
  14. { "ca57-scu", 0x1c0, 0, R8A7795_PD_CA57_SCU, R8A7795_PD_ALWAYS_ON,
  15. PD_SCU },
  16. { "ca57-cpu0", 0x80, 0, R8A7795_PD_CA57_CPU0, R8A7795_PD_CA57_SCU,
  17. PD_CPU_NOCR },
  18. { "ca57-cpu1", 0x80, 1, R8A7795_PD_CA57_CPU1, R8A7795_PD_CA57_SCU,
  19. PD_CPU_NOCR },
  20. { "ca57-cpu2", 0x80, 2, R8A7795_PD_CA57_CPU2, R8A7795_PD_CA57_SCU,
  21. PD_CPU_NOCR },
  22. { "ca57-cpu3", 0x80, 3, R8A7795_PD_CA57_CPU3, R8A7795_PD_CA57_SCU,
  23. PD_CPU_NOCR },
  24. { "ca53-scu", 0x140, 0, R8A7795_PD_CA53_SCU, R8A7795_PD_ALWAYS_ON,
  25. PD_SCU },
  26. { "ca53-cpu0", 0x200, 0, R8A7795_PD_CA53_CPU0, R8A7795_PD_CA53_SCU,
  27. PD_CPU_NOCR },
  28. { "ca53-cpu1", 0x200, 1, R8A7795_PD_CA53_CPU1, R8A7795_PD_CA53_SCU,
  29. PD_CPU_NOCR },
  30. { "ca53-cpu2", 0x200, 2, R8A7795_PD_CA53_CPU2, R8A7795_PD_CA53_SCU,
  31. PD_CPU_NOCR },
  32. { "ca53-cpu3", 0x200, 3, R8A7795_PD_CA53_CPU3, R8A7795_PD_CA53_SCU,
  33. PD_CPU_NOCR },
  34. { "a3vp", 0x340, 0, R8A7795_PD_A3VP, R8A7795_PD_ALWAYS_ON },
  35. { "cr7", 0x240, 0, R8A7795_PD_CR7, R8A7795_PD_ALWAYS_ON },
  36. { "a3vc", 0x380, 0, R8A7795_PD_A3VC, R8A7795_PD_ALWAYS_ON },
  37. { "a2vc1", 0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC },
  38. { "3dg-a", 0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON },
  39. { "3dg-b", 0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A },
  40. { "3dg-c", 0x100, 2, R8A7795_PD_3DG_C, R8A7795_PD_3DG_B },
  41. { "3dg-d", 0x100, 3, R8A7795_PD_3DG_D, R8A7795_PD_3DG_C },
  42. { "3dg-e", 0x100, 4, R8A7795_PD_3DG_E, R8A7795_PD_3DG_D },
  43. { "a3ir", 0x180, 0, R8A7795_PD_A3IR, R8A7795_PD_ALWAYS_ON },
  44. };
  45. /*
  46. * Fixups for R-Car H3 revisions
  47. */
  48. #define NO_EXTMASK BIT(1) /* Missing SYSCEXTMASK register */
  49. static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = {
  50. {
  51. .soc_id = "r8a7795", .revision = "ES2.*",
  52. .data = (void *)(NO_EXTMASK),
  53. },
  54. { /* sentinel */ }
  55. };
  56. static int __init r8a7795_sysc_init(void)
  57. {
  58. const struct soc_device_attribute *attr;
  59. u32 quirks = 0;
  60. attr = soc_device_match(r8a7795_quirks_match);
  61. if (attr)
  62. quirks = (uintptr_t)attr->data;
  63. if (quirks & NO_EXTMASK)
  64. r8a7795_sysc_info.extmask_val = 0;
  65. return 0;
  66. }
  67. struct rcar_sysc_info r8a7795_sysc_info __initdata = {
  68. .init = r8a7795_sysc_init,
  69. .areas = r8a7795_areas,
  70. .num_areas = ARRAY_SIZE(r8a7795_areas),
  71. .extmask_offs = 0x2f8,
  72. .extmask_val = BIT(0),
  73. };