keystone-reset.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * TI keystone reboot driver
  4. *
  5. * Copyright (C) 2014 Texas Instruments Incorporated. https://www.ti.com/
  6. *
  7. * Author: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
  8. */
  9. #include <linux/io.h>
  10. #include <linux/module.h>
  11. #include <linux/notifier.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/reboot.h>
  14. #include <linux/regmap.h>
  15. #include <linux/mfd/syscon.h>
  16. #include <linux/of.h>
  17. #define RSTYPE_RG 0x0
  18. #define RSCTRL_RG 0x4
  19. #define RSCFG_RG 0x8
  20. #define RSISO_RG 0xc
  21. #define RSCTRL_KEY_MASK 0x0000ffff
  22. #define RSCTRL_RESET_MASK BIT(16)
  23. #define RSCTRL_KEY 0x5a69
  24. #define RSMUX_OMODE_MASK 0xe
  25. #define RSMUX_OMODE_RESET_ON 0xa
  26. #define RSMUX_OMODE_RESET_OFF 0x0
  27. #define RSMUX_LOCK_MASK 0x1
  28. #define RSMUX_LOCK_SET 0x1
  29. #define RSCFG_RSTYPE_SOFT 0x300f
  30. #define RSCFG_RSTYPE_HARD 0x0
  31. #define WDT_MUX_NUMBER 0x4
  32. static int rspll_offset;
  33. static struct regmap *pllctrl_regs;
  34. /**
  35. * rsctrl_enable_rspll_write - enable access to RSCTRL, RSCFG
  36. * To be able to access to RSCTRL, RSCFG registers
  37. * we have to write a key before
  38. */
  39. static inline int rsctrl_enable_rspll_write(void)
  40. {
  41. return regmap_update_bits(pllctrl_regs, rspll_offset + RSCTRL_RG,
  42. RSCTRL_KEY_MASK, RSCTRL_KEY);
  43. }
  44. static int rsctrl_restart_handler(struct notifier_block *this,
  45. unsigned long mode, void *cmd)
  46. {
  47. /* enable write access to RSTCTRL */
  48. rsctrl_enable_rspll_write();
  49. /* reset the SOC */
  50. regmap_update_bits(pllctrl_regs, rspll_offset + RSCTRL_RG,
  51. RSCTRL_RESET_MASK, 0);
  52. return NOTIFY_DONE;
  53. }
  54. static struct notifier_block rsctrl_restart_nb = {
  55. .notifier_call = rsctrl_restart_handler,
  56. .priority = 128,
  57. };
  58. static const struct of_device_id rsctrl_of_match[] = {
  59. {.compatible = "ti,keystone-reset", },
  60. {},
  61. };
  62. MODULE_DEVICE_TABLE(of, rsctrl_of_match);
  63. static int rsctrl_probe(struct platform_device *pdev)
  64. {
  65. int i;
  66. int ret;
  67. u32 val;
  68. unsigned int rg;
  69. u32 rsmux_offset;
  70. struct regmap *devctrl_regs;
  71. struct device *dev = &pdev->dev;
  72. struct device_node *np = dev->of_node;
  73. if (!np)
  74. return -ENODEV;
  75. /* get regmaps */
  76. pllctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pll");
  77. if (IS_ERR(pllctrl_regs))
  78. return PTR_ERR(pllctrl_regs);
  79. devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev");
  80. if (IS_ERR(devctrl_regs))
  81. return PTR_ERR(devctrl_regs);
  82. ret = of_property_read_u32_index(np, "ti,syscon-pll", 1, &rspll_offset);
  83. if (ret) {
  84. dev_err(dev, "couldn't read the reset pll offset!\n");
  85. return -EINVAL;
  86. }
  87. ret = of_property_read_u32_index(np, "ti,syscon-dev", 1, &rsmux_offset);
  88. if (ret) {
  89. dev_err(dev, "couldn't read the rsmux offset!\n");
  90. return -EINVAL;
  91. }
  92. /* set soft/hard reset */
  93. val = of_property_read_bool(np, "ti,soft-reset");
  94. val = val ? RSCFG_RSTYPE_SOFT : RSCFG_RSTYPE_HARD;
  95. ret = rsctrl_enable_rspll_write();
  96. if (ret)
  97. return ret;
  98. ret = regmap_write(pllctrl_regs, rspll_offset + RSCFG_RG, val);
  99. if (ret)
  100. return ret;
  101. /* disable a reset isolation for all module clocks */
  102. ret = regmap_write(pllctrl_regs, rspll_offset + RSISO_RG, 0);
  103. if (ret)
  104. return ret;
  105. /* enable a reset for watchdogs from wdt-list */
  106. for (i = 0; i < WDT_MUX_NUMBER; i++) {
  107. ret = of_property_read_u32_index(np, "ti,wdt-list", i, &val);
  108. if (ret == -EOVERFLOW && !i) {
  109. dev_err(dev, "ti,wdt-list property has to contain at"
  110. "least one entry\n");
  111. return -EINVAL;
  112. } else if (ret) {
  113. break;
  114. }
  115. if (val >= WDT_MUX_NUMBER) {
  116. dev_err(dev, "ti,wdt-list property can contain "
  117. "only numbers < 4\n");
  118. return -EINVAL;
  119. }
  120. rg = rsmux_offset + val * 4;
  121. ret = regmap_update_bits(devctrl_regs, rg, RSMUX_OMODE_MASK,
  122. RSMUX_OMODE_RESET_ON |
  123. RSMUX_LOCK_SET);
  124. if (ret)
  125. return ret;
  126. }
  127. ret = register_restart_handler(&rsctrl_restart_nb);
  128. if (ret)
  129. dev_err(dev, "cannot register restart handler (err=%d)\n", ret);
  130. return ret;
  131. }
  132. static struct platform_driver rsctrl_driver = {
  133. .probe = rsctrl_probe,
  134. .driver = {
  135. .name = KBUILD_MODNAME,
  136. .of_match_table = rsctrl_of_match,
  137. },
  138. };
  139. module_platform_driver(rsctrl_driver);
  140. MODULE_AUTHOR("Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>");
  141. MODULE_DESCRIPTION("Texas Instruments keystone reset driver");
  142. MODULE_ALIAS("platform:" KBUILD_MODNAME);