rt9471.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2022 Richtek Technology Corp.
  4. *
  5. * Authors: Alina Yu <alina_yu@richtek.com>
  6. * ChiYuan Huang <cy_huang@richtek.com>
  7. */
  8. #include <linux/bits.h>
  9. #include <linux/gpio/consumer.h>
  10. #include <linux/i2c.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/kstrtox.h>
  13. #include <linux/linear_range.h>
  14. #include <linux/mod_devicetable.h>
  15. #include <linux/module.h>
  16. #include <linux/mutex.h>
  17. #include <linux/of.h>
  18. #include <linux/power_supply.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/sysfs.h>
  22. #define RT9471_REG_OTGCFG 0x00
  23. #define RT9471_REG_TOP 0x01
  24. #define RT9471_REG_FUNC 0x02
  25. #define RT9471_REG_IBUS 0x03
  26. #define RT9471_REG_VBUS 0x04
  27. #define RT9471_REG_PRECHG 0x05
  28. #define RT9471_REG_VCHG 0x07
  29. #define RT9471_REG_ICHG 0x08
  30. #define RT9471_REG_CHGTMR 0x09
  31. #define RT9471_REG_EOC 0x0A
  32. #define RT9471_REG_INFO 0x0B
  33. #define RT9471_REG_JEITA 0x0C
  34. #define RT9471_REG_PUMP_EXP 0x0D
  35. #define RT9471_REG_DPDMDET 0x0E
  36. #define RT9471_REG_ICSTAT 0x0F
  37. #define RT9471_REG_STAT0 0x10
  38. #define RT9471_REG_STAT1 0x11
  39. #define RT9471_REG_STAT2 0x12
  40. #define RT9471_REG_IRQ0 0x20
  41. #define RT9471_REG_MASK0 0x30
  42. #define RT9471_OTGCV_MASK GENMASK(7, 6)
  43. #define RT9471_OTGCC_MASK BIT(0)
  44. #define RT9471_OTGEN_MASK BIT(1)
  45. #define RT9471_CHGFAULT_MASK GENMASK(4, 1)
  46. #define RT9471_NUM_IRQ_REGS 4
  47. #define RT9471_OTGCV_MINUV 4850000
  48. #define RT9471_OTGCV_STEPUV 150000
  49. #define RT9471_NUM_VOTG 4
  50. #define RT9471_VCHG_MAXUV 4700000
  51. #define RT9471_ICHG_MAXUA 3150000
  52. /* Device ID */
  53. #define RT9470_DEVID 0x09
  54. #define RT9470D_DEVID 0x0A
  55. #define RT9471_DEVID 0x0D
  56. #define RT9471D_DEVID 0x0E
  57. /* IRQ number */
  58. #define RT9471_IRQ_BC12_DONE 0
  59. #define RT9471_IRQ_DETACH 1
  60. #define RT9471_IRQ_RECHG 2
  61. #define RT9471_IRQ_CHG_DONE 3
  62. #define RT9471_IRQ_BG_CHG 4
  63. #define RT9471_IRQ_IE0C 5
  64. #define RT9471_IRQ_CHG_RDY 6
  65. #define RT9471_IRQ_VBUS_GD 7
  66. #define RT9471_IRQ_CHG_BATOV 9
  67. #define RT9471_IRQ_CHG_SYSOV 10
  68. #define RT9471_IRQ_CHG_TOUT 11
  69. #define RT9471_IRQ_CHG_BUSUV 12
  70. #define RT9471_IRQ_CHG_THREG 13
  71. #define RT9471_IRQ_CHG_AICR 14
  72. #define RT9471_IRQ_CHG_MIVR 15
  73. #define RT9471_IRQ_SYS_SHORT 16
  74. #define RT9471_IRQ_SYS_MIN 17
  75. #define RT9471_IRQ_AICC_DONE 18
  76. #define RT9471_IRQ_PE_DONE 19
  77. #define RT9471_IRQ_JEITA_COLD 20
  78. #define RT9471_IRQ_JEITA_COOL 21
  79. #define RT9471_IRQ_JEITA_WARM 22
  80. #define RT9471_IRQ_JEITA_HOT 23
  81. #define RT9471_IRQ_OTG_FAULT 24
  82. #define RT9471_IRQ_OTG_LBP 25
  83. #define RT9471_IRQ_OTG_CC 26
  84. #define RT9471_IRQ_WDT 29
  85. #define RT9471_IRQ_VAC_OV 30
  86. #define RT9471_IRQ_OTP 31
  87. enum rt9471_fields {
  88. F_WDT = 0,
  89. F_WDT_RST,
  90. F_CHG_EN,
  91. F_HZ,
  92. F_BATFET_DIS,
  93. F_AICR,
  94. F_AICC_EN,
  95. F_MIVR,
  96. F_IPRE_CHG,
  97. F_VPRE_CHG,
  98. F_VBAT_REG,
  99. F_ICHG_REG,
  100. F_EOC_RST,
  101. F_TE,
  102. F_IEOC_CHG,
  103. F_DEVICE_ID,
  104. F_REG_RST,
  105. F_BC12_EN,
  106. F_IC_STAT,
  107. F_PORT_STAT,
  108. F_ST_CHG_DONE,
  109. F_ST_CHG_RDY,
  110. F_ST_VBUS_GD,
  111. F_MAX_FIELDS
  112. };
  113. enum rt9471_ranges {
  114. RT9471_RANGE_AICR = 0,
  115. RT9471_RANGE_MIVR,
  116. RT9471_RANGE_IPRE,
  117. RT9471_RANGE_VCHG,
  118. RT9471_RANGE_ICHG,
  119. RT9471_RANGE_IEOC,
  120. RT9471_MAX_RANGES
  121. };
  122. enum {
  123. RT9471_PORTSTAT_APPLE_10W = 8,
  124. RT9471_PORTSTAT_SAMSUNG_10W,
  125. RT9471_PORTSTAT_APPLE_5W,
  126. RT9471_PORTSTAT_APPLE_12W,
  127. RT9471_PORTSTAT_NSTD,
  128. RT9471_PORTSTAT_SDP,
  129. RT9471_PORTSTAT_CDP,
  130. RT9471_PORTSTAT_DCP,
  131. };
  132. enum {
  133. RT9471_ICSTAT_SLEEP = 0,
  134. RT9471_ICSTAT_VBUSRDY,
  135. RT9471_ICSTAT_TRICKLECHG,
  136. RT9471_ICSTAT_PRECHG,
  137. RT9471_ICSTAT_FASTCHG,
  138. RT9471_ICSTAT_IEOC,
  139. RT9471_ICSTAT_BGCHG,
  140. RT9471_ICSTAT_CHGDONE,
  141. RT9471_ICSTAT_CHGFAULT,
  142. RT9471_ICSTAT_OTG = 15,
  143. };
  144. struct rt9471_chip {
  145. struct device *dev;
  146. struct regmap *regmap;
  147. struct regmap_field *rm_fields[F_MAX_FIELDS];
  148. struct regmap_irq_chip_data *irq_chip_data;
  149. struct regulator_dev *otg_rdev;
  150. struct power_supply *psy;
  151. struct power_supply_desc psy_desc;
  152. struct mutex var_lock;
  153. enum power_supply_usb_type psy_usb_type;
  154. int psy_usb_curr;
  155. };
  156. static const struct reg_field rt9471_reg_fields[F_MAX_FIELDS] = {
  157. [F_WDT] = REG_FIELD(RT9471_REG_TOP, 0, 1),
  158. [F_WDT_RST] = REG_FIELD(RT9471_REG_TOP, 2, 2),
  159. [F_CHG_EN] = REG_FIELD(RT9471_REG_FUNC, 0, 0),
  160. [F_HZ] = REG_FIELD(RT9471_REG_FUNC, 5, 5),
  161. [F_BATFET_DIS] = REG_FIELD(RT9471_REG_FUNC, 7, 7),
  162. [F_AICR] = REG_FIELD(RT9471_REG_IBUS, 0, 5),
  163. [F_AICC_EN] = REG_FIELD(RT9471_REG_IBUS, 7, 7),
  164. [F_MIVR] = REG_FIELD(RT9471_REG_VBUS, 0, 3),
  165. [F_IPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 0, 3),
  166. [F_VPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 4, 6),
  167. [F_VBAT_REG] = REG_FIELD(RT9471_REG_VCHG, 0, 6),
  168. [F_ICHG_REG] = REG_FIELD(RT9471_REG_ICHG, 0, 5),
  169. [F_EOC_RST] = REG_FIELD(RT9471_REG_EOC, 0, 0),
  170. [F_TE] = REG_FIELD(RT9471_REG_EOC, 1, 1),
  171. [F_IEOC_CHG] = REG_FIELD(RT9471_REG_EOC, 4, 7),
  172. [F_DEVICE_ID] = REG_FIELD(RT9471_REG_INFO, 3, 6),
  173. [F_REG_RST] = REG_FIELD(RT9471_REG_INFO, 7, 7),
  174. [F_BC12_EN] = REG_FIELD(RT9471_REG_DPDMDET, 7, 7),
  175. [F_IC_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 0, 3),
  176. [F_PORT_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 4, 7),
  177. [F_ST_CHG_DONE] = REG_FIELD(RT9471_REG_STAT0, 3, 3),
  178. [F_ST_CHG_RDY] = REG_FIELD(RT9471_REG_STAT0, 6, 6),
  179. [F_ST_VBUS_GD] = REG_FIELD(RT9471_REG_STAT0, 7, 7),
  180. };
  181. static const struct linear_range rt9471_chg_ranges[RT9471_MAX_RANGES] = {
  182. [RT9471_RANGE_AICR] = { .min = 50000, .min_sel = 1, .max_sel = 63, .step = 50000 },
  183. [RT9471_RANGE_MIVR] = { .min = 3900000, .min_sel = 0, .max_sel = 15, .step = 100000 },
  184. [RT9471_RANGE_IPRE] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 },
  185. [RT9471_RANGE_VCHG] = { .min = 3900000, .min_sel = 0, .max_sel = 80, .step = 10000 },
  186. [RT9471_RANGE_ICHG] = { .min = 0, .min_sel = 0, .max_sel = 63, .step = 50000 },
  187. [RT9471_RANGE_IEOC] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 },
  188. };
  189. static int rt9471_set_value_by_field_range(struct rt9471_chip *chip,
  190. enum rt9471_fields field,
  191. enum rt9471_ranges range, int val)
  192. {
  193. unsigned int sel;
  194. if (val < 0)
  195. return -EINVAL;
  196. linear_range_get_selector_within(rt9471_chg_ranges + range, val, &sel);
  197. return regmap_field_write(chip->rm_fields[field], sel);
  198. }
  199. static int rt9471_get_value_by_field_range(struct rt9471_chip *chip,
  200. enum rt9471_fields field,
  201. enum rt9471_ranges range, int *val)
  202. {
  203. unsigned int sel, rvalue;
  204. int ret;
  205. ret = regmap_field_read(chip->rm_fields[field], &sel);
  206. if (ret)
  207. return ret;
  208. ret = linear_range_get_value(rt9471_chg_ranges + range, sel, &rvalue);
  209. if (ret)
  210. return ret;
  211. *val = rvalue;
  212. return 0;
  213. }
  214. static int rt9471_set_ieoc(struct rt9471_chip *chip, int microamp)
  215. {
  216. int ret;
  217. if (microamp == 0)
  218. return regmap_field_write(chip->rm_fields[F_TE], 0);
  219. ret = rt9471_set_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp);
  220. if (ret)
  221. return ret;
  222. /* After applying the new IEOC value, enable charge termination */
  223. return regmap_field_write(chip->rm_fields[F_TE], 1);
  224. }
  225. static int rt9471_get_ieoc(struct rt9471_chip *chip, int *microamp)
  226. {
  227. unsigned int chg_term_enable;
  228. int ret;
  229. ret = regmap_field_read(chip->rm_fields[F_TE], &chg_term_enable);
  230. if (ret)
  231. return ret;
  232. if (!chg_term_enable) {
  233. *microamp = 0;
  234. return 0;
  235. }
  236. return rt9471_get_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp);
  237. }
  238. static int rt9471_get_status(struct rt9471_chip *chip, int *status)
  239. {
  240. unsigned int ic_stat;
  241. int ret;
  242. ret = regmap_field_read(chip->rm_fields[F_IC_STAT], &ic_stat);
  243. if (ret)
  244. return ret;
  245. switch (ic_stat) {
  246. case RT9471_ICSTAT_VBUSRDY:
  247. case RT9471_ICSTAT_CHGFAULT:
  248. *status = POWER_SUPPLY_STATUS_NOT_CHARGING;
  249. break;
  250. case RT9471_ICSTAT_TRICKLECHG ... RT9471_ICSTAT_BGCHG:
  251. *status = POWER_SUPPLY_STATUS_CHARGING;
  252. break;
  253. case RT9471_ICSTAT_CHGDONE:
  254. *status = POWER_SUPPLY_STATUS_FULL;
  255. break;
  256. case RT9471_ICSTAT_SLEEP:
  257. case RT9471_ICSTAT_OTG:
  258. *status = POWER_SUPPLY_STATUS_DISCHARGING;
  259. break;
  260. default:
  261. *status = POWER_SUPPLY_STATUS_UNKNOWN;
  262. break;
  263. }
  264. return 0;
  265. }
  266. static int rt9471_get_vbus_good(struct rt9471_chip *chip, int *stat)
  267. {
  268. unsigned int vbus_gd;
  269. int ret;
  270. ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd);
  271. if (ret)
  272. return ret;
  273. *stat = vbus_gd;
  274. return 0;
  275. }
  276. static int rt9471_get_usb_type(struct rt9471_chip *chip, int *usb_type)
  277. {
  278. mutex_lock(&chip->var_lock);
  279. *usb_type = chip->psy_usb_type;
  280. mutex_unlock(&chip->var_lock);
  281. return 0;
  282. }
  283. static int rt9471_get_usb_type_current(struct rt9471_chip *chip,
  284. int *microamp)
  285. {
  286. mutex_lock(&chip->var_lock);
  287. *microamp = chip->psy_usb_curr;
  288. mutex_unlock(&chip->var_lock);
  289. return 0;
  290. }
  291. static enum power_supply_property rt9471_charger_properties[] = {
  292. POWER_SUPPLY_PROP_STATUS,
  293. POWER_SUPPLY_PROP_ONLINE,
  294. POWER_SUPPLY_PROP_CURRENT_MAX,
  295. POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
  296. POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
  297. POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
  298. POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
  299. POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
  300. POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
  301. POWER_SUPPLY_PROP_USB_TYPE,
  302. POWER_SUPPLY_PROP_PRECHARGE_CURRENT,
  303. POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
  304. POWER_SUPPLY_PROP_MODEL_NAME,
  305. POWER_SUPPLY_PROP_MANUFACTURER,
  306. };
  307. static int rt9471_charger_property_is_writeable(struct power_supply *psy,
  308. enum power_supply_property psp)
  309. {
  310. switch (psp) {
  311. case POWER_SUPPLY_PROP_STATUS:
  312. case POWER_SUPPLY_PROP_ONLINE:
  313. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
  314. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
  315. case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
  316. case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
  317. case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
  318. case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
  319. return 1;
  320. default:
  321. return 0;
  322. }
  323. }
  324. static int rt9471_charger_set_property(struct power_supply *psy,
  325. enum power_supply_property psp,
  326. const union power_supply_propval *val)
  327. {
  328. struct rt9471_chip *chip = power_supply_get_drvdata(psy);
  329. int value = val->intval;
  330. switch (psp) {
  331. case POWER_SUPPLY_PROP_STATUS:
  332. return regmap_field_write(chip->rm_fields[F_CHG_EN], !!value);
  333. case POWER_SUPPLY_PROP_ONLINE:
  334. return regmap_field_write(chip->rm_fields[F_HZ], !value);
  335. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
  336. return rt9471_set_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, value);
  337. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
  338. return rt9471_set_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, value);
  339. case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
  340. return rt9471_set_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, value);
  341. case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
  342. return rt9471_set_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, value);
  343. case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
  344. return rt9471_set_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, value);
  345. case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
  346. return rt9471_set_ieoc(chip, val->intval);
  347. default:
  348. return -EINVAL;
  349. }
  350. }
  351. static const char * const rt9471_manufacturer = "Richtek Technology Corp.";
  352. static const char * const rt9471_model = "RT9471";
  353. static int rt9471_charger_get_property(struct power_supply *psy,
  354. enum power_supply_property psp,
  355. union power_supply_propval *val)
  356. {
  357. struct rt9471_chip *chip = power_supply_get_drvdata(psy);
  358. int *pvalue = &val->intval;
  359. switch (psp) {
  360. case POWER_SUPPLY_PROP_STATUS:
  361. return rt9471_get_status(chip, pvalue);
  362. case POWER_SUPPLY_PROP_ONLINE:
  363. return rt9471_get_vbus_good(chip, pvalue);
  364. case POWER_SUPPLY_PROP_CURRENT_MAX:
  365. return rt9471_get_usb_type_current(chip, pvalue);
  366. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
  367. return rt9471_get_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, pvalue);
  368. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
  369. *pvalue = RT9471_ICHG_MAXUA;
  370. return 0;
  371. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
  372. return rt9471_get_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, pvalue);
  373. case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
  374. val->intval = RT9471_VCHG_MAXUV;
  375. return 0;
  376. case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
  377. return rt9471_get_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, pvalue);
  378. case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
  379. return rt9471_get_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, pvalue);
  380. case POWER_SUPPLY_PROP_USB_TYPE:
  381. return rt9471_get_usb_type(chip, pvalue);
  382. case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
  383. return rt9471_get_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, pvalue);
  384. case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
  385. return rt9471_get_ieoc(chip, pvalue);
  386. case POWER_SUPPLY_PROP_MODEL_NAME:
  387. val->strval = rt9471_model;
  388. return 0;
  389. case POWER_SUPPLY_PROP_MANUFACTURER:
  390. val->strval = rt9471_manufacturer;
  391. return 0;
  392. default:
  393. return -ENODATA;
  394. }
  395. }
  396. static irqreturn_t rt9471_vbus_gd_handler(int irqno, void *devid)
  397. {
  398. struct rt9471_chip *chip = devid;
  399. power_supply_changed(chip->psy);
  400. return IRQ_HANDLED;
  401. }
  402. static irqreturn_t rt9471_detach_handler(int irqno, void *devid)
  403. {
  404. struct rt9471_chip *chip = devid;
  405. unsigned int vbus_gd;
  406. int ret;
  407. ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd);
  408. if (ret)
  409. return IRQ_NONE;
  410. /* Only focus on really detached */
  411. if (vbus_gd)
  412. return IRQ_HANDLED;
  413. mutex_lock(&chip->var_lock);
  414. chip->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
  415. chip->psy_usb_curr = 0;
  416. mutex_unlock(&chip->var_lock);
  417. power_supply_changed(chip->psy);
  418. return IRQ_HANDLED;
  419. }
  420. static irqreturn_t rt9471_bc12_done_handler(int irqno, void *devid)
  421. {
  422. struct rt9471_chip *chip = devid;
  423. enum power_supply_usb_type usb_type;
  424. unsigned int port_stat;
  425. int usb_curr, ret;
  426. ret = regmap_field_read(chip->rm_fields[F_PORT_STAT], &port_stat);
  427. if (ret)
  428. return IRQ_NONE;
  429. switch (port_stat) {
  430. case RT9471_PORTSTAT_APPLE_10W:
  431. usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID;
  432. usb_curr = 2000000;
  433. break;
  434. case RT9471_PORTSTAT_APPLE_5W:
  435. usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID;
  436. usb_curr = 1000000;
  437. break;
  438. case RT9471_PORTSTAT_APPLE_12W:
  439. usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID;
  440. usb_curr = 2400000;
  441. break;
  442. case RT9471_PORTSTAT_SAMSUNG_10W:
  443. usb_type = POWER_SUPPLY_USB_TYPE_DCP;
  444. usb_curr = 2000000;
  445. break;
  446. case RT9471_PORTSTAT_DCP:
  447. usb_type = POWER_SUPPLY_USB_TYPE_DCP;
  448. usb_curr = 1500000;
  449. break;
  450. case RT9471_PORTSTAT_NSTD:
  451. case RT9471_PORTSTAT_SDP:
  452. usb_type = POWER_SUPPLY_USB_TYPE_SDP;
  453. usb_curr = 500000;
  454. break;
  455. case RT9471_PORTSTAT_CDP:
  456. usb_type = POWER_SUPPLY_USB_TYPE_CDP;
  457. usb_curr = 1500000;
  458. break;
  459. default:
  460. usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
  461. usb_curr = 0;
  462. break;
  463. }
  464. mutex_lock(&chip->var_lock);
  465. chip->psy_usb_type = usb_type;
  466. chip->psy_usb_curr = usb_curr;
  467. mutex_unlock(&chip->var_lock);
  468. power_supply_changed(chip->psy);
  469. return IRQ_HANDLED;
  470. }
  471. static irqreturn_t rt9471_wdt_handler(int irqno, void *devid)
  472. {
  473. struct rt9471_chip *chip = devid;
  474. int ret;
  475. ret = regmap_field_write(chip->rm_fields[F_WDT_RST], 1);
  476. return ret ? IRQ_NONE : IRQ_HANDLED;
  477. }
  478. static irqreturn_t rt9471_otg_fault_handler(int irqno, void *devid)
  479. {
  480. struct rt9471_chip *chip = devid;
  481. regulator_notifier_call_chain(chip->otg_rdev, REGULATOR_EVENT_FAIL, NULL);
  482. return IRQ_HANDLED;
  483. }
  484. #define RT9471_IRQ_DESC(_name, _hwirq) \
  485. { \
  486. .name = #_name, \
  487. .hwirq = _hwirq, \
  488. .handler = rt9471_##_name##_handler, \
  489. }
  490. static int rt9471_register_interrupts(struct rt9471_chip *chip)
  491. {
  492. struct device *dev = chip->dev;
  493. static const struct {
  494. char *name;
  495. int hwirq;
  496. irq_handler_t handler;
  497. } chg_irqs[] = {
  498. RT9471_IRQ_DESC(vbus_gd, RT9471_IRQ_VBUS_GD),
  499. RT9471_IRQ_DESC(detach, RT9471_IRQ_DETACH),
  500. RT9471_IRQ_DESC(bc12_done, RT9471_IRQ_BC12_DONE),
  501. RT9471_IRQ_DESC(wdt, RT9471_IRQ_WDT),
  502. RT9471_IRQ_DESC(otg_fault, RT9471_IRQ_OTG_FAULT),
  503. }, *curr;
  504. int i, virq, ret;
  505. for (i = 0; i < ARRAY_SIZE(chg_irqs); i++) {
  506. curr = chg_irqs + i;
  507. virq = regmap_irq_get_virq(chip->irq_chip_data, curr->hwirq);
  508. if (virq <= 0)
  509. return virq;
  510. ret = devm_request_threaded_irq(dev, virq, NULL, curr->handler,
  511. IRQF_ONESHOT, curr->name, chip);
  512. if (ret)
  513. return dev_err_probe(dev, ret, "Failed to register IRQ (%s)\n",
  514. curr->name);
  515. }
  516. return 0;
  517. }
  518. static const struct regulator_ops rt9471_otg_ops = {
  519. .enable = regulator_enable_regmap,
  520. .disable = regulator_disable_regmap,
  521. .is_enabled = regulator_is_enabled_regmap,
  522. .list_voltage = regulator_list_voltage_linear,
  523. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  524. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  525. .set_current_limit = regulator_set_current_limit_regmap,
  526. .get_current_limit = regulator_get_current_limit_regmap,
  527. };
  528. static const unsigned int rt9471_otg_microamp[] = { 500000, 1200000, };
  529. static const struct regulator_desc rt9471_otg_rdesc = {
  530. .of_match = of_match_ptr("usb-otg-vbus-regulator"),
  531. .name = "rt9471-otg-vbus",
  532. .owner = THIS_MODULE,
  533. .type = REGULATOR_VOLTAGE,
  534. .ops = &rt9471_otg_ops,
  535. .min_uV = RT9471_OTGCV_MINUV,
  536. .uV_step = RT9471_OTGCV_STEPUV,
  537. .n_voltages = RT9471_NUM_VOTG,
  538. .curr_table = rt9471_otg_microamp,
  539. .n_current_limits = ARRAY_SIZE(rt9471_otg_microamp),
  540. .enable_mask = RT9471_OTGEN_MASK,
  541. .enable_reg = RT9471_REG_FUNC,
  542. .vsel_reg = RT9471_REG_OTGCFG,
  543. .vsel_mask = RT9471_OTGCV_MASK,
  544. .csel_reg = RT9471_REG_OTGCFG,
  545. .csel_mask = RT9471_OTGCC_MASK,
  546. };
  547. static int rt9471_register_otg_regulator(struct rt9471_chip *chip)
  548. {
  549. struct device *dev = chip->dev;
  550. struct regulator_config cfg = { .dev = dev, .driver_data = chip };
  551. chip->otg_rdev = devm_regulator_register(dev, &rt9471_otg_rdesc, &cfg);
  552. return PTR_ERR_OR_ZERO(chip->otg_rdev);
  553. }
  554. static inline struct rt9471_chip *psy_device_to_chip(struct device *dev)
  555. {
  556. return power_supply_get_drvdata(to_power_supply(dev));
  557. }
  558. static ssize_t sysoff_enable_show(struct device *dev,
  559. struct device_attribute *attr, char *buf)
  560. {
  561. struct rt9471_chip *chip = psy_device_to_chip(dev);
  562. unsigned int sysoff_enable;
  563. int ret;
  564. ret = regmap_field_read(chip->rm_fields[F_BATFET_DIS], &sysoff_enable);
  565. if (ret)
  566. return ret;
  567. return sysfs_emit(buf, "%d\n", sysoff_enable);
  568. }
  569. static ssize_t sysoff_enable_store(struct device *dev,
  570. struct device_attribute *attr,
  571. const char *buf, size_t count)
  572. {
  573. struct rt9471_chip *chip = psy_device_to_chip(dev);
  574. unsigned int tmp;
  575. int ret;
  576. ret = kstrtouint(buf, 10, &tmp);
  577. if (ret)
  578. return ret;
  579. ret = regmap_field_write(chip->rm_fields[F_BATFET_DIS], !!tmp);
  580. if (ret)
  581. return ret;
  582. return count;
  583. }
  584. static ssize_t port_detect_enable_show(struct device *dev,
  585. struct device_attribute *attr, char *buf)
  586. {
  587. struct rt9471_chip *chip = psy_device_to_chip(dev);
  588. unsigned int bc12_enable;
  589. int ret;
  590. ret = regmap_field_read(chip->rm_fields[F_BC12_EN], &bc12_enable);
  591. if (ret)
  592. return ret;
  593. return sysfs_emit(buf, "%d\n", bc12_enable);
  594. }
  595. static ssize_t port_detect_enable_store(struct device *dev,
  596. struct device_attribute *attr,
  597. const char *buf, size_t count)
  598. {
  599. struct rt9471_chip *chip = psy_device_to_chip(dev);
  600. unsigned int tmp;
  601. int ret;
  602. ret = kstrtouint(buf, 10, &tmp);
  603. if (ret)
  604. return ret;
  605. ret = regmap_field_write(chip->rm_fields[F_BC12_EN], !!tmp);
  606. if (ret)
  607. return ret;
  608. return count;
  609. }
  610. static DEVICE_ATTR_RW(sysoff_enable);
  611. static DEVICE_ATTR_RW(port_detect_enable);
  612. static struct attribute *rt9471_sysfs_attrs[] = {
  613. &dev_attr_sysoff_enable.attr,
  614. &dev_attr_port_detect_enable.attr,
  615. NULL
  616. };
  617. ATTRIBUTE_GROUPS(rt9471_sysfs);
  618. static int rt9471_register_psy(struct rt9471_chip *chip)
  619. {
  620. struct device *dev = chip->dev;
  621. struct power_supply_desc *desc = &chip->psy_desc;
  622. struct power_supply_config cfg = {};
  623. char *psy_name;
  624. cfg.drv_data = chip;
  625. cfg.of_node = dev->of_node;
  626. cfg.attr_grp = rt9471_sysfs_groups;
  627. psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9471-%s", dev_name(dev));
  628. if (!psy_name)
  629. return -ENOMEM;
  630. desc->name = psy_name;
  631. desc->type = POWER_SUPPLY_TYPE_USB;
  632. desc->usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
  633. BIT(POWER_SUPPLY_USB_TYPE_CDP) |
  634. BIT(POWER_SUPPLY_USB_TYPE_DCP) |
  635. BIT(POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID) |
  636. BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN);
  637. desc->properties = rt9471_charger_properties;
  638. desc->num_properties = ARRAY_SIZE(rt9471_charger_properties);
  639. desc->get_property = rt9471_charger_get_property;
  640. desc->set_property = rt9471_charger_set_property;
  641. desc->property_is_writeable = rt9471_charger_property_is_writeable;
  642. chip->psy = devm_power_supply_register(dev, desc, &cfg);
  643. return PTR_ERR_OR_ZERO(chip->psy);
  644. }
  645. static const struct regmap_irq rt9471_regmap_irqs[] = {
  646. REGMAP_IRQ_REG_LINE(RT9471_IRQ_BC12_DONE, 8),
  647. REGMAP_IRQ_REG_LINE(RT9471_IRQ_DETACH, 8),
  648. REGMAP_IRQ_REG_LINE(RT9471_IRQ_RECHG, 8),
  649. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_DONE, 8),
  650. REGMAP_IRQ_REG_LINE(RT9471_IRQ_BG_CHG, 8),
  651. REGMAP_IRQ_REG_LINE(RT9471_IRQ_IE0C, 8),
  652. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_RDY, 8),
  653. REGMAP_IRQ_REG_LINE(RT9471_IRQ_VBUS_GD, 8),
  654. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BATOV, 8),
  655. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_SYSOV, 8),
  656. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_TOUT, 8),
  657. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BUSUV, 8),
  658. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_THREG, 8),
  659. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_AICR, 8),
  660. REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_MIVR, 8),
  661. REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_SHORT, 8),
  662. REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_MIN, 8),
  663. REGMAP_IRQ_REG_LINE(RT9471_IRQ_AICC_DONE, 8),
  664. REGMAP_IRQ_REG_LINE(RT9471_IRQ_PE_DONE, 8),
  665. REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COLD, 8),
  666. REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COOL, 8),
  667. REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_WARM, 8),
  668. REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_HOT, 8),
  669. REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_FAULT, 8),
  670. REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_LBP, 8),
  671. REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_CC, 8),
  672. REGMAP_IRQ_REG_LINE(RT9471_IRQ_WDT, 8),
  673. REGMAP_IRQ_REG_LINE(RT9471_IRQ_VAC_OV, 8),
  674. REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTP, 8),
  675. };
  676. static const struct regmap_irq_chip rt9471_irq_chip = {
  677. .name = "rt9471-irqs",
  678. .status_base = RT9471_REG_IRQ0,
  679. .mask_base = RT9471_REG_MASK0,
  680. .num_regs = RT9471_NUM_IRQ_REGS,
  681. .irqs = rt9471_regmap_irqs,
  682. .num_irqs = ARRAY_SIZE(rt9471_regmap_irqs),
  683. };
  684. static const struct reg_sequence rt9471_init_regs[] = {
  685. REG_SEQ0(RT9471_REG_INFO, 0x80), /* REG_RST */
  686. REG_SEQ0(RT9471_REG_TOP, 0xC0), /* WDT = 0 */
  687. REG_SEQ0(RT9471_REG_FUNC, 0x01), /* BATFET_DIS_DLY = 0 */
  688. REG_SEQ0(RT9471_REG_IBUS, 0x0A), /* AUTO_AICR = 0 */
  689. REG_SEQ0(RT9471_REG_VBUS, 0xC6), /* VAC_OVP = 14V */
  690. REG_SEQ0(RT9471_REG_JEITA, 0x38), /* JEITA = 0 */
  691. REG_SEQ0(RT9471_REG_DPDMDET, 0x31), /* BC12_EN = 0, DCP_DP_OPT = 1 */
  692. };
  693. static int rt9471_check_devinfo(struct rt9471_chip *chip)
  694. {
  695. struct device *dev = chip->dev;
  696. unsigned int dev_id;
  697. int ret;
  698. ret = regmap_field_read(chip->rm_fields[F_DEVICE_ID], &dev_id);
  699. if (ret)
  700. return dev_err_probe(dev, ret, "Failed to read device_id\n");
  701. switch (dev_id) {
  702. case RT9470_DEVID:
  703. case RT9470D_DEVID:
  704. case RT9471_DEVID:
  705. case RT9471D_DEVID:
  706. return 0;
  707. default:
  708. return dev_err_probe(dev, -ENODEV, "Incorrect device id\n");
  709. }
  710. }
  711. static bool rt9471_accessible_reg(struct device *dev, unsigned int reg)
  712. {
  713. switch (reg) {
  714. case 0x00 ... 0x0F:
  715. case 0x10 ... 0x13:
  716. case 0x20 ... 0x33:
  717. case 0x40 ... 0xA1:
  718. return true;
  719. default:
  720. return false;
  721. }
  722. }
  723. static const struct regmap_config rt9471_regmap_config = {
  724. .reg_bits = 8,
  725. .val_bits = 8,
  726. .max_register = 0xA1,
  727. .writeable_reg = rt9471_accessible_reg,
  728. .readable_reg = rt9471_accessible_reg,
  729. };
  730. static int rt9471_probe(struct i2c_client *i2c)
  731. {
  732. struct device *dev = &i2c->dev;
  733. struct rt9471_chip *chip;
  734. struct gpio_desc *ce_gpio;
  735. struct regmap *regmap;
  736. int ret;
  737. chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
  738. if (!chip)
  739. return -ENOMEM;
  740. chip->dev = dev;
  741. mutex_init(&chip->var_lock);
  742. i2c_set_clientdata(i2c, chip);
  743. /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */
  744. ce_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH);
  745. if (IS_ERR(ce_gpio))
  746. return dev_err_probe(dev, PTR_ERR(ce_gpio),
  747. "Failed to config charge enable gpio\n");
  748. regmap = devm_regmap_init_i2c(i2c, &rt9471_regmap_config);
  749. if (IS_ERR(regmap))
  750. return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n");
  751. chip->regmap = regmap;
  752. ret = devm_regmap_field_bulk_alloc(dev, regmap, chip->rm_fields,
  753. rt9471_reg_fields,
  754. ARRAY_SIZE(rt9471_reg_fields));
  755. if (ret)
  756. return dev_err_probe(dev, ret, "Failed to alloc regmap field\n");
  757. ret = rt9471_check_devinfo(chip);
  758. if (ret)
  759. return ret;
  760. ret = regmap_register_patch(regmap, rt9471_init_regs,
  761. ARRAY_SIZE(rt9471_init_regs));
  762. if (ret)
  763. return dev_err_probe(dev, ret, "Failed to init registers\n");
  764. ret = devm_regmap_add_irq_chip(dev, regmap, i2c->irq,
  765. IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0,
  766. &rt9471_irq_chip, &chip->irq_chip_data);
  767. if (ret)
  768. return dev_err_probe(dev, ret, "Failed to add IRQ chip\n");
  769. ret = rt9471_register_psy(chip);
  770. if (ret)
  771. return dev_err_probe(dev, ret, "Failed to register psy\n");
  772. ret = rt9471_register_otg_regulator(chip);
  773. if (ret)
  774. return dev_err_probe(dev, ret, "Failed to register otg\n");
  775. ret = rt9471_register_interrupts(chip);
  776. if (ret)
  777. return ret;
  778. /* After IRQs are all initialized, enable port detection by default */
  779. return regmap_field_write(chip->rm_fields[F_BC12_EN], 1);
  780. }
  781. static void rt9471_shutdown(struct i2c_client *i2c)
  782. {
  783. struct rt9471_chip *chip = i2c_get_clientdata(i2c);
  784. /*
  785. * There's no external reset pin. Do register reset to guarantee charger
  786. * function is normal after shutdown
  787. */
  788. regmap_field_write(chip->rm_fields[F_REG_RST], 1);
  789. }
  790. static const struct of_device_id rt9471_of_device_id[] = {
  791. { .compatible = "richtek,rt9471" },
  792. {}
  793. };
  794. MODULE_DEVICE_TABLE(of, rt9471_of_device_id);
  795. static struct i2c_driver rt9471_driver = {
  796. .driver = {
  797. .name = "rt9471",
  798. .of_match_table = rt9471_of_device_id,
  799. },
  800. .probe = rt9471_probe,
  801. .shutdown = rt9471_shutdown,
  802. };
  803. module_i2c_driver(rt9471_driver);
  804. MODULE_DESCRIPTION("Richtek RT9471 charger driver");
  805. MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>");
  806. MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
  807. MODULE_LICENSE("GPL");