ptp_ines.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (C) 2018 MOSER-BAER AG
  4. //
  5. #define pr_fmt(fmt) "InES_PTP: " fmt
  6. #include <linux/ethtool.h>
  7. #include <linux/export.h>
  8. #include <linux/if_vlan.h>
  9. #include <linux/mii_timestamper.h>
  10. #include <linux/module.h>
  11. #include <linux/net_tstamp.h>
  12. #include <linux/of.h>
  13. #include <linux/of_address.h>
  14. #include <linux/of_irq.h>
  15. #include <linux/phy.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/ptp_classify.h>
  18. #include <linux/ptp_clock_kernel.h>
  19. #include <linux/stddef.h>
  20. MODULE_DESCRIPTION("Driver for the ZHAW InES PTP time stamping IP core");
  21. MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
  22. MODULE_VERSION("1.0");
  23. MODULE_LICENSE("GPL");
  24. /* GLOBAL register */
  25. #define MCAST_MAC_SELECT_SHIFT 2
  26. #define MCAST_MAC_SELECT_MASK 0x3
  27. #define IO_RESET BIT(1)
  28. #define PTP_RESET BIT(0)
  29. /* VERSION register */
  30. #define IF_MAJOR_VER_SHIFT 12
  31. #define IF_MAJOR_VER_MASK 0xf
  32. #define IF_MINOR_VER_SHIFT 8
  33. #define IF_MINOR_VER_MASK 0xf
  34. #define FPGA_MAJOR_VER_SHIFT 4
  35. #define FPGA_MAJOR_VER_MASK 0xf
  36. #define FPGA_MINOR_VER_SHIFT 0
  37. #define FPGA_MINOR_VER_MASK 0xf
  38. /* INT_STAT register */
  39. #define RX_INTR_STATUS_3 BIT(5)
  40. #define RX_INTR_STATUS_2 BIT(4)
  41. #define RX_INTR_STATUS_1 BIT(3)
  42. #define TX_INTR_STATUS_3 BIT(2)
  43. #define TX_INTR_STATUS_2 BIT(1)
  44. #define TX_INTR_STATUS_1 BIT(0)
  45. /* INT_MSK register */
  46. #define RX_INTR_MASK_3 BIT(5)
  47. #define RX_INTR_MASK_2 BIT(4)
  48. #define RX_INTR_MASK_1 BIT(3)
  49. #define TX_INTR_MASK_3 BIT(2)
  50. #define TX_INTR_MASK_2 BIT(1)
  51. #define TX_INTR_MASK_1 BIT(0)
  52. /* BUF_STAT register */
  53. #define RX_FIFO_NE_3 BIT(5)
  54. #define RX_FIFO_NE_2 BIT(4)
  55. #define RX_FIFO_NE_1 BIT(3)
  56. #define TX_FIFO_NE_3 BIT(2)
  57. #define TX_FIFO_NE_2 BIT(1)
  58. #define TX_FIFO_NE_1 BIT(0)
  59. /* PORT_CONF register */
  60. #define CM_ONE_STEP BIT(6)
  61. #define PHY_SPEED_SHIFT 4
  62. #define PHY_SPEED_MASK 0x3
  63. #define P2P_DELAY_WR_POS_SHIFT 2
  64. #define P2P_DELAY_WR_POS_MASK 0x3
  65. #define PTP_MODE_SHIFT 0
  66. #define PTP_MODE_MASK 0x3
  67. /* TS_STAT_TX register */
  68. #define TS_ENABLE BIT(15)
  69. #define DATA_READ_POS_SHIFT 8
  70. #define DATA_READ_POS_MASK 0x1f
  71. #define DISCARDED_EVENTS_SHIFT 4
  72. #define DISCARDED_EVENTS_MASK 0xf
  73. #define INES_N_PORTS 3
  74. #define INES_REGISTER_SIZE 0x80
  75. #define INES_PORT_OFFSET 0x20
  76. #define INES_PORT_SIZE 0x20
  77. #define INES_FIFO_DEPTH 90
  78. #define INES_MAX_EVENTS 100
  79. #define BC_PTP_V1 0
  80. #define BC_PTP_V2 1
  81. #define TC_E2E_PTP_V2 2
  82. #define TC_P2P_PTP_V2 3
  83. #define PHY_SPEED_10 0
  84. #define PHY_SPEED_100 1
  85. #define PHY_SPEED_1000 2
  86. #define PORT_CONF \
  87. ((PHY_SPEED_1000 << PHY_SPEED_SHIFT) | (BC_PTP_V2 << PTP_MODE_SHIFT))
  88. #define ines_read32(s, r) __raw_readl((void __iomem *)&s->regs->r)
  89. #define ines_write32(s, v, r) __raw_writel(v, (void __iomem *)&s->regs->r)
  90. #define MESSAGE_TYPE_SYNC 1
  91. #define MESSAGE_TYPE_P_DELAY_REQ 2
  92. #define MESSAGE_TYPE_P_DELAY_RESP 3
  93. #define MESSAGE_TYPE_DELAY_REQ 4
  94. static LIST_HEAD(ines_clocks);
  95. static DEFINE_MUTEX(ines_clocks_lock);
  96. struct ines_global_regs {
  97. u32 id;
  98. u32 test;
  99. u32 global;
  100. u32 version;
  101. u32 test2;
  102. u32 int_stat;
  103. u32 int_msk;
  104. u32 buf_stat;
  105. };
  106. struct ines_port_registers {
  107. u32 port_conf;
  108. u32 p_delay;
  109. u32 ts_stat_tx;
  110. u32 ts_stat_rx;
  111. u32 ts_tx;
  112. u32 ts_rx;
  113. };
  114. struct ines_timestamp {
  115. struct list_head list;
  116. unsigned long tmo;
  117. u16 tag;
  118. u64 sec;
  119. u64 nsec;
  120. u64 clkid;
  121. u16 portnum;
  122. u16 seqid;
  123. };
  124. struct ines_port {
  125. struct ines_port_registers *regs;
  126. struct mii_timestamper mii_ts;
  127. struct ines_clock *clock;
  128. bool rxts_enabled;
  129. bool txts_enabled;
  130. unsigned int index;
  131. struct delayed_work ts_work;
  132. /* lock protects event list and tx_skb */
  133. spinlock_t lock;
  134. struct sk_buff *tx_skb;
  135. struct list_head events;
  136. struct list_head pool;
  137. struct ines_timestamp pool_data[INES_MAX_EVENTS];
  138. };
  139. struct ines_clock {
  140. struct ines_port port[INES_N_PORTS];
  141. struct ines_global_regs __iomem *regs;
  142. void __iomem *base;
  143. struct device_node *node;
  144. struct device *dev;
  145. struct list_head list;
  146. };
  147. static bool ines_match(struct sk_buff *skb, unsigned int ptp_class,
  148. struct ines_timestamp *ts, struct device *dev);
  149. static int ines_rxfifo_read(struct ines_port *port);
  150. static u64 ines_rxts64(struct ines_port *port, unsigned int words);
  151. static bool ines_timestamp_expired(struct ines_timestamp *ts);
  152. static u64 ines_txts64(struct ines_port *port, unsigned int words);
  153. static void ines_txtstamp_work(struct work_struct *work);
  154. static bool is_sync_pdelay_resp(struct sk_buff *skb, int type);
  155. static u8 tag_to_msgtype(u8 tag);
  156. static void ines_clock_cleanup(struct ines_clock *clock)
  157. {
  158. struct ines_port *port;
  159. int i;
  160. for (i = 0; i < INES_N_PORTS; i++) {
  161. port = &clock->port[i];
  162. cancel_delayed_work_sync(&port->ts_work);
  163. }
  164. }
  165. static int ines_clock_init(struct ines_clock *clock, struct device *device,
  166. void __iomem *addr)
  167. {
  168. struct device_node *node = device->of_node;
  169. unsigned long port_addr;
  170. struct ines_port *port;
  171. int i, j;
  172. INIT_LIST_HEAD(&clock->list);
  173. clock->node = node;
  174. clock->dev = device;
  175. clock->base = addr;
  176. clock->regs = clock->base;
  177. for (i = 0; i < INES_N_PORTS; i++) {
  178. port = &clock->port[i];
  179. port_addr = (unsigned long) clock->base +
  180. INES_PORT_OFFSET + i * INES_PORT_SIZE;
  181. port->regs = (struct ines_port_registers *) port_addr;
  182. port->clock = clock;
  183. port->index = i;
  184. INIT_DELAYED_WORK(&port->ts_work, ines_txtstamp_work);
  185. spin_lock_init(&port->lock);
  186. INIT_LIST_HEAD(&port->events);
  187. INIT_LIST_HEAD(&port->pool);
  188. for (j = 0; j < INES_MAX_EVENTS; j++)
  189. list_add(&port->pool_data[j].list, &port->pool);
  190. }
  191. ines_write32(clock, 0xBEEF, test);
  192. ines_write32(clock, 0xBEEF, test2);
  193. dev_dbg(device, "ID 0x%x\n", ines_read32(clock, id));
  194. dev_dbg(device, "TEST 0x%x\n", ines_read32(clock, test));
  195. dev_dbg(device, "VERSION 0x%x\n", ines_read32(clock, version));
  196. dev_dbg(device, "TEST2 0x%x\n", ines_read32(clock, test2));
  197. for (i = 0; i < INES_N_PORTS; i++) {
  198. port = &clock->port[i];
  199. ines_write32(port, PORT_CONF, port_conf);
  200. }
  201. return 0;
  202. }
  203. static struct ines_port *ines_find_port(struct device_node *node, u32 index)
  204. {
  205. struct ines_port *port = NULL;
  206. struct ines_clock *clock;
  207. struct list_head *this;
  208. mutex_lock(&ines_clocks_lock);
  209. list_for_each(this, &ines_clocks) {
  210. clock = list_entry(this, struct ines_clock, list);
  211. if (clock->node == node) {
  212. port = &clock->port[index];
  213. break;
  214. }
  215. }
  216. mutex_unlock(&ines_clocks_lock);
  217. return port;
  218. }
  219. static u64 ines_find_rxts(struct ines_port *port, struct sk_buff *skb, int type)
  220. {
  221. struct list_head *this, *next;
  222. struct ines_timestamp *ts;
  223. unsigned long flags;
  224. u64 ns = 0;
  225. if (type == PTP_CLASS_NONE)
  226. return 0;
  227. spin_lock_irqsave(&port->lock, flags);
  228. ines_rxfifo_read(port);
  229. list_for_each_safe(this, next, &port->events) {
  230. ts = list_entry(this, struct ines_timestamp, list);
  231. if (ines_timestamp_expired(ts)) {
  232. list_del_init(&ts->list);
  233. list_add(&ts->list, &port->pool);
  234. continue;
  235. }
  236. if (ines_match(skb, type, ts, port->clock->dev)) {
  237. ns = ts->sec * 1000000000ULL + ts->nsec;
  238. list_del_init(&ts->list);
  239. list_add(&ts->list, &port->pool);
  240. break;
  241. }
  242. }
  243. spin_unlock_irqrestore(&port->lock, flags);
  244. return ns;
  245. }
  246. static u64 ines_find_txts(struct ines_port *port, struct sk_buff *skb)
  247. {
  248. unsigned int class = ptp_classify_raw(skb), i;
  249. u32 data_rd_pos, buf_stat, mask, ts_stat_tx;
  250. struct ines_timestamp ts;
  251. unsigned long flags;
  252. u64 ns = 0;
  253. mask = TX_FIFO_NE_1 << port->index;
  254. spin_lock_irqsave(&port->lock, flags);
  255. for (i = 0; i < INES_FIFO_DEPTH; i++) {
  256. buf_stat = ines_read32(port->clock, buf_stat);
  257. if (!(buf_stat & mask)) {
  258. dev_dbg(port->clock->dev,
  259. "Tx timestamp FIFO unexpectedly empty\n");
  260. break;
  261. }
  262. ts_stat_tx = ines_read32(port, ts_stat_tx);
  263. data_rd_pos = (ts_stat_tx >> DATA_READ_POS_SHIFT) &
  264. DATA_READ_POS_MASK;
  265. if (data_rd_pos) {
  266. dev_err(port->clock->dev,
  267. "unexpected Tx read pos %u\n", data_rd_pos);
  268. break;
  269. }
  270. ts.tag = ines_read32(port, ts_tx);
  271. ts.sec = ines_txts64(port, 3);
  272. ts.nsec = ines_txts64(port, 2);
  273. ts.clkid = ines_txts64(port, 4);
  274. ts.portnum = ines_read32(port, ts_tx);
  275. ts.seqid = ines_read32(port, ts_tx);
  276. if (ines_match(skb, class, &ts, port->clock->dev)) {
  277. ns = ts.sec * 1000000000ULL + ts.nsec;
  278. break;
  279. }
  280. }
  281. spin_unlock_irqrestore(&port->lock, flags);
  282. return ns;
  283. }
  284. static int ines_hwtstamp(struct mii_timestamper *mii_ts,
  285. struct kernel_hwtstamp_config *cfg,
  286. struct netlink_ext_ack *extack)
  287. {
  288. struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
  289. u32 cm_one_step = 0, port_conf, ts_stat_rx, ts_stat_tx;
  290. unsigned long flags;
  291. switch (cfg->tx_type) {
  292. case HWTSTAMP_TX_OFF:
  293. ts_stat_tx = 0;
  294. break;
  295. case HWTSTAMP_TX_ON:
  296. ts_stat_tx = TS_ENABLE;
  297. break;
  298. case HWTSTAMP_TX_ONESTEP_P2P:
  299. ts_stat_tx = TS_ENABLE;
  300. cm_one_step = CM_ONE_STEP;
  301. break;
  302. default:
  303. return -ERANGE;
  304. }
  305. switch (cfg->rx_filter) {
  306. case HWTSTAMP_FILTER_NONE:
  307. ts_stat_rx = 0;
  308. break;
  309. case HWTSTAMP_FILTER_ALL:
  310. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  311. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  312. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  313. return -ERANGE;
  314. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  315. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  316. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  317. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  318. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  319. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  320. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  321. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  322. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  323. ts_stat_rx = TS_ENABLE;
  324. cfg->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
  325. break;
  326. default:
  327. return -ERANGE;
  328. }
  329. spin_lock_irqsave(&port->lock, flags);
  330. port_conf = ines_read32(port, port_conf);
  331. port_conf &= ~CM_ONE_STEP;
  332. port_conf |= cm_one_step;
  333. ines_write32(port, port_conf, port_conf);
  334. ines_write32(port, ts_stat_rx, ts_stat_rx);
  335. ines_write32(port, ts_stat_tx, ts_stat_tx);
  336. port->rxts_enabled = ts_stat_rx == TS_ENABLE;
  337. port->txts_enabled = ts_stat_tx == TS_ENABLE;
  338. spin_unlock_irqrestore(&port->lock, flags);
  339. return 0;
  340. }
  341. static void ines_link_state(struct mii_timestamper *mii_ts,
  342. struct phy_device *phydev)
  343. {
  344. struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
  345. u32 port_conf, speed_conf;
  346. unsigned long flags;
  347. switch (phydev->speed) {
  348. case SPEED_10:
  349. speed_conf = PHY_SPEED_10 << PHY_SPEED_SHIFT;
  350. break;
  351. case SPEED_100:
  352. speed_conf = PHY_SPEED_100 << PHY_SPEED_SHIFT;
  353. break;
  354. case SPEED_1000:
  355. speed_conf = PHY_SPEED_1000 << PHY_SPEED_SHIFT;
  356. break;
  357. default:
  358. dev_err(port->clock->dev, "bad speed: %d\n", phydev->speed);
  359. return;
  360. }
  361. spin_lock_irqsave(&port->lock, flags);
  362. port_conf = ines_read32(port, port_conf);
  363. port_conf &= ~(0x3 << PHY_SPEED_SHIFT);
  364. port_conf |= speed_conf;
  365. ines_write32(port, port_conf, port_conf);
  366. spin_unlock_irqrestore(&port->lock, flags);
  367. }
  368. static bool ines_match(struct sk_buff *skb, unsigned int ptp_class,
  369. struct ines_timestamp *ts, struct device *dev)
  370. {
  371. struct ptp_header *hdr;
  372. u16 portn, seqid;
  373. u8 msgtype;
  374. u64 clkid;
  375. if (unlikely(ptp_class & PTP_CLASS_V1))
  376. return false;
  377. hdr = ptp_parse_header(skb, ptp_class);
  378. if (!hdr)
  379. return false;
  380. msgtype = ptp_get_msgtype(hdr, ptp_class);
  381. clkid = be64_to_cpup((__be64 *)&hdr->source_port_identity.clock_identity.id[0]);
  382. portn = be16_to_cpu(hdr->source_port_identity.port_number);
  383. seqid = be16_to_cpu(hdr->sequence_id);
  384. if (tag_to_msgtype(ts->tag & 0x7) != msgtype) {
  385. dev_dbg(dev, "msgtype mismatch ts %hhu != skb %hhu\n",
  386. tag_to_msgtype(ts->tag & 0x7), msgtype);
  387. return false;
  388. }
  389. if (ts->clkid != clkid) {
  390. dev_dbg(dev, "clkid mismatch ts %llx != skb %llx\n",
  391. ts->clkid, clkid);
  392. return false;
  393. }
  394. if (ts->portnum != portn) {
  395. dev_dbg(dev, "portn mismatch ts %hu != skb %hu\n",
  396. ts->portnum, portn);
  397. return false;
  398. }
  399. if (ts->seqid != seqid) {
  400. dev_dbg(dev, "seqid mismatch ts %hu != skb %hu\n",
  401. ts->seqid, seqid);
  402. return false;
  403. }
  404. return true;
  405. }
  406. static bool ines_rxtstamp(struct mii_timestamper *mii_ts,
  407. struct sk_buff *skb, int type)
  408. {
  409. struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
  410. struct skb_shared_hwtstamps *ssh;
  411. u64 ns;
  412. if (!port->rxts_enabled)
  413. return false;
  414. ns = ines_find_rxts(port, skb, type);
  415. if (!ns)
  416. return false;
  417. ssh = skb_hwtstamps(skb);
  418. ssh->hwtstamp = ns_to_ktime(ns);
  419. netif_rx(skb);
  420. return true;
  421. }
  422. static int ines_rxfifo_read(struct ines_port *port)
  423. {
  424. u32 data_rd_pos, buf_stat, mask, ts_stat_rx;
  425. struct ines_timestamp *ts;
  426. unsigned int i;
  427. mask = RX_FIFO_NE_1 << port->index;
  428. for (i = 0; i < INES_FIFO_DEPTH; i++) {
  429. if (list_empty(&port->pool)) {
  430. dev_err(port->clock->dev, "event pool is empty\n");
  431. return -1;
  432. }
  433. buf_stat = ines_read32(port->clock, buf_stat);
  434. if (!(buf_stat & mask))
  435. break;
  436. ts_stat_rx = ines_read32(port, ts_stat_rx);
  437. data_rd_pos = (ts_stat_rx >> DATA_READ_POS_SHIFT) &
  438. DATA_READ_POS_MASK;
  439. if (data_rd_pos) {
  440. dev_err(port->clock->dev, "unexpected Rx read pos %u\n",
  441. data_rd_pos);
  442. break;
  443. }
  444. ts = list_first_entry(&port->pool, struct ines_timestamp, list);
  445. ts->tmo = jiffies + HZ;
  446. ts->tag = ines_read32(port, ts_rx);
  447. ts->sec = ines_rxts64(port, 3);
  448. ts->nsec = ines_rxts64(port, 2);
  449. ts->clkid = ines_rxts64(port, 4);
  450. ts->portnum = ines_read32(port, ts_rx);
  451. ts->seqid = ines_read32(port, ts_rx);
  452. list_del_init(&ts->list);
  453. list_add_tail(&ts->list, &port->events);
  454. }
  455. return 0;
  456. }
  457. static u64 ines_rxts64(struct ines_port *port, unsigned int words)
  458. {
  459. unsigned int i;
  460. u64 result;
  461. u16 word;
  462. word = ines_read32(port, ts_rx);
  463. result = word;
  464. words--;
  465. for (i = 0; i < words; i++) {
  466. word = ines_read32(port, ts_rx);
  467. result <<= 16;
  468. result |= word;
  469. }
  470. return result;
  471. }
  472. static bool ines_timestamp_expired(struct ines_timestamp *ts)
  473. {
  474. return time_after(jiffies, ts->tmo);
  475. }
  476. static int ines_ts_info(struct mii_timestamper *mii_ts,
  477. struct kernel_ethtool_ts_info *info)
  478. {
  479. info->so_timestamping =
  480. SOF_TIMESTAMPING_TX_HARDWARE |
  481. SOF_TIMESTAMPING_TX_SOFTWARE |
  482. SOF_TIMESTAMPING_RX_HARDWARE |
  483. SOF_TIMESTAMPING_RAW_HARDWARE;
  484. info->tx_types =
  485. (1 << HWTSTAMP_TX_OFF) |
  486. (1 << HWTSTAMP_TX_ON) |
  487. (1 << HWTSTAMP_TX_ONESTEP_P2P);
  488. info->rx_filters =
  489. (1 << HWTSTAMP_FILTER_NONE) |
  490. (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
  491. return 0;
  492. }
  493. static u64 ines_txts64(struct ines_port *port, unsigned int words)
  494. {
  495. unsigned int i;
  496. u64 result;
  497. u16 word;
  498. word = ines_read32(port, ts_tx);
  499. result = word;
  500. words--;
  501. for (i = 0; i < words; i++) {
  502. word = ines_read32(port, ts_tx);
  503. result <<= 16;
  504. result |= word;
  505. }
  506. return result;
  507. }
  508. static bool ines_txts_onestep(struct ines_port *port, struct sk_buff *skb, int type)
  509. {
  510. unsigned long flags;
  511. u32 port_conf;
  512. spin_lock_irqsave(&port->lock, flags);
  513. port_conf = ines_read32(port, port_conf);
  514. spin_unlock_irqrestore(&port->lock, flags);
  515. if (port_conf & CM_ONE_STEP)
  516. return is_sync_pdelay_resp(skb, type);
  517. return false;
  518. }
  519. static void ines_txtstamp(struct mii_timestamper *mii_ts,
  520. struct sk_buff *skb, int type)
  521. {
  522. struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
  523. struct sk_buff *old_skb = NULL;
  524. unsigned long flags;
  525. if (!port->txts_enabled || ines_txts_onestep(port, skb, type)) {
  526. kfree_skb(skb);
  527. return;
  528. }
  529. spin_lock_irqsave(&port->lock, flags);
  530. if (port->tx_skb)
  531. old_skb = port->tx_skb;
  532. port->tx_skb = skb;
  533. spin_unlock_irqrestore(&port->lock, flags);
  534. kfree_skb(old_skb);
  535. schedule_delayed_work(&port->ts_work, 1);
  536. }
  537. static void ines_txtstamp_work(struct work_struct *work)
  538. {
  539. struct ines_port *port =
  540. container_of(work, struct ines_port, ts_work.work);
  541. struct skb_shared_hwtstamps ssh;
  542. struct sk_buff *skb;
  543. unsigned long flags;
  544. u64 ns;
  545. spin_lock_irqsave(&port->lock, flags);
  546. skb = port->tx_skb;
  547. port->tx_skb = NULL;
  548. spin_unlock_irqrestore(&port->lock, flags);
  549. ns = ines_find_txts(port, skb);
  550. if (!ns) {
  551. kfree_skb(skb);
  552. return;
  553. }
  554. ssh.hwtstamp = ns_to_ktime(ns);
  555. skb_complete_tx_timestamp(skb, &ssh);
  556. }
  557. static bool is_sync_pdelay_resp(struct sk_buff *skb, int type)
  558. {
  559. struct ptp_header *hdr;
  560. u8 msgtype;
  561. hdr = ptp_parse_header(skb, type);
  562. if (!hdr)
  563. return false;
  564. msgtype = ptp_get_msgtype(hdr, type);
  565. switch (msgtype) {
  566. case PTP_MSGTYPE_SYNC:
  567. case PTP_MSGTYPE_PDELAY_RESP:
  568. return true;
  569. default:
  570. return false;
  571. }
  572. }
  573. static u8 tag_to_msgtype(u8 tag)
  574. {
  575. switch (tag) {
  576. case MESSAGE_TYPE_SYNC:
  577. return PTP_MSGTYPE_SYNC;
  578. case MESSAGE_TYPE_P_DELAY_REQ:
  579. return PTP_MSGTYPE_PDELAY_REQ;
  580. case MESSAGE_TYPE_P_DELAY_RESP:
  581. return PTP_MSGTYPE_PDELAY_RESP;
  582. case MESSAGE_TYPE_DELAY_REQ:
  583. return PTP_MSGTYPE_DELAY_REQ;
  584. }
  585. return 0xf;
  586. }
  587. static struct mii_timestamper *ines_ptp_probe_channel(struct device *device,
  588. unsigned int index)
  589. {
  590. struct device_node *node = device->of_node;
  591. struct ines_port *port;
  592. if (index > INES_N_PORTS - 1) {
  593. dev_err(device, "bad port index %u\n", index);
  594. return ERR_PTR(-EINVAL);
  595. }
  596. port = ines_find_port(node, index);
  597. if (!port) {
  598. dev_err(device, "missing port index %u\n", index);
  599. return ERR_PTR(-ENODEV);
  600. }
  601. port->mii_ts.rxtstamp = ines_rxtstamp;
  602. port->mii_ts.txtstamp = ines_txtstamp;
  603. port->mii_ts.hwtstamp = ines_hwtstamp;
  604. port->mii_ts.link_state = ines_link_state;
  605. port->mii_ts.ts_info = ines_ts_info;
  606. return &port->mii_ts;
  607. }
  608. static void ines_ptp_release_channel(struct device *device,
  609. struct mii_timestamper *mii_ts)
  610. {
  611. }
  612. static struct mii_timestamping_ctrl ines_ctrl = {
  613. .probe_channel = ines_ptp_probe_channel,
  614. .release_channel = ines_ptp_release_channel,
  615. };
  616. static int ines_ptp_ctrl_probe(struct platform_device *pld)
  617. {
  618. struct ines_clock *clock;
  619. void __iomem *addr;
  620. int err = 0;
  621. addr = devm_platform_ioremap_resource(pld, 0);
  622. if (IS_ERR(addr)) {
  623. err = PTR_ERR(addr);
  624. goto out;
  625. }
  626. clock = kzalloc(sizeof(*clock), GFP_KERNEL);
  627. if (!clock) {
  628. err = -ENOMEM;
  629. goto out;
  630. }
  631. if (ines_clock_init(clock, &pld->dev, addr)) {
  632. kfree(clock);
  633. err = -ENOMEM;
  634. goto out;
  635. }
  636. err = register_mii_tstamp_controller(&pld->dev, &ines_ctrl);
  637. if (err) {
  638. kfree(clock);
  639. goto out;
  640. }
  641. mutex_lock(&ines_clocks_lock);
  642. list_add_tail(&ines_clocks, &clock->list);
  643. mutex_unlock(&ines_clocks_lock);
  644. dev_set_drvdata(&pld->dev, clock);
  645. out:
  646. return err;
  647. }
  648. static void ines_ptp_ctrl_remove(struct platform_device *pld)
  649. {
  650. struct ines_clock *clock = dev_get_drvdata(&pld->dev);
  651. unregister_mii_tstamp_controller(&pld->dev);
  652. mutex_lock(&ines_clocks_lock);
  653. list_del(&clock->list);
  654. mutex_unlock(&ines_clocks_lock);
  655. ines_clock_cleanup(clock);
  656. kfree(clock);
  657. }
  658. static const struct of_device_id ines_ptp_ctrl_of_match[] = {
  659. { .compatible = "ines,ptp-ctrl" },
  660. { }
  661. };
  662. MODULE_DEVICE_TABLE(of, ines_ptp_ctrl_of_match);
  663. static struct platform_driver ines_ptp_ctrl_driver = {
  664. .probe = ines_ptp_ctrl_probe,
  665. .remove_new = ines_ptp_ctrl_remove,
  666. .driver = {
  667. .name = "ines_ptp_ctrl",
  668. .of_match_table = ines_ptp_ctrl_of_match,
  669. },
  670. };
  671. module_platform_driver(ines_ptp_ctrl_driver);