pwm-ark.c 6.0 KB

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  1. /*
  2. * Arkmicro pwm driver
  3. *
  4. * Licensed under GPLv2 or later.
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/err.h>
  8. #include <linux/io.h>
  9. #include <linux/ioport.h>
  10. #include <linux/kernel.h>
  11. #include <linux/math64.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pwm.h>
  16. #include <linux/slab.h>
  17. #include <linux/types.h>
  18. #define NUM_PWM 5//4
  19. /* PWM registers and bits definitions */
  20. #define PWM_EN 0x00
  21. #define PWM_DUTY 0x04
  22. #define PWM_CNTR 0x08
  23. #define PWM_DEFAULT_PERIOD 50000u
  24. /**
  25. * struct ark_pwm_chip - struct representing pwm chip
  26. *
  27. * @mmio_base: base address of pwm chip
  28. * @clk: pointer to clk structure of pwm chip
  29. * @chip: linux pwm chip representation
  30. */
  31. struct ark_pwm_chip {
  32. void __iomem *mmio_base;
  33. struct clk *clk;
  34. };
  35. //static inline struct ark_pwm_chip *to_ark_pwm_chip(struct pwm_chip *chip)
  36. //{
  37. // return container_of(chip, struct ark_pwm_chip, chip);
  38. //}
  39. static inline struct ark_pwm_chip *to_ark_pwm_chip(struct pwm_chip *chip)
  40. {
  41. return pwmchip_get_drvdata(chip);
  42. }
  43. static inline u32 ark_pwm_readl(struct ark_pwm_chip *chip, unsigned int num,
  44. unsigned long offset)
  45. {
  46. return readl_relaxed(chip->mmio_base + (num << 4) + offset);
  47. }
  48. static inline void ark_pwm_writel(struct ark_pwm_chip *chip,
  49. unsigned int num, unsigned long offset,
  50. unsigned long val)
  51. {
  52. writel_relaxed(val, chip->mmio_base + (num << 4) + offset);
  53. }
  54. static int ark_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  55. {
  56. struct ark_pwm_chip *pc = to_ark_pwm_chip(chip);
  57. u32 val;
  58. val = ark_pwm_readl(pc, pwm->hwpwm, PWM_EN);
  59. val |= 1;
  60. ark_pwm_writel(pc, pwm->hwpwm, PWM_EN, val);
  61. return 0;
  62. }
  63. static void ark_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  64. {
  65. struct ark_pwm_chip *pc = to_ark_pwm_chip(chip);
  66. u32 val;
  67. val = ark_pwm_readl(pc, pwm->hwpwm, PWM_EN);
  68. val &= ~1;
  69. ark_pwm_writel(pc, pwm->hwpwm, PWM_EN, val);
  70. }
  71. static int ark_pwm_reload(struct pwm_chip *chip, struct pwm_device *pwm)
  72. {
  73. struct ark_pwm_chip *pc = to_ark_pwm_chip(chip);
  74. u32 val;
  75. val = ark_pwm_readl(pc, pwm->hwpwm, PWM_EN);
  76. val |= 1 << 1;
  77. ark_pwm_writel(pc, pwm->hwpwm, PWM_EN, val);
  78. return 0;
  79. }
  80. static int ark_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  81. int duty_ns, int period_ns)
  82. {
  83. struct ark_pwm_chip *pc = to_ark_pwm_chip(chip);
  84. u32 clk_rate = clk_get_rate(pc->clk);
  85. u32 duty, counter;
  86. /* NOTE: given that pwm clk = 24MHz,
  87. * the minimum duty_ns = 1/24 * 10^3 = 41.67ns = 42ns
  88. * the minimum period_ns = minimum duty_ns = 42ns
  89. */
  90. if (duty_ns && duty_ns < 1000000000 / clk_rate) {
  91. printk("%s %d: invalid input duty_ns %d\n",
  92. __FUNCTION__, __LINE__, duty_ns);
  93. return -EINVAL;
  94. }
  95. /* set pwm duty register */
  96. duty = duty_ns * (clk_rate / 1000000) / 1000;
  97. ark_pwm_writel(pc, pwm->hwpwm, PWM_DUTY, duty);
  98. /* set pwm counter register */
  99. counter = period_ns * (clk_rate / 1000000) / 1000;
  100. ark_pwm_writel(pc, pwm->hwpwm, PWM_CNTR, counter);
  101. ark_pwm_reload(chip, pwm);
  102. return 0;
  103. }
  104. static int ark_pwm_get_state(struct pwm_chip *chip,
  105. struct pwm_device *pwm,
  106. struct pwm_state *state)
  107. {
  108. struct ark_pwm_chip *pc = to_ark_pwm_chip(chip);
  109. u32 clk_rate;
  110. u32 val;
  111. clk_rate = clk_get_rate(pc->clk);
  112. val = ark_pwm_readl(pc, pwm->hwpwm, PWM_EN);
  113. if (val & 1)
  114. state->enabled = true;
  115. else
  116. state->enabled = false;
  117. val = ark_pwm_readl(pc, pwm->hwpwm, PWM_DUTY);
  118. state->duty_cycle = val * 1000000 / clk_rate * 1000;
  119. val = ark_pwm_readl(pc, pwm->hwpwm, PWM_CNTR);
  120. state->period = val * 1000000 / clk_rate * 1000;
  121. return 0;
  122. }
  123. static int ark_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
  124. const struct pwm_state *state)
  125. {
  126. struct pwm_state cstate;
  127. pwm_get_state(pwm, &cstate);
  128. if (state->enabled) {
  129. if (cstate.enabled &&
  130. cstate.duty_cycle == state->duty_cycle &&
  131. cstate.period == state->period) {
  132. return 0;
  133. }
  134. ark_pwm_config(chip, pwm, state->duty_cycle, state->period);
  135. if (!cstate.enabled)
  136. ark_pwm_enable(chip, pwm);
  137. } else if (cstate.enabled) {
  138. ark_pwm_disable(chip, pwm);
  139. }
  140. return 0;
  141. }
  142. static const struct pwm_ops ark_pwm_ops = {
  143. .apply = ark_pwm_apply,
  144. .get_state = ark_pwm_get_state,
  145. };
  146. static int ark_pwm_probe(struct platform_device *pdev)
  147. {
  148. struct ark_pwm_chip *pc;
  149. struct pwm_chip *chip;
  150. u32 clk_rate;
  151. u32 counter;
  152. int ret, i;
  153. chip = devm_pwmchip_alloc(&pdev->dev, 5, sizeof(*pc));
  154. if (IS_ERR(chip))
  155. return PTR_ERR(chip);
  156. pc = to_ark_pwm_chip(chip);
  157. pc->mmio_base = devm_platform_ioremap_resource(pdev, 0);
  158. if (IS_ERR(pc->mmio_base))
  159. return PTR_ERR(pc->mmio_base);
  160. pc->clk = devm_clk_get(&pdev->dev, NULL);
  161. if (IS_ERR(pc->clk))
  162. return PTR_ERR(pc->clk);
  163. platform_set_drvdata(pdev, chip);
  164. chip->ops = &ark_pwm_ops;
  165. chip->npwm = NUM_PWM;
  166. /* set default period */
  167. clk_rate = clk_get_rate(pc->clk);
  168. for (i = 0; i < NUM_PWM; i++) {
  169. counter = PWM_DEFAULT_PERIOD * (clk_rate / 1000000) / 1000;
  170. ark_pwm_writel(pc, i, PWM_CNTR, counter);
  171. }
  172. ret = clk_prepare(pc->clk);
  173. if (ret)
  174. return ret;
  175. ret = devm_pwmchip_add(&pdev->dev, chip);
  176. if (ret < 0) {
  177. clk_unprepare(pc->clk);
  178. dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
  179. }
  180. return ret;
  181. }
  182. static void ark_pwm_remove(struct platform_device *pdev)
  183. {
  184. struct pwm_chip *chip = platform_get_drvdata(pdev);
  185. struct ark_pwm_chip *pc = to_ark_pwm_chip(chip);
  186. int i;
  187. for (i = 0; i < NUM_PWM; i++)
  188. pwm_disable(&chip->pwms[i]);
  189. /* clk was prepared in probe, hence unprepare it here */
  190. clk_unprepare(pc->clk);
  191. pwmchip_remove(chip);
  192. // return 0;
  193. }
  194. static const struct of_device_id ark_pwm_of_match[] = {
  195. { .compatible = "arkmicro,ark-pwm" },
  196. { }
  197. };
  198. MODULE_DEVICE_TABLE(of, ark_pwm_of_match);
  199. static struct platform_driver ark_pwm_driver = {
  200. .driver = {
  201. .name = "ark-pwm",
  202. .of_match_table = ark_pwm_of_match,
  203. },
  204. .probe = ark_pwm_probe,
  205. .remove = ark_pwm_remove,
  206. };
  207. //module_platform_driver(ark_pwm_driver);
  208. static int __init ark_pwm_init(void)
  209. {
  210. return platform_driver_register(&ark_pwm_driver);
  211. }
  212. subsys_initcall(ark_pwm_init);
  213. MODULE_AUTHOR("Sim");
  214. MODULE_DESCRIPTION("Arkmicro pwm driver");
  215. MODULE_LICENSE("GPL v2");