rtc-ds1511.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * An rtc driver for the Dallas DS1511
  4. *
  5. * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  6. * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
  7. *
  8. * Real time clock driver for the Dallas 1511 chip, which also
  9. * contains a watchdog timer. There is a tiny amount of code that
  10. * platform code could use to mess with the watchdog device a little
  11. * bit, but not a full watchdog driver.
  12. */
  13. #include <linux/bcd.h>
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gfp.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/module.h>
  23. #define DS1511_SEC 0x0
  24. #define DS1511_MIN 0x1
  25. #define DS1511_HOUR 0x2
  26. #define DS1511_DOW 0x3
  27. #define DS1511_DOM 0x4
  28. #define DS1511_MONTH 0x5
  29. #define DS1511_YEAR 0x6
  30. #define DS1511_CENTURY 0x7
  31. #define DS1511_AM1_SEC 0x8
  32. #define DS1511_AM2_MIN 0x9
  33. #define DS1511_AM3_HOUR 0xa
  34. #define DS1511_AM4_DATE 0xb
  35. #define DS1511_WD_MSEC 0xc
  36. #define DS1511_WD_SEC 0xd
  37. #define DS1511_CONTROL_A 0xe
  38. #define DS1511_CONTROL_B 0xf
  39. #define DS1511_RAMADDR_LSB 0x10
  40. #define DS1511_RAMDATA 0x13
  41. #define DS1511_BLF1 0x80
  42. #define DS1511_BLF2 0x40
  43. #define DS1511_PRS 0x20
  44. #define DS1511_PAB 0x10
  45. #define DS1511_TDF 0x08
  46. #define DS1511_KSF 0x04
  47. #define DS1511_WDF 0x02
  48. #define DS1511_IRQF 0x01
  49. #define DS1511_TE 0x80
  50. #define DS1511_CS 0x40
  51. #define DS1511_BME 0x20
  52. #define DS1511_TPE 0x10
  53. #define DS1511_TIE 0x08
  54. #define DS1511_KIE 0x04
  55. #define DS1511_WDE 0x02
  56. #define DS1511_WDS 0x01
  57. #define DS1511_RAM_MAX 0x100
  58. struct ds1511_data {
  59. struct rtc_device *rtc;
  60. void __iomem *ioaddr; /* virtual base address */
  61. int irq;
  62. spinlock_t lock;
  63. };
  64. static DEFINE_SPINLOCK(ds1511_lock);
  65. static __iomem char *ds1511_base;
  66. static u32 reg_spacing = 1;
  67. static void rtc_write(uint8_t val, uint32_t reg)
  68. {
  69. writeb(val, ds1511_base + (reg * reg_spacing));
  70. }
  71. static uint8_t rtc_read(uint32_t reg)
  72. {
  73. return readb(ds1511_base + (reg * reg_spacing));
  74. }
  75. static void rtc_disable_update(void)
  76. {
  77. rtc_write((rtc_read(DS1511_CONTROL_B) & ~DS1511_TE), DS1511_CONTROL_B);
  78. }
  79. static void rtc_enable_update(void)
  80. {
  81. rtc_write((rtc_read(DS1511_CONTROL_B) | DS1511_TE), DS1511_CONTROL_B);
  82. }
  83. static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
  84. {
  85. u8 mon, day, dow, hrs, min, sec, yrs, cen;
  86. unsigned long flags;
  87. yrs = rtc_tm->tm_year % 100;
  88. cen = 19 + rtc_tm->tm_year / 100;
  89. mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
  90. day = rtc_tm->tm_mday;
  91. dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
  92. hrs = rtc_tm->tm_hour;
  93. min = rtc_tm->tm_min;
  94. sec = rtc_tm->tm_sec;
  95. /*
  96. * each register is a different number of valid bits
  97. */
  98. sec = bin2bcd(sec) & 0x7f;
  99. min = bin2bcd(min) & 0x7f;
  100. hrs = bin2bcd(hrs) & 0x3f;
  101. day = bin2bcd(day) & 0x3f;
  102. mon = bin2bcd(mon) & 0x1f;
  103. yrs = bin2bcd(yrs) & 0xff;
  104. cen = bin2bcd(cen) & 0xff;
  105. spin_lock_irqsave(&ds1511_lock, flags);
  106. rtc_disable_update();
  107. rtc_write(cen, DS1511_CENTURY);
  108. rtc_write(yrs, DS1511_YEAR);
  109. rtc_write((rtc_read(DS1511_MONTH) & 0xe0) | mon, DS1511_MONTH);
  110. rtc_write(day, DS1511_DOM);
  111. rtc_write(hrs, DS1511_HOUR);
  112. rtc_write(min, DS1511_MIN);
  113. rtc_write(sec, DS1511_SEC);
  114. rtc_write(dow, DS1511_DOW);
  115. rtc_enable_update();
  116. spin_unlock_irqrestore(&ds1511_lock, flags);
  117. return 0;
  118. }
  119. static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
  120. {
  121. unsigned int century;
  122. unsigned long flags;
  123. spin_lock_irqsave(&ds1511_lock, flags);
  124. rtc_disable_update();
  125. rtc_tm->tm_sec = rtc_read(DS1511_SEC) & 0x7f;
  126. rtc_tm->tm_min = rtc_read(DS1511_MIN) & 0x7f;
  127. rtc_tm->tm_hour = rtc_read(DS1511_HOUR) & 0x3f;
  128. rtc_tm->tm_mday = rtc_read(DS1511_DOM) & 0x3f;
  129. rtc_tm->tm_wday = rtc_read(DS1511_DOW) & 0x7;
  130. rtc_tm->tm_mon = rtc_read(DS1511_MONTH) & 0x1f;
  131. rtc_tm->tm_year = rtc_read(DS1511_YEAR) & 0x7f;
  132. century = rtc_read(DS1511_CENTURY);
  133. rtc_enable_update();
  134. spin_unlock_irqrestore(&ds1511_lock, flags);
  135. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  136. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  137. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  138. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  139. rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
  140. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  141. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  142. century = bcd2bin(century) * 100;
  143. /*
  144. * Account for differences between how the RTC uses the values
  145. * and how they are defined in a struct rtc_time;
  146. */
  147. century += rtc_tm->tm_year;
  148. rtc_tm->tm_year = century - 1900;
  149. rtc_tm->tm_mon--;
  150. return 0;
  151. }
  152. static void ds1511_rtc_alarm_enable(unsigned int enabled)
  153. {
  154. rtc_write(rtc_read(DS1511_CONTROL_B) | (enabled ? DS1511_TIE : 0), DS1511_CONTROL_B);
  155. }
  156. static int ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  157. {
  158. struct ds1511_data *ds1511 = dev_get_drvdata(dev);
  159. unsigned long flags;
  160. spin_lock_irqsave(&ds1511->lock, flags);
  161. rtc_write(bin2bcd(alrm->time.tm_mday) & 0x3f, DS1511_AM4_DATE);
  162. rtc_write(bin2bcd(alrm->time.tm_hour) & 0x3f, DS1511_AM3_HOUR);
  163. rtc_write(bin2bcd(alrm->time.tm_min) & 0x7f, DS1511_AM2_MIN);
  164. rtc_write(bin2bcd(alrm->time.tm_sec) & 0x7f, DS1511_AM1_SEC);
  165. ds1511_rtc_alarm_enable(alrm->enabled);
  166. rtc_read(DS1511_CONTROL_A); /* clear interrupts */
  167. spin_unlock_irqrestore(&ds1511->lock, flags);
  168. return 0;
  169. }
  170. static int ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  171. {
  172. alrm->time.tm_mday = bcd2bin(rtc_read(DS1511_AM4_DATE) & 0x3f);
  173. alrm->time.tm_hour = bcd2bin(rtc_read(DS1511_AM3_HOUR) & 0x3f);
  174. alrm->time.tm_min = bcd2bin(rtc_read(DS1511_AM2_MIN) & 0x7f);
  175. alrm->time.tm_sec = bcd2bin(rtc_read(DS1511_AM1_SEC) & 0x7f);
  176. alrm->enabled = !!(rtc_read(DS1511_CONTROL_B) & DS1511_TIE);
  177. return 0;
  178. }
  179. static irqreturn_t ds1511_interrupt(int irq, void *dev_id)
  180. {
  181. struct platform_device *pdev = dev_id;
  182. struct ds1511_data *ds1511 = platform_get_drvdata(pdev);
  183. unsigned long events = 0;
  184. spin_lock(&ds1511->lock);
  185. /*
  186. * read and clear interrupt
  187. */
  188. if (rtc_read(DS1511_CONTROL_A) & DS1511_IRQF) {
  189. events = RTC_IRQF | RTC_AF;
  190. rtc_update_irq(ds1511->rtc, 1, events);
  191. }
  192. spin_unlock(&ds1511->lock);
  193. return events ? IRQ_HANDLED : IRQ_NONE;
  194. }
  195. static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  196. {
  197. struct ds1511_data *ds1511 = dev_get_drvdata(dev);
  198. unsigned long flags;
  199. spin_lock_irqsave(&ds1511->lock, flags);
  200. ds1511_rtc_alarm_enable(enabled);
  201. spin_unlock_irqrestore(&ds1511->lock, flags);
  202. return 0;
  203. }
  204. static const struct rtc_class_ops ds1511_rtc_ops = {
  205. .read_time = ds1511_rtc_read_time,
  206. .set_time = ds1511_rtc_set_time,
  207. .read_alarm = ds1511_rtc_read_alarm,
  208. .set_alarm = ds1511_rtc_set_alarm,
  209. .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
  210. };
  211. static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
  212. size_t size)
  213. {
  214. int i;
  215. rtc_write(pos, DS1511_RAMADDR_LSB);
  216. for (i = 0; i < size; i++)
  217. *(char *)buf++ = rtc_read(DS1511_RAMDATA);
  218. return 0;
  219. }
  220. static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
  221. size_t size)
  222. {
  223. int i;
  224. rtc_write(pos, DS1511_RAMADDR_LSB);
  225. for (i = 0; i < size; i++)
  226. rtc_write(*(char *)buf++, DS1511_RAMDATA);
  227. return 0;
  228. }
  229. static int ds1511_rtc_probe(struct platform_device *pdev)
  230. {
  231. struct ds1511_data *ds1511;
  232. int ret = 0;
  233. struct nvmem_config ds1511_nvmem_cfg = {
  234. .name = "ds1511_nvram",
  235. .word_size = 1,
  236. .stride = 1,
  237. .size = DS1511_RAM_MAX,
  238. .reg_read = ds1511_nvram_read,
  239. .reg_write = ds1511_nvram_write,
  240. .priv = &pdev->dev,
  241. };
  242. ds1511 = devm_kzalloc(&pdev->dev, sizeof(*ds1511), GFP_KERNEL);
  243. if (!ds1511)
  244. return -ENOMEM;
  245. ds1511_base = devm_platform_ioremap_resource(pdev, 0);
  246. if (IS_ERR(ds1511_base))
  247. return PTR_ERR(ds1511_base);
  248. ds1511->ioaddr = ds1511_base;
  249. ds1511->irq = platform_get_irq(pdev, 0);
  250. /*
  251. * turn on the clock and the crystal, etc.
  252. */
  253. rtc_write(DS1511_BME, DS1511_CONTROL_B);
  254. rtc_write(0, DS1511_CONTROL_A);
  255. /*
  256. * clear the wdog counter
  257. */
  258. rtc_write(0, DS1511_WD_MSEC);
  259. rtc_write(0, DS1511_WD_SEC);
  260. /*
  261. * start the clock
  262. */
  263. rtc_enable_update();
  264. /*
  265. * check for a dying bat-tree
  266. */
  267. if (rtc_read(DS1511_CONTROL_A) & DS1511_BLF1)
  268. dev_warn(&pdev->dev, "voltage-low detected.\n");
  269. spin_lock_init(&ds1511->lock);
  270. platform_set_drvdata(pdev, ds1511);
  271. ds1511->rtc = devm_rtc_allocate_device(&pdev->dev);
  272. if (IS_ERR(ds1511->rtc))
  273. return PTR_ERR(ds1511->rtc);
  274. ds1511->rtc->ops = &ds1511_rtc_ops;
  275. ds1511->rtc->range_max = RTC_TIMESTAMP_END_2099;
  276. ds1511->rtc->alarm_offset_max = 28 * 24 * 60 * 60 - 1;
  277. /*
  278. * if the platform has an interrupt in mind for this device,
  279. * then by all means, set it
  280. */
  281. if (ds1511->irq > 0) {
  282. rtc_read(DS1511_CONTROL_A);
  283. if (devm_request_irq(&pdev->dev, ds1511->irq, ds1511_interrupt,
  284. IRQF_SHARED, pdev->name, pdev) < 0) {
  285. dev_warn(&pdev->dev, "interrupt not available.\n");
  286. ds1511->irq = 0;
  287. }
  288. }
  289. if (ds1511->irq == 0)
  290. clear_bit(RTC_FEATURE_ALARM, ds1511->rtc->features);
  291. ret = devm_rtc_register_device(ds1511->rtc);
  292. if (ret)
  293. return ret;
  294. devm_rtc_nvmem_register(ds1511->rtc, &ds1511_nvmem_cfg);
  295. return 0;
  296. }
  297. /* work with hotplug and coldplug */
  298. MODULE_ALIAS("platform:ds1511");
  299. static struct platform_driver ds1511_rtc_driver = {
  300. .probe = ds1511_rtc_probe,
  301. .driver = {
  302. .name = "ds1511",
  303. },
  304. };
  305. module_platform_driver(ds1511_rtc_driver);
  306. MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
  307. MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
  308. MODULE_LICENSE("GPL");