rtc-ds2404.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
  3. #include <linux/platform_device.h>
  4. #include <linux/module.h>
  5. #include <linux/init.h>
  6. #include <linux/rtc.h>
  7. #include <linux/types.h>
  8. #include <linux/bcd.h>
  9. #include <linux/delay.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/slab.h>
  12. #include <linux/io.h>
  13. #define DS2404_STATUS_REG 0x200
  14. #define DS2404_CONTROL_REG 0x201
  15. #define DS2404_RTC_REG 0x202
  16. #define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
  17. #define DS2404_READ_SCRATCHPAD_CMD 0xaa
  18. #define DS2404_COPY_SCRATCHPAD_CMD 0x55
  19. #define DS2404_READ_MEMORY_CMD 0xf0
  20. #define DS2404_RST 0
  21. #define DS2404_CLK 1
  22. #define DS2404_DQ 2
  23. struct ds2404 {
  24. struct device *dev;
  25. struct gpio_desc *rst_gpiod;
  26. struct gpio_desc *clk_gpiod;
  27. struct gpio_desc *dq_gpiod;
  28. struct rtc_device *rtc;
  29. };
  30. static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev)
  31. {
  32. struct device *dev = &pdev->dev;
  33. /* This will de-assert RESET, declare this GPIO as GPIOD_ACTIVE_LOW */
  34. chip->rst_gpiod = devm_gpiod_get(dev, "rst", GPIOD_OUT_LOW);
  35. if (IS_ERR(chip->rst_gpiod))
  36. return PTR_ERR(chip->rst_gpiod);
  37. chip->clk_gpiod = devm_gpiod_get(dev, "clk", GPIOD_OUT_HIGH);
  38. if (IS_ERR(chip->clk_gpiod))
  39. return PTR_ERR(chip->clk_gpiod);
  40. chip->dq_gpiod = devm_gpiod_get(dev, "dq", GPIOD_ASIS);
  41. if (IS_ERR(chip->dq_gpiod))
  42. return PTR_ERR(chip->dq_gpiod);
  43. return 0;
  44. }
  45. static void ds2404_reset(struct ds2404 *chip)
  46. {
  47. gpiod_set_value(chip->rst_gpiod, 1);
  48. udelay(1000);
  49. gpiod_set_value(chip->rst_gpiod, 0);
  50. gpiod_set_value(chip->clk_gpiod, 0);
  51. gpiod_direction_output(chip->dq_gpiod, 0);
  52. udelay(10);
  53. }
  54. static void ds2404_write_byte(struct ds2404 *chip, u8 byte)
  55. {
  56. int i;
  57. gpiod_direction_output(chip->dq_gpiod, 1);
  58. for (i = 0; i < 8; i++) {
  59. gpiod_set_value(chip->dq_gpiod, byte & (1 << i));
  60. udelay(10);
  61. gpiod_set_value(chip->clk_gpiod, 1);
  62. udelay(10);
  63. gpiod_set_value(chip->clk_gpiod, 0);
  64. udelay(10);
  65. }
  66. }
  67. static u8 ds2404_read_byte(struct ds2404 *chip)
  68. {
  69. int i;
  70. u8 ret = 0;
  71. gpiod_direction_input(chip->dq_gpiod);
  72. for (i = 0; i < 8; i++) {
  73. gpiod_set_value(chip->clk_gpiod, 0);
  74. udelay(10);
  75. if (gpiod_get_value(chip->dq_gpiod))
  76. ret |= 1 << i;
  77. gpiod_set_value(chip->clk_gpiod, 1);
  78. udelay(10);
  79. }
  80. return ret;
  81. }
  82. static void ds2404_read_memory(struct ds2404 *chip, u16 offset,
  83. int length, u8 *out)
  84. {
  85. ds2404_reset(chip);
  86. ds2404_write_byte(chip, DS2404_READ_MEMORY_CMD);
  87. ds2404_write_byte(chip, offset & 0xff);
  88. ds2404_write_byte(chip, (offset >> 8) & 0xff);
  89. while (length--)
  90. *out++ = ds2404_read_byte(chip);
  91. }
  92. static void ds2404_write_memory(struct ds2404 *chip, u16 offset,
  93. int length, u8 *out)
  94. {
  95. int i;
  96. u8 ta01, ta02, es;
  97. ds2404_reset(chip);
  98. ds2404_write_byte(chip, DS2404_WRITE_SCRATCHPAD_CMD);
  99. ds2404_write_byte(chip, offset & 0xff);
  100. ds2404_write_byte(chip, (offset >> 8) & 0xff);
  101. for (i = 0; i < length; i++)
  102. ds2404_write_byte(chip, out[i]);
  103. ds2404_reset(chip);
  104. ds2404_write_byte(chip, DS2404_READ_SCRATCHPAD_CMD);
  105. ta01 = ds2404_read_byte(chip);
  106. ta02 = ds2404_read_byte(chip);
  107. es = ds2404_read_byte(chip);
  108. for (i = 0; i < length; i++) {
  109. if (out[i] != ds2404_read_byte(chip)) {
  110. dev_err(chip->dev, "read invalid data\n");
  111. return;
  112. }
  113. }
  114. ds2404_reset(chip);
  115. ds2404_write_byte(chip, DS2404_COPY_SCRATCHPAD_CMD);
  116. ds2404_write_byte(chip, ta01);
  117. ds2404_write_byte(chip, ta02);
  118. ds2404_write_byte(chip, es);
  119. while (gpiod_get_value(chip->dq_gpiod))
  120. ;
  121. }
  122. static void ds2404_enable_osc(struct ds2404 *chip)
  123. {
  124. u8 in[1] = { 0x10 }; /* enable oscillator */
  125. ds2404_write_memory(chip, 0x201, 1, in);
  126. }
  127. static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
  128. {
  129. struct ds2404 *chip = dev_get_drvdata(dev);
  130. unsigned long time = 0;
  131. __le32 hw_time = 0;
  132. ds2404_read_memory(chip, 0x203, 4, (u8 *)&hw_time);
  133. time = le32_to_cpu(hw_time);
  134. rtc_time64_to_tm(time, dt);
  135. return 0;
  136. }
  137. static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
  138. {
  139. struct ds2404 *chip = dev_get_drvdata(dev);
  140. u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
  141. ds2404_write_memory(chip, 0x203, 4, (u8 *)&time);
  142. return 0;
  143. }
  144. static const struct rtc_class_ops ds2404_rtc_ops = {
  145. .read_time = ds2404_read_time,
  146. .set_time = ds2404_set_time,
  147. };
  148. static int rtc_probe(struct platform_device *pdev)
  149. {
  150. struct ds2404 *chip;
  151. int retval = -EBUSY;
  152. chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
  153. if (!chip)
  154. return -ENOMEM;
  155. chip->dev = &pdev->dev;
  156. chip->rtc = devm_rtc_allocate_device(&pdev->dev);
  157. if (IS_ERR(chip->rtc))
  158. return PTR_ERR(chip->rtc);
  159. retval = ds2404_gpio_map(chip, pdev);
  160. if (retval)
  161. return retval;
  162. platform_set_drvdata(pdev, chip);
  163. chip->rtc->ops = &ds2404_rtc_ops;
  164. chip->rtc->range_max = U32_MAX;
  165. retval = devm_rtc_register_device(chip->rtc);
  166. if (retval)
  167. return retval;
  168. ds2404_enable_osc(chip);
  169. return 0;
  170. }
  171. static struct platform_driver rtc_device_driver = {
  172. .probe = rtc_probe,
  173. .driver = {
  174. .name = "ds2404",
  175. },
  176. };
  177. module_platform_driver(rtc_device_driver);
  178. MODULE_DESCRIPTION("DS2404 RTC");
  179. MODULE_AUTHOR("Sven Schnelle");
  180. MODULE_LICENSE("GPL");
  181. MODULE_ALIAS("platform:ds2404");