rtc-isl12026.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * An I2C driver for the Intersil ISL 12026
  4. *
  5. * Copyright (c) 2018 Cavium, Inc.
  6. */
  7. #include <linux/bcd.h>
  8. #include <linux/delay.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/mutex.h>
  12. #include <linux/nvmem-provider.h>
  13. #include <linux/of.h>
  14. #include <linux/rtc.h>
  15. #include <linux/slab.h>
  16. /* register offsets */
  17. #define ISL12026_REG_PWR 0x14
  18. # define ISL12026_REG_PWR_BSW BIT(6)
  19. # define ISL12026_REG_PWR_SBIB BIT(7)
  20. #define ISL12026_REG_SC 0x30
  21. #define ISL12026_REG_HR 0x32
  22. # define ISL12026_REG_HR_MIL BIT(7) /* military or 24 hour time */
  23. #define ISL12026_REG_SR 0x3f
  24. # define ISL12026_REG_SR_RTCF BIT(0)
  25. # define ISL12026_REG_SR_WEL BIT(1)
  26. # define ISL12026_REG_SR_RWEL BIT(2)
  27. # define ISL12026_REG_SR_MBZ BIT(3)
  28. # define ISL12026_REG_SR_OSCF BIT(4)
  29. /* The EEPROM array responds at i2c address 0x57 */
  30. #define ISL12026_EEPROM_ADDR 0x57
  31. #define ISL12026_PAGESIZE 16
  32. #define ISL12026_NVMEM_WRITE_TIME 20
  33. struct isl12026 {
  34. struct rtc_device *rtc;
  35. struct i2c_client *nvm_client;
  36. };
  37. static int isl12026_read_reg(struct i2c_client *client, int reg)
  38. {
  39. u8 addr[] = {0, reg};
  40. u8 val;
  41. int ret;
  42. struct i2c_msg msgs[] = {
  43. {
  44. .addr = client->addr,
  45. .flags = 0,
  46. .len = sizeof(addr),
  47. .buf = addr
  48. }, {
  49. .addr = client->addr,
  50. .flags = I2C_M_RD,
  51. .len = 1,
  52. .buf = &val
  53. }
  54. };
  55. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  56. if (ret != ARRAY_SIZE(msgs)) {
  57. dev_err(&client->dev, "read reg error, ret=%d\n", ret);
  58. ret = ret < 0 ? ret : -EIO;
  59. } else {
  60. ret = val;
  61. }
  62. return ret;
  63. }
  64. static int isl12026_arm_write(struct i2c_client *client)
  65. {
  66. int ret;
  67. u8 op[3];
  68. struct i2c_msg msg = {
  69. .addr = client->addr,
  70. .flags = 0,
  71. .len = 1,
  72. .buf = op
  73. };
  74. /* Set SR.WEL */
  75. op[0] = 0;
  76. op[1] = ISL12026_REG_SR;
  77. op[2] = ISL12026_REG_SR_WEL;
  78. msg.len = 3;
  79. ret = i2c_transfer(client->adapter, &msg, 1);
  80. if (ret != 1) {
  81. dev_err(&client->dev, "write error SR.WEL, ret=%d\n", ret);
  82. ret = ret < 0 ? ret : -EIO;
  83. goto out;
  84. }
  85. /* Set SR.WEL and SR.RWEL */
  86. op[2] = ISL12026_REG_SR_WEL | ISL12026_REG_SR_RWEL;
  87. msg.len = 3;
  88. ret = i2c_transfer(client->adapter, &msg, 1);
  89. if (ret != 1) {
  90. dev_err(&client->dev,
  91. "write error SR.WEL|SR.RWEL, ret=%d\n", ret);
  92. ret = ret < 0 ? ret : -EIO;
  93. goto out;
  94. } else {
  95. ret = 0;
  96. }
  97. out:
  98. return ret;
  99. }
  100. static int isl12026_disarm_write(struct i2c_client *client)
  101. {
  102. int ret;
  103. u8 op[3] = {0, ISL12026_REG_SR, 0};
  104. struct i2c_msg msg = {
  105. .addr = client->addr,
  106. .flags = 0,
  107. .len = sizeof(op),
  108. .buf = op
  109. };
  110. ret = i2c_transfer(client->adapter, &msg, 1);
  111. if (ret != 1) {
  112. dev_err(&client->dev,
  113. "write error SR, ret=%d\n", ret);
  114. ret = ret < 0 ? ret : -EIO;
  115. } else {
  116. ret = 0;
  117. }
  118. return ret;
  119. }
  120. static int isl12026_write_reg(struct i2c_client *client, int reg, u8 val)
  121. {
  122. int ret;
  123. u8 op[3] = {0, reg, val};
  124. struct i2c_msg msg = {
  125. .addr = client->addr,
  126. .flags = 0,
  127. .len = sizeof(op),
  128. .buf = op
  129. };
  130. ret = isl12026_arm_write(client);
  131. if (ret)
  132. return ret;
  133. ret = i2c_transfer(client->adapter, &msg, 1);
  134. if (ret != 1) {
  135. dev_err(&client->dev, "write error CCR, ret=%d\n", ret);
  136. ret = ret < 0 ? ret : -EIO;
  137. goto out;
  138. }
  139. msleep(ISL12026_NVMEM_WRITE_TIME);
  140. ret = isl12026_disarm_write(client);
  141. out:
  142. return ret;
  143. }
  144. static int isl12026_rtc_set_time(struct device *dev, struct rtc_time *tm)
  145. {
  146. struct i2c_client *client = to_i2c_client(dev);
  147. int ret;
  148. u8 op[10];
  149. struct i2c_msg msg = {
  150. .addr = client->addr,
  151. .flags = 0,
  152. .len = sizeof(op),
  153. .buf = op
  154. };
  155. ret = isl12026_arm_write(client);
  156. if (ret)
  157. return ret;
  158. /* Set the CCR registers */
  159. op[0] = 0;
  160. op[1] = ISL12026_REG_SC;
  161. op[2] = bin2bcd(tm->tm_sec); /* SC */
  162. op[3] = bin2bcd(tm->tm_min); /* MN */
  163. op[4] = bin2bcd(tm->tm_hour) | ISL12026_REG_HR_MIL; /* HR */
  164. op[5] = bin2bcd(tm->tm_mday); /* DT */
  165. op[6] = bin2bcd(tm->tm_mon + 1); /* MO */
  166. op[7] = bin2bcd(tm->tm_year % 100); /* YR */
  167. op[8] = bin2bcd(tm->tm_wday & 7); /* DW */
  168. op[9] = bin2bcd(tm->tm_year >= 100 ? 20 : 19); /* Y2K */
  169. ret = i2c_transfer(client->adapter, &msg, 1);
  170. if (ret != 1) {
  171. dev_err(&client->dev, "write error CCR, ret=%d\n", ret);
  172. ret = ret < 0 ? ret : -EIO;
  173. goto out;
  174. }
  175. ret = isl12026_disarm_write(client);
  176. out:
  177. return ret;
  178. }
  179. static int isl12026_rtc_read_time(struct device *dev, struct rtc_time *tm)
  180. {
  181. struct i2c_client *client = to_i2c_client(dev);
  182. u8 ccr[8];
  183. u8 addr[2];
  184. u8 sr;
  185. int ret;
  186. struct i2c_msg msgs[] = {
  187. {
  188. .addr = client->addr,
  189. .flags = 0,
  190. .len = sizeof(addr),
  191. .buf = addr
  192. }, {
  193. .addr = client->addr,
  194. .flags = I2C_M_RD,
  195. }
  196. };
  197. /* First, read SR */
  198. addr[0] = 0;
  199. addr[1] = ISL12026_REG_SR;
  200. msgs[1].len = 1;
  201. msgs[1].buf = &sr;
  202. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  203. if (ret != ARRAY_SIZE(msgs)) {
  204. dev_err(&client->dev, "read error, ret=%d\n", ret);
  205. ret = ret < 0 ? ret : -EIO;
  206. goto out;
  207. }
  208. if (sr & ISL12026_REG_SR_RTCF)
  209. dev_warn(&client->dev, "Real-Time Clock Failure on read\n");
  210. if (sr & ISL12026_REG_SR_OSCF)
  211. dev_warn(&client->dev, "Oscillator Failure on read\n");
  212. /* Second, CCR regs */
  213. addr[0] = 0;
  214. addr[1] = ISL12026_REG_SC;
  215. msgs[1].len = sizeof(ccr);
  216. msgs[1].buf = ccr;
  217. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  218. if (ret != ARRAY_SIZE(msgs)) {
  219. dev_err(&client->dev, "read error, ret=%d\n", ret);
  220. ret = ret < 0 ? ret : -EIO;
  221. goto out;
  222. }
  223. tm->tm_sec = bcd2bin(ccr[0] & 0x7F);
  224. tm->tm_min = bcd2bin(ccr[1] & 0x7F);
  225. if (ccr[2] & ISL12026_REG_HR_MIL)
  226. tm->tm_hour = bcd2bin(ccr[2] & 0x3F);
  227. else
  228. tm->tm_hour = bcd2bin(ccr[2] & 0x1F) +
  229. ((ccr[2] & 0x20) ? 12 : 0);
  230. tm->tm_mday = bcd2bin(ccr[3] & 0x3F);
  231. tm->tm_mon = bcd2bin(ccr[4] & 0x1F) - 1;
  232. tm->tm_year = bcd2bin(ccr[5]);
  233. if (bcd2bin(ccr[7]) == 20)
  234. tm->tm_year += 100;
  235. tm->tm_wday = ccr[6] & 0x07;
  236. ret = 0;
  237. out:
  238. return ret;
  239. }
  240. static const struct rtc_class_ops isl12026_rtc_ops = {
  241. .read_time = isl12026_rtc_read_time,
  242. .set_time = isl12026_rtc_set_time,
  243. };
  244. static int isl12026_nvm_read(void *p, unsigned int offset,
  245. void *val, size_t bytes)
  246. {
  247. struct isl12026 *priv = p;
  248. int ret;
  249. u8 addr[2];
  250. struct i2c_msg msgs[] = {
  251. {
  252. .addr = priv->nvm_client->addr,
  253. .flags = 0,
  254. .len = sizeof(addr),
  255. .buf = addr
  256. }, {
  257. .addr = priv->nvm_client->addr,
  258. .flags = I2C_M_RD,
  259. .buf = val
  260. }
  261. };
  262. /*
  263. * offset and bytes checked and limited by nvmem core, so
  264. * proceed without further checks.
  265. */
  266. ret = mutex_lock_interruptible(&priv->rtc->ops_lock);
  267. if (ret)
  268. return ret;
  269. /* 2 bytes of address, most significant first */
  270. addr[0] = offset >> 8;
  271. addr[1] = offset;
  272. msgs[1].len = bytes;
  273. ret = i2c_transfer(priv->nvm_client->adapter, msgs, ARRAY_SIZE(msgs));
  274. mutex_unlock(&priv->rtc->ops_lock);
  275. if (ret != ARRAY_SIZE(msgs)) {
  276. dev_err(&priv->nvm_client->dev,
  277. "nvmem read error, ret=%d\n", ret);
  278. return ret < 0 ? ret : -EIO;
  279. }
  280. return 0;
  281. }
  282. static int isl12026_nvm_write(void *p, unsigned int offset,
  283. void *val, size_t bytes)
  284. {
  285. struct isl12026 *priv = p;
  286. int ret;
  287. u8 *v = val;
  288. size_t chunk_size, num_written;
  289. u8 payload[ISL12026_PAGESIZE + 2]; /* page + 2 address bytes */
  290. struct i2c_msg msgs[] = {
  291. {
  292. .addr = priv->nvm_client->addr,
  293. .flags = 0,
  294. .buf = payload
  295. }
  296. };
  297. /*
  298. * offset and bytes checked and limited by nvmem core, so
  299. * proceed without further checks.
  300. */
  301. ret = mutex_lock_interruptible(&priv->rtc->ops_lock);
  302. if (ret)
  303. return ret;
  304. num_written = 0;
  305. while (bytes) {
  306. chunk_size = round_down(offset, ISL12026_PAGESIZE) +
  307. ISL12026_PAGESIZE - offset;
  308. chunk_size = min(bytes, chunk_size);
  309. /*
  310. * 2 bytes of address, most significant first, followed
  311. * by page data bytes
  312. */
  313. memcpy(payload + 2, v + num_written, chunk_size);
  314. payload[0] = offset >> 8;
  315. payload[1] = offset;
  316. msgs[0].len = chunk_size + 2;
  317. ret = i2c_transfer(priv->nvm_client->adapter,
  318. msgs, ARRAY_SIZE(msgs));
  319. if (ret != ARRAY_SIZE(msgs)) {
  320. dev_err(&priv->nvm_client->dev,
  321. "nvmem write error, ret=%d\n", ret);
  322. ret = ret < 0 ? ret : -EIO;
  323. break;
  324. }
  325. ret = 0;
  326. bytes -= chunk_size;
  327. offset += chunk_size;
  328. num_written += chunk_size;
  329. msleep(ISL12026_NVMEM_WRITE_TIME);
  330. }
  331. mutex_unlock(&priv->rtc->ops_lock);
  332. return ret;
  333. }
  334. static void isl12026_force_power_modes(struct i2c_client *client)
  335. {
  336. int ret;
  337. int pwr, requested_pwr;
  338. u32 bsw_val, sbib_val;
  339. bool set_bsw, set_sbib;
  340. /*
  341. * If we can read the of_property, set the specified value.
  342. * If there is an error reading the of_property (likely
  343. * because it does not exist), keep the current value.
  344. */
  345. ret = of_property_read_u32(client->dev.of_node,
  346. "isil,pwr-bsw", &bsw_val);
  347. set_bsw = (ret == 0);
  348. ret = of_property_read_u32(client->dev.of_node,
  349. "isil,pwr-sbib", &sbib_val);
  350. set_sbib = (ret == 0);
  351. /* Check if PWR.BSW and/or PWR.SBIB need specified values */
  352. if (!set_bsw && !set_sbib)
  353. return;
  354. pwr = isl12026_read_reg(client, ISL12026_REG_PWR);
  355. if (pwr < 0) {
  356. dev_warn(&client->dev, "Error: Failed to read PWR %d\n", pwr);
  357. return;
  358. }
  359. requested_pwr = pwr;
  360. if (set_bsw) {
  361. if (bsw_val)
  362. requested_pwr |= ISL12026_REG_PWR_BSW;
  363. else
  364. requested_pwr &= ~ISL12026_REG_PWR_BSW;
  365. } /* else keep current BSW */
  366. if (set_sbib) {
  367. if (sbib_val)
  368. requested_pwr |= ISL12026_REG_PWR_SBIB;
  369. else
  370. requested_pwr &= ~ISL12026_REG_PWR_SBIB;
  371. } /* else keep current SBIB */
  372. if (pwr >= 0 && pwr != requested_pwr) {
  373. dev_dbg(&client->dev, "PWR: %02x\n", pwr);
  374. dev_dbg(&client->dev, "Updating PWR to: %02x\n", requested_pwr);
  375. isl12026_write_reg(client, ISL12026_REG_PWR, requested_pwr);
  376. }
  377. }
  378. static int isl12026_probe(struct i2c_client *client)
  379. {
  380. struct isl12026 *priv;
  381. int ret;
  382. struct nvmem_config nvm_cfg = {
  383. .name = "isl12026-",
  384. .base_dev = &client->dev,
  385. .stride = 1,
  386. .word_size = 1,
  387. .size = 512,
  388. .reg_read = isl12026_nvm_read,
  389. .reg_write = isl12026_nvm_write,
  390. };
  391. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  392. return -ENODEV;
  393. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  394. if (!priv)
  395. return -ENOMEM;
  396. i2c_set_clientdata(client, priv);
  397. isl12026_force_power_modes(client);
  398. priv->nvm_client = i2c_new_dummy_device(client->adapter, ISL12026_EEPROM_ADDR);
  399. if (IS_ERR(priv->nvm_client))
  400. return PTR_ERR(priv->nvm_client);
  401. priv->rtc = devm_rtc_allocate_device(&client->dev);
  402. ret = PTR_ERR_OR_ZERO(priv->rtc);
  403. if (ret)
  404. return ret;
  405. priv->rtc->ops = &isl12026_rtc_ops;
  406. nvm_cfg.priv = priv;
  407. ret = devm_rtc_nvmem_register(priv->rtc, &nvm_cfg);
  408. if (ret)
  409. return ret;
  410. return devm_rtc_register_device(priv->rtc);
  411. }
  412. static void isl12026_remove(struct i2c_client *client)
  413. {
  414. struct isl12026 *priv = i2c_get_clientdata(client);
  415. i2c_unregister_device(priv->nvm_client);
  416. }
  417. static const struct of_device_id isl12026_dt_match[] = {
  418. { .compatible = "isil,isl12026" },
  419. { }
  420. };
  421. MODULE_DEVICE_TABLE(of, isl12026_dt_match);
  422. static struct i2c_driver isl12026_driver = {
  423. .driver = {
  424. .name = "rtc-isl12026",
  425. .of_match_table = isl12026_dt_match,
  426. },
  427. .probe = isl12026_probe,
  428. .remove = isl12026_remove,
  429. };
  430. module_i2c_driver(isl12026_driver);
  431. MODULE_DESCRIPTION("ISL 12026 RTC driver");
  432. MODULE_LICENSE("GPL");