hx170dec.c 21 KB

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  1. /*
  2. * On2/Hantro G1 decoder/pp driver. Single core version.
  3. *
  4. * Copyright (C) 2009 Hantro Products Oy.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/of.h>
  22. #include <linux/clk.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/io.h>
  25. #include <linux/err.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/fs.h>
  28. #include <linux/uaccess.h>
  29. #include <linux/sched.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/delay.h>
  32. #include "hx170dec.h"
  33. #include "vdec.h"
  34. #include "jpegdecapi.h"
  35. #include "jpegdeccontainer.h"
  36. struct vdec_device *vdec6731_global;
  37. unsigned int animation_jpegPhyaddr;
  38. unsigned int dis_decWidth;
  39. unsigned int dis_decHeight;
  40. unsigned int dis_format;
  41. static struct mfc_jpeg_context *vde_jpeg_context = NULL;
  42. #define MAX_ANIMFRAME_WIDTH 1920
  43. #define MAX_ANIMFRAME_HEIGHT 1088
  44. #define MAX_ANIMFRAME_SIZE (MAX_ANIMFRAME_WIDTH * MAX_ANIMFRAME_HEIGHT * 4)
  45. extern int ark_bootanimation_display_init(int width, int height, unsigned int yaddr,unsigned int uaddr,unsigned int vadd,unsigned int format);
  46. extern int ark_bootanimation_display_uninit(void);
  47. extern int ark_bootanimation_set_display_addr(unsigned int yaddr,unsigned int uaddr,unsigned int vaddr,unsigned int format);
  48. extern int get_bootanimation_status(void);
  49. int get_bootanimation_status(void)
  50. {
  51. return vde_jpeg_context->anmation_stats;
  52. }
  53. EXPORT_SYMBOL(get_bootanimation_status);
  54. static inline void vdec_writel(const struct vdec_device *p, unsigned offset, u32 val)
  55. {
  56. writel(val, p->mmio_base + offset);
  57. }
  58. static inline u32 vdec_readl(const struct vdec_device *p, unsigned offset)
  59. {
  60. return readl(p->mmio_base + offset);
  61. }
  62. /**
  63. * Write a range of registers. First register is assumed to be
  64. * "Interrupt Register" and will be written last.
  65. */
  66. static int vdec_regs_write(struct vdec_device *p, int begin, int end,
  67. const struct core_desc *core)
  68. {
  69. int i;
  70. if (copy_from_user(&p->regs[begin], core->regs, (end - begin + 1) * 4))
  71. {
  72. dev_err(p->dev, "%s: copy_from_user failed\n", __func__);
  73. return -EFAULT;
  74. }
  75. for (i = end; i >= begin; i--)
  76. vdec_writel(p, 4 * i, p->regs[i]);
  77. return 0;
  78. }
  79. /**
  80. * Read a range of registers [begin..end]
  81. */
  82. static int vdec_regs_read(struct vdec_device *p, int begin, int end,
  83. const struct core_desc *core)
  84. {
  85. int i;
  86. for (i = end; i >= begin; i--)
  87. p->regs[i] = vdec_readl(p, 4 * i);
  88. if (copy_to_user(core->regs, &p->regs[begin], (end - begin + 1) * 4))
  89. {
  90. dev_err(p->dev, "%s: copy_to_user failed\n", __func__);
  91. return -EFAULT;
  92. }
  93. return 0;
  94. }
  95. //mfc jpeg decode
  96. #define MKTAG(a,b,c,d) ((a) | ((b) << 8) | ((c) << 16) | ((unsigned)(d) << 24))
  97. typedef struct {
  98. unsigned int magic;
  99. int hasBootlogo;
  100. int bootlogoDisplayTime;
  101. int aniCount;
  102. int aniWidth;
  103. int aniHeight;
  104. int aniFps;
  105. int aniDelayHideTime;
  106. int reserved[4];
  107. } BANIHEADER;
  108. static int mfc_jpeg_decode(unsigned int src_addr,unsigned int pvSrc_addr,
  109. unsigned int dest_addr, unsigned int pvDest_addr,
  110. unsigned int size)
  111. {
  112. int ret = 0;
  113. JpegDecInst decoder;
  114. JpegDecRet infoRet;
  115. JpegDecInput DecIn;
  116. JpegDecImageInfo DecImgInf;
  117. JpegDecOutput DecOut;
  118. infoRet = JpegDecInit(&decoder);
  119. if(infoRet !=JPEGDEC_OK) {
  120. printk("JpegDecInit failure %d.\n", infoRet);
  121. return -1;
  122. }
  123. DecIn.decImageType = JPEGDEC_IMAGE;
  124. DecIn.sliceMbSet = 0;
  125. DecIn.bufferSize = 0;
  126. DecIn.streamLength = size;
  127. DecIn.streamBuffer.busAddress= src_addr;
  128. DecIn.streamBuffer.pVirtualAddress = (u32*)pvSrc_addr;
  129. /* Get image information of the JFIF */
  130. infoRet = JpegDecGetImageInfo(decoder,
  131. &DecIn,
  132. &DecImgInf);
  133. if(infoRet !=JPEGDEC_OK)
  134. {
  135. printk("JpegDecGetImageInfo failure.\n");
  136. ret = -1;
  137. goto dec_end;
  138. }
  139. // printk("mfc_jpeg_decode outputWidth %d,outputHeight %d,outputFormat 0x%x\n",DecImgInf.outputWidth,DecImgInf.outputHeight,DecImgInf.outputFormat);
  140. dis_decWidth = DecImgInf.outputWidth;
  141. dis_decHeight=DecImgInf.outputHeight;
  142. dis_format = DecImgInf.outputFormat;
  143. DecIn.pictureBufferY.busAddress = dest_addr;
  144. DecIn.pictureBufferY.pVirtualAddress = (u32*)pvDest_addr;
  145. DecIn.pictureBufferCbCr.busAddress = dest_addr + DecImgInf.outputWidth * DecImgInf.outputHeight;
  146. DecIn.pictureBufferCbCr.pVirtualAddress = (u32*)(pvDest_addr + DecImgInf.outputWidth * DecImgInf.outputHeight);
  147. DecIn.pictureBufferCr.busAddress = 0;
  148. DecIn.pictureBufferCr.pVirtualAddress = 0;
  149. /* Decode JFIF */
  150. infoRet = JpegDecDecode(decoder, &DecIn, &DecOut);
  151. if(infoRet != JPEGDEC_FRAME_READY)
  152. {
  153. printk("JpegDecDecode failure, ret=%d\n", infoRet);
  154. ret = -1;
  155. goto dec_end;
  156. }
  157. dec_end:
  158. JpegDecRelease(decoder);
  159. return 0;
  160. }
  161. //extern int ark_carback_get_status(void);
  162. static void animation_dec_work(struct work_struct *work)
  163. {
  164. static unsigned int frame = 0;
  165. static int timeout_count = 0;
  166. struct mfc_jpeg_context *context = container_of(work, struct mfc_jpeg_context, animation_work);
  167. BANIHEADER *header = (BANIHEADER *) context->animation_data_virtaddr;
  168. unsigned int size =
  169. *(unsigned int *)(context->animation_data_virtaddr + context->animation_file_phyaddr -
  170. context->animation_data_phyaddr);
  171. struct vdec_device *p = vdec6731_global;
  172. if (timeout_count > 50) {
  173. printk(KERN_ALERT "%s Error! Dec timeout.\n", __FUNCTION__);
  174. context->animation_end = true;
  175. } else if (context->animation_file_phyaddr + size >= context->animation_data_phyaddr + context->animation_data_size
  176. && frame < header->aniCount + header->hasBootlogo ? 1 : 0) {
  177. printk(KERN_ALERT "%s Error! Animation data is beyond the mark.\n", __FUNCTION__);
  178. context->animation_end = true;
  179. }
  180. if (context->animation_end) {
  181. ark_bootanimation_display_uninit();
  182. if (context->animation_display_phyaddr){
  183. dma_free_coherent(context->dev, context->animation_display_size,
  184. (void *)context->animation_display_virtaddr,
  185. context->animation_display_phyaddr);
  186. }
  187. iounmap((void*)context->animation_data_virtaddr);
  188. p->context.anmation_stats = 0;
  189. destroy_workqueue(context->animation_queue);
  190. return;
  191. }
  192. if (frame > 0) {
  193. if (!context->animation_dec_finish) {
  194. timeout_count++;
  195. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(10));
  196. return;
  197. }
  198. timeout_count = 0;
  199. }
  200. if (frame == header->aniCount + header->hasBootlogo ? 1 : 0) {
  201. if (!context->animation_dec_finish) {
  202. timeout_count++;
  203. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(10));
  204. return;
  205. }
  206. timeout_count = 0;
  207. context->animation_end = true;
  208. if (header->aniCount > 0) {
  209. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(header->aniDelayHideTime));
  210. } else if (header->hasBootlogo) {
  211. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(header->bootlogoDisplayTime));
  212. }
  213. return;
  214. }
  215. frame++;
  216. context->animation_dec_finish = false;
  217. context->intr_status = mfc_jpeg_decode(context->animation_file_phyaddr + 4, context->animation_file_virtaddr + 4,
  218. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  219. context->animation_display_virtaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  220. size);
  221. context->animation_file_phyaddr += size;
  222. context->animation_file_virtaddr += size;
  223. #if 1
  224. if (!context->animation_end) {
  225. if (!context->intr_status) {
  226. unsigned int format;
  227. if (!context->animation_initdisplay) {
  228. if(dis_format == JPEGDEC_YCbCr420_SEMIPLANAR)
  229. format = 0x11;//ARK1668E_LCDC_FORMAT_Y_UV420;
  230. if(dis_format == JPEGDEC_YCbCr422_SEMIPLANAR)
  231. format = 0x10;//ARK1668E_LCDC_FORMAT_YUV;
  232. ark_bootanimation_display_init(header->aniWidth, header->aniHeight,
  233. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  234. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index +
  235. dis_decWidth * dis_decHeight, 0, format);
  236. context->animation_initdisplay = true;
  237. } else {
  238. if(dis_format == JPEGDEC_YCbCr420_SEMIPLANAR)
  239. format = 0x11;//ARK1668E_LCDC_FORMAT_Y_UV420;
  240. if(dis_format == JPEGDEC_YCbCr422_SEMIPLANAR)
  241. format = 0x10;//ARK1668E_LCDC_FORMAT_Y_UV422;
  242. ark_bootanimation_set_display_addr(context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  243. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index +
  244. dis_decWidth * dis_decHeight, 0, format);
  245. context->animation_display_index = !context->animation_display_index;
  246. }
  247. context->animation_dec_finish = true;
  248. } else {
  249. printk(KERN_ALERT "decode boot animation jpeg error.\n");
  250. context->animation_dec_finish = true;
  251. }
  252. }
  253. #endif
  254. if (header->hasBootlogo && frame == 1)
  255. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(header->bootlogoDisplayTime));
  256. else
  257. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(1000 / header->aniFps));
  258. }
  259. static void animation_timer_handler(struct timer_list *t)
  260. {
  261. struct mfc_jpeg_context *context = from_timer(context, t, animation_timer);
  262. queue_work(context->animation_queue, &context->animation_work);
  263. }
  264. /**
  265. * Misc driver related
  266. */
  267. static int vdec_misc_open(struct inode *inode, struct file *filp)
  268. {
  269. struct vdec_device *p = vdec6731_global;
  270. filp->private_data = p;
  271. dev_dbg(p->dev, "open\n");
  272. //clk_prepare_enable(p->clk);
  273. return 0;
  274. }
  275. static int vdec_misc_release(struct inode *inode, struct file *filp)
  276. {
  277. struct vdec_device *p = filp->private_data;
  278. if (p->dec_owner == filp) {
  279. p->dec_irq_done = false;
  280. init_waitqueue_head(&p->dec_wq);
  281. sema_init(&p->dec_sem, VDEC_MAX_CORES);
  282. p->dec_owner = NULL;
  283. }
  284. if (p->pp_owner == filp) {
  285. p->pp_irq_done = false;
  286. init_waitqueue_head(&p->pp_wq);
  287. sema_init(&p->pp_sem, 1);
  288. p->pp_owner = NULL;
  289. }
  290. //clk_disable_unprepare(p->clk);
  291. dev_dbg(p->dev, "release\n");
  292. return 0;
  293. }
  294. static long vdec_misc_ioctl(struct file *filp, unsigned int cmd,
  295. unsigned long arg)
  296. {
  297. int ret = 0;
  298. void __user *argp = (void __user *)arg;
  299. struct vdec_device *p = vdec6731_global;
  300. struct core_desc core;
  301. u32 reg;
  302. switch (cmd) {
  303. case HX170DEC_IOX_ASIC_ID:
  304. reg = vdec_readl(p, VDEC_IDR);
  305. if (copy_to_user(argp, &reg, sizeof(u32)))
  306. ret = -EFAULT;
  307. break;
  308. case HX170DEC_IOC_MC_OFFSETS:
  309. case HX170DEC_IOCGHWOFFSET:
  310. if (copy_to_user(argp, &p->iobaseaddr, sizeof(p->iobaseaddr)))
  311. ret = -EFAULT;
  312. break;
  313. case HX170DEC_IOCGHWIOSIZE: /* in bytes */
  314. if (copy_to_user(argp, &p->iosize, sizeof(p->iosize)))
  315. ret = -EFAULT;
  316. break;
  317. case HX170DEC_IOC_MC_CORES:
  318. if (copy_to_user(argp, &p->num_cores, sizeof(p->num_cores)))
  319. ret = -EFAULT;
  320. break;
  321. case HX170DEC_IOCS_DEC_PUSH_REG:
  322. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  323. dev_err(p->dev, "copy_from_user (dec push reg) failed\n");
  324. ret = -EFAULT;
  325. } else {
  326. /* Skip VDEC_IDR (ID Register, ro) */
  327. core.regs++; // core.size -= 4;
  328. ret = vdec_regs_write(p, VDEC_DEC_FIRST_REG + 1, VDEC_DEC_LAST_REG, &core);
  329. }
  330. break;
  331. case HX170DEC_IOCS_PP_PUSH_REG:
  332. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  333. dev_err(p->dev, "copy_from_user (pp push reg) failed\n");
  334. ret = -EFAULT;
  335. } else {
  336. /* Don't consider the 5 lastest registers (ro or unused) */
  337. ret = vdec_regs_write(p, VDEC_PP_FIRST_REG, VDEC_PP_LAST_REG - 5, &core);
  338. }
  339. break;
  340. case HX170DEC_IOCS_DEC_PULL_REG:
  341. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  342. dev_err(p->dev, "copy_from_user (dec pull reg) failed\n");
  343. ret = -EFAULT;
  344. } else {
  345. ret = vdec_regs_read(p, VDEC_DEC_FIRST_REG, VDEC_DEC_LAST_REG, &core);
  346. }
  347. break;
  348. case HX170DEC_IOCS_PP_PULL_REG:
  349. if (copy_from_user(&core, (void*)arg, sizeof(struct core_desc))) {
  350. dev_err(p->dev, "copy_from_user (pp pull reg) failed\n");
  351. ret = -EFAULT;
  352. } else {
  353. ret = vdec_regs_read(p, VDEC_PP_FIRST_REG, VDEC_PP_LAST_REG, &core);
  354. }
  355. break;
  356. case HX170DEC_IOCX_DEC_WAIT:
  357. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  358. dev_err(p->dev, "copy_from_user (dec wait) failed\n");
  359. ret = -EFAULT;
  360. } else {
  361. ret = wait_event_interruptible(p->dec_wq, p->dec_irq_done);
  362. p->dec_irq_done = false;
  363. if (unlikely(ret != 0)) {
  364. dev_err(p->dev, "wait_event_interruptible dec error %d\n", ret);
  365. } else {
  366. /* Update dec registers */
  367. ret = vdec_regs_read(p, VDEC_DEC_FIRST_REG, VDEC_DEC_LAST_REG, &core);
  368. }
  369. }
  370. break;
  371. case HX170DEC_IOCX_PP_WAIT:
  372. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  373. dev_err(p->dev, "copy_from_user (pp wait) failed\n");
  374. ret = -EFAULT;
  375. } else {
  376. ret = wait_event_interruptible(p->pp_wq, p->pp_irq_done);
  377. p->pp_irq_done = false;
  378. if (unlikely(ret != 0)) {
  379. dev_err(p->dev, "wait_event_interruptible pp error %d\n", ret);
  380. } else {
  381. /* Update pp registers */
  382. ret = vdec_regs_read(p, VDEC_PP_FIRST_REG, VDEC_PP_LAST_REG, &core);
  383. }
  384. }
  385. break;
  386. case HX170DEC_IOCH_DEC_RESERVE:
  387. if (likely(down_interruptible(&p->dec_sem) == 0)) {
  388. p->dec_owner = filp;
  389. ret = 0; /* core id */
  390. dev_dbg(p->dev, "down dec_sem (core id %d)\n", ret);
  391. } else {
  392. dev_err(p->dev, "down_interruptible dec error\n");
  393. ret = -ERESTARTSYS;
  394. }
  395. break;
  396. case HX170DEC_IOCT_DEC_RELEASE:
  397. dev_dbg(p->dev, "up dec_sem\n");
  398. p->dec_owner = NULL;
  399. up(&p->dec_sem);
  400. break;
  401. case HX170DEC_IOCQ_PP_RESERVE:
  402. if (likely(down_interruptible(&p->pp_sem) == 0)) {
  403. p->pp_owner = filp;
  404. ret = 0; /* core id */
  405. dev_dbg(p->dev, "down pp_sem (core id %d)\n", ret);
  406. } else {
  407. dev_err(p->dev, "down_interruptible pp error\n");
  408. ret = -ERESTARTSYS;
  409. }
  410. break;
  411. case HX170DEC_IOCT_PP_RELEASE:
  412. dev_dbg(p->dev, "up pp_sem\n");
  413. p->pp_owner = NULL;
  414. up(&p->pp_sem);
  415. break;
  416. default:
  417. dev_warn(p->dev, "unknown ioctl %x\n", cmd);
  418. ret = -EINVAL;
  419. }
  420. return ret;
  421. }
  422. const struct file_operations vdec_misc_fops = {
  423. .owner = THIS_MODULE,
  424. .llseek = noop_llseek,//no_llseek,
  425. .open = vdec_misc_open,
  426. .release = vdec_misc_release,
  427. .unlocked_ioctl = vdec_misc_ioctl,
  428. };
  429. static struct miscdevice vdec_misc_device = {
  430. MISC_DYNAMIC_MINOR,
  431. "vdec",
  432. &vdec_misc_fops
  433. };
  434. /*
  435. * Platform driver related
  436. */
  437. /* Should we use spin_lock_irqsave here? */
  438. static irqreturn_t vdec_isr(int irq, void *dev_id)
  439. {
  440. struct vdec_device *p = dev_id;
  441. u32 irq_status_dec, irq_status_pp;
  442. int handled = 0;
  443. // struct mfc_jpeg_context *context = vde_jpeg_context;
  444. /* interrupt status register read */
  445. irq_status_dec = vdec_readl(p, VDEC_DIR);
  446. //printk(KERN_ALERT "irq_status=0x%x.\n", irq_status_dec);
  447. if (irq_status_dec & VDEC_DIR_ISET) {
  448. /* Clear IRQ */
  449. vdec_writel(p, VDEC_DIR, irq_status_dec & ~VDEC_DIR_ISET);
  450. p->dec_irq_done = true;
  451. wake_up_interruptible(&p->dec_wq);
  452. handled++;
  453. }
  454. irq_status_pp = vdec_readl(p, VDEC_PPIR);
  455. if (irq_status_pp & VDEC_PPIR_ISET) {
  456. /* Clear IRQ */
  457. vdec_writel(p, VDEC_PPIR, irq_status_pp & ~VDEC_PPIR_ISET);
  458. p->pp_irq_done = true;
  459. wake_up_interruptible(&p->pp_wq);
  460. handled++;
  461. }
  462. if (handled == 0) {
  463. dev_warn(p->dev, "Spurious IRQ (DIR=%08x PPIR=%08x)\n", \
  464. irq_status_dec, irq_status_pp);
  465. return IRQ_NONE;
  466. }
  467. return IRQ_HANDLED;
  468. }
  469. static int vdec_probe(struct platform_device *pdev)
  470. {
  471. struct vdec_device *p;
  472. struct resource *res, *animres;
  473. int ret;
  474. u32 hwid;
  475. /* Allocate private data */
  476. p = devm_kzalloc(&pdev->dev, sizeof(struct vdec_device), GFP_KERNEL);
  477. if (!p) {
  478. dev_dbg(&pdev->dev, "out of memory\n");
  479. return -ENOMEM;
  480. }
  481. p->dev = &pdev->dev;
  482. platform_set_drvdata(pdev, p);
  483. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  484. p->mmio_base = devm_ioremap_resource(&pdev->dev, res);
  485. if (IS_ERR(p->mmio_base))
  486. return PTR_ERR(p->mmio_base);
  487. p->clk = devm_clk_get(&pdev->dev, "vdec_clk");
  488. if (IS_ERR(p->clk)) {
  489. dev_err(&pdev->dev, "no vdec_clk clock defined\n");
  490. return -ENXIO;
  491. }
  492. p->irq = platform_get_irq(pdev, 0);
  493. if (!p->irq) {
  494. dev_err(&pdev->dev, "could not get irq\n");
  495. return -ENXIO;
  496. }
  497. printk(">>>>>>>>>>>>>>>>>>p->irq = %d\n",p->irq);
  498. ret = devm_request_irq(&pdev->dev, p->irq, vdec_isr,
  499. 0, pdev->name, p);
  500. if (ret) {
  501. dev_err(&pdev->dev, "unable to request VDEC irq\n");
  502. return ret;
  503. }
  504. /* Register the miscdevice */
  505. ret = misc_register(&vdec_misc_device);
  506. if (ret) {
  507. dev_err(&pdev->dev, "unable to register miscdevice\n");
  508. return ret;
  509. }
  510. p->num_cores = VDEC_MAX_CORES;
  511. p->iosize = resource_size(res);
  512. p->iobaseaddr = res->start;
  513. vdec6731_global = p;
  514. p->dec_irq_done = false;
  515. p->pp_irq_done = false;
  516. p->dec_owner = NULL;
  517. p->pp_owner = NULL;
  518. init_waitqueue_head(&p->dec_wq);
  519. init_waitqueue_head(&p->pp_wq);
  520. sema_init(&p->dec_sem, VDEC_MAX_CORES);
  521. sema_init(&p->pp_sem, 1);
  522. ret = clk_prepare_enable(p->clk);
  523. if (ret) {
  524. dev_err(&pdev->dev, "unable to prepare and enable clock\n");
  525. misc_deregister(&vdec_misc_device);
  526. return ret;
  527. }
  528. dev_info(&pdev->dev, "VDEC controller at 0x%p, irq = %d, misc_minor = %d\n",
  529. p->mmio_base, p->irq, vdec_misc_device.minor);
  530. //MFC jpeg decode
  531. animres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  532. if (IS_ERR(animres)) {
  533. return PTR_ERR(animres);
  534. }
  535. p->context.dev = p->dev;
  536. p->context.anmation_stats = 0;
  537. p->context.animation_data_phyaddr = animres->start;
  538. p->context.animation_data_size = resource_size(animres);
  539. p->context.animation_data_virtaddr =
  540. (unsigned int)ioremap(p->context.animation_data_phyaddr, resource_size(animres));
  541. if (p->context.animation_data_virtaddr) {
  542. BANIHEADER *header = (BANIHEADER *) p->context.animation_data_virtaddr;
  543. if (header->magic == MKTAG('B', 'A', 'N', 'I')) {
  544. vde_jpeg_context = &p->context;
  545. p->context.animation_file_phyaddr =
  546. p->context.animation_data_phyaddr + sizeof(BANIHEADER);
  547. p->context.animation_file_virtaddr =
  548. p->context.animation_data_virtaddr + sizeof(BANIHEADER);
  549. p->context.animation_display_size = MAX_ANIMFRAME_SIZE * 2;
  550. p->context.animation_display_virtaddr =
  551. (unsigned int)dma_alloc_coherent(&pdev->dev, p->context.animation_display_size,
  552. &p->context.animation_display_phyaddr, GFP_KERNEL);
  553. if (!p->context.animation_display_virtaddr) {
  554. dev_err(&pdev->dev, "alloc animation display buffer failed.\n");
  555. p->context.animation_end = true;
  556. } else {
  557. p->context.anmation_stats = 1;
  558. p->context.animation_end = false;
  559. p->context.animation_dec_finish = false;
  560. p->context.animation_initdisplay = false;
  561. p->context.animation_queue = create_singlethread_workqueue("animation_queue");
  562. if(!p->context.animation_queue) {
  563. printk(KERN_ERR "%s %d: , create_singlethread_workqueue fail.\n",__FUNCTION__, __LINE__);
  564. return -1;
  565. }
  566. INIT_WORK(&p->context.animation_work, animation_dec_work);
  567. timer_setup(&p->context.animation_timer, animation_timer_handler, 0);
  568. p->context.animation_timer.expires = jiffies + 10;
  569. add_timer(&p->context.animation_timer);
  570. }
  571. } else {
  572. vde_jpeg_context = &p->context;
  573. p->context.animation_end = true;
  574. }
  575. } else
  576. p->context.animation_end = true;
  577. /* Reset Asic (just in case..) */
  578. vdec_writel(p, VDEC_DIR, VDEC_DIR_ID | VDEC_DIR_ABORT);
  579. vdec_writel(p, VDEC_PPIR, VDEC_PPIR_ID);
  580. hwid = vdec_readl(p, VDEC_IDR);
  581. dev_warn(&pdev->dev, "Product ID: %#x (revision %d.%d.%d)\n", \
  582. (hwid & VDEC_IDR_PROD_ID) >> 16,
  583. (hwid & VDEC_IDR_MAJOR_VER) >> 12,
  584. (hwid & VDEC_IDR_MINOR_VER) >> 4,
  585. (hwid & VDEC_IDR_BUILD_VER));
  586. return 0;
  587. }
  588. static void vdec_remove(struct platform_device *pdev)
  589. {
  590. platform_set_drvdata(pdev, NULL);
  591. misc_deregister(&vdec_misc_device);
  592. //return 0;
  593. }
  594. static const struct of_device_id vdec_of_match[] = {
  595. { .compatible = "on2,ark-vdec", .data = NULL },
  596. {},
  597. };
  598. MODULE_DEVICE_TABLE(of, vdec_of_match);
  599. static struct platform_driver vdec_of_driver = {
  600. .driver = {
  601. .name = "ark-vdec",
  602. .owner = THIS_MODULE,
  603. .of_match_table = vdec_of_match,
  604. },
  605. .probe = vdec_probe,
  606. .remove = vdec_remove,
  607. };
  608. //module_platform_driver(vdec_of_driver);
  609. static int __init ark_vdec_init(void)
  610. {
  611. int ret;
  612. ret = platform_driver_register(&vdec_of_driver);
  613. if (ret != 0) {
  614. printk(KERN_ERR "%s %d: failed to register vdec_of_driver\n",
  615. __FUNCTION__, __LINE__);
  616. }
  617. return ret;
  618. }
  619. fs_initcall(ark_vdec_init);
  620. MODULE_AUTHOR("Hantro Products Oy");
  621. MODULE_DESCRIPTION("G1 decoder/pp driver");
  622. MODULE_LICENSE("GPL");
  623. MODULE_VERSION("0.4");
  624. MODULE_ALIAS("platform:vdec");